Patents by Inventor Ken Koseki

Ken Koseki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9654708
    Abstract: A semiconductor apparatus, a solid-state image sensing apparatus, and a camera system capable of reducing interference between signals transmitted through adjacent via holes, preventing an increase in the number of the via holes, reducing the area of a chip having sensors thereon and the number of mounting steps thereof. First and second chips are bonded together to form a laminated structure, a wiring between the first chip and the second chip being connected through via holes, the first chip transmitting signals obtained by time-discretizing analog signals generated by respective sensors to the second chip through the corresponding via holes, the second chip sampling the signals transmitted from the first chip through the via holes at a timing different from a timing at which the signals are sampled by the first chip and quantizing the sampled signals to obtain digital signals.
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: May 16, 2017
    Assignee: Sony Corporation
    Inventors: Toshiaki Nagai, Ken Koseki, Yosuke Ueno, Atsushi Suzuki
  • Publication number: 20170134678
    Abstract: A semiconductor apparatus, a solid-state image sensing apparatus, and a camera system capable of reducing interference between signals transmitted through adjacent via holes, preventing an increase in the number of the via holes, reducing the area of a chip having sensors thereon and the number of mounting steps thereof. First and second chips are bonded together to form a laminated structure, a wiring between the first chip and the second chip being connected through via holes, the first chip transmitting signals obtained by time-discretizing analog signals generated by respective sensors to the second chip through the corresponding via holes, the second chip sampling the signals transmitted from the first chip through the via holes at a timing different from a timing at which the signals are sampled by the first chip and quantizing the sampled signals to obtain digital signals.
    Type: Application
    Filed: January 24, 2017
    Publication date: May 11, 2017
    Inventors: Toshiaki Nagai, Ken Koseki, Yosuke Ueno, Atsushi Suzuki
  • Publication number: 20170134679
    Abstract: A semiconductor apparatus, a solid-state image sensing apparatus, and a camera system capable of reducing interference between signals transmitted through adjacent via holes, preventing an increase in the number of the via holes, reducing the area of a chip having sensors thereon and the number of mounting steps thereof. First and second chips are bonded together to form a laminated structure, a wiring between the first chip and the second chip being connected through via holes, the first chip transmitting signals obtained by time-discretizing analog signals generated by respective sensors to the second chip through the corresponding via holes, the second chip sampling the signals transmitted from the first chip through the via holes at a timing different from a timing at which the signals are sampled by the first chip and quantizing the sampled signals to obtain digital signals.
    Type: Application
    Filed: January 24, 2017
    Publication date: May 11, 2017
    Inventors: Toshiaki Nagai, Ken Koseki, Yosuke Ueno, Atsushi Suzuki
  • Publication number: 20170006243
    Abstract: A semiconductor apparatus, a solid-state image sensing apparatus, and a camera system capable of reducing interference between signals transmitted through adjacent via holes, preventing an increase in the number of the via holes, reducing the area of a chip having sensors thereon and the number of mounting steps thereof. First and second chips are bonded together to form a laminated structure, a wiring between the first chip and the second chip being connected through via holes, the first chip transmitting signals obtained by time-discretizing analog signals generated by respective sensors to the second chip through the corresponding via holes, the second chip sampling the signals transmitted from the first chip through the via holes at a timing different from a timing at which the signals are sampled by the first chip and quantizing the sampled signals to obtain digital signals.
    Type: Application
    Filed: September 13, 2016
    Publication date: January 5, 2017
    Inventors: Toshiaki Nagai, Ken Koseki, Yosuke Ueno, Atsushi Suzuki
  • Patent number: 9509933
    Abstract: A semiconductor apparatus, a solid-state image sensing apparatus, and a camera system capable of reducing interference between signals transmitted through adjacent via holes, preventing an increase in the number of the via holes, reducing the area of a chip having sensors thereon and the number of mounting steps thereof. First and second chips are bonded together to form a laminated structure, a wiring between the first chip and the second chip being connected through via holes, the first chip transmitting signals obtained by time-discretizing analog signals generated by respective sensors to the second chip through the corresponding via holes, the second chip sampling the signals transmitted from the first chip through the via holes at a timing different from a timing at which the signals are sampled by the first chip and quantizing the sampled signals to obtain digital signals.
    Type: Grant
    Filed: March 23, 2016
    Date of Patent: November 29, 2016
    Assignee: Sony Corporation
    Inventors: Toshiaki Nagai, Ken Koseki, Yosuke Ueno, Atsushi Suzuki
  • Publication number: 20160227145
    Abstract: A semiconductor apparatus, a solid-state image sensing apparatus, and a camera system capable of reducing interference between signals transmitted through adjacent via holes, preventing an increase in the number of the via holes, reducing the area of a chip having sensors thereon and the number of mounting steps thereof. First and second chips are bonded together to form a laminated structure, a wiring between the first chip and the second chip being connected through via holes, the first chip transmitting signals obtained by time-discretizing analog signals generated by respective sensors to the second chip through the corresponding via holes, the second chip sampling the signals transmitted from the first chip through the via holes at a timing different from a timing at which the signals are sampled by the first chip and quantizing the sampled signals to obtain digital signals.
    Type: Application
    Filed: March 23, 2016
    Publication date: August 4, 2016
    Inventors: Toshiaki Nagai, Ken Koseki, Yosuke Ueno, Atsushi Suzuki
  • Publication number: 20160182844
    Abstract: Disclosed herein is an image pickup circuit including: amplifying means for amplifying a charge corresponding to an amount of light received by a photodetector, and outputting a pixel signal; ramp signal generating means for generating a ramp signal whose voltage drops with a fixed slope from a predetermined initial voltage; and comparing means for comparing the pixel signal output by the amplifying means with the ramp signal output by the ramp signal generating means. A reference potential of the pixel signal output by the amplifying means and a reference potential of the ramp signal output by the ramp signal generating means are at a same level.
    Type: Application
    Filed: March 2, 2016
    Publication date: June 23, 2016
    Inventors: Hayato Wakabayashi, Yoshiaki Inada, Ken Koseki
  • Patent number: 9350929
    Abstract: A semiconductor apparatus, a solid-state image sensing apparatus, and a camera system capable of reducing interference between signals transmitted through adjacent via holes, preventing an increase in the number of the via holes, reducing the area of a chip having sensors thereon and the number of mounting steps thereof. A first chip and a second chip are bonded together to form a laminated structure, a wiring between the first chip and the second chip being connected through via holes, the first chip transmitting signals obtained by time-discretizing analog signals generated by respective sensors to the second chip through the corresponding via holes, the second chip having a function of sampling the signals transmitted from the first chip through the via holes at a timing different from a timing at which the signals are sampled by the first chip and a function of quantizing the sampled signals to obtain digital signals.
    Type: Grant
    Filed: October 10, 2012
    Date of Patent: May 24, 2016
    Assignee: SONY CORPORATION
    Inventors: Toshiaki Nagai, Ken Koseki, Yosuke Ueno, Atsushi Suzuki
  • Patent number: 9131175
    Abstract: There is provided a solid state imaging apparatus, including a plurality of line sensors including a plurality of pixels arrayed in a line, each of the pixels including an amplifier which amplifies a signal corresponding to a charge accumulated in a photoelectric transducer, and signal lines each for reading a signal of each pixel of the line sensors. The plurality of line sensors are discretely arranged, and the signal lines are gathered and wired along a region in which a circuit block including the line sensors is arranged.
    Type: Grant
    Filed: June 25, 2013
    Date of Patent: September 8, 2015
    Assignee: SONY CORPORATION
    Inventors: Kenya Kondou, Haruhisa Naganokawa, Daijiro Anai, Makoto Aoki, Syouhei Taguchi, Ken Koseki, Nobuo Nakamura
  • Patent number: 9111837
    Abstract: The present invention relates to an image sensor capable of obtaining a good-quality image with a simple configuration. A pixel accumulates a charge by performing photoelectric conversion on incident light, and outputs a pixel signal corresponding to the charge. A vertical scanning circuit controls the pixel to cause the pixel to perform a shutter process of discharging an unnecessary charge accumulated in the pixel, a charge accumulation process of accumulating a charge generated through photoelectric conversion in a predetermined exposure time in the pixel, and a read process of outputting a pixel signal corresponding to the charge accumulated in the pixel in the charge accumulation process.
    Type: Grant
    Filed: September 10, 2008
    Date of Patent: August 18, 2015
    Assignee: SONY CORPORATION
    Inventors: Kenichi Takamiya, Ken Koseki
  • Publication number: 20150155317
    Abstract: A solid-state imaging device in which the potential of a signal line, which is obtained before a pixel has an operating period, is fixed to an intermediate potential between a first power-supply potential and a second power-supply potential.
    Type: Application
    Filed: February 11, 2015
    Publication date: June 4, 2015
    Inventors: Keiji Mabuchi, Toshifumi Wakano, Ken Koseki
  • Patent number: 9029925
    Abstract: A solid-state imaging device in which the potential of a signal line, which is obtained before a pixel has an operating period, is fixed to an intermediate potential between a first power-supply potential and a second power-supply potential.
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: May 12, 2015
    Assignee: Sony Corporation
    Inventors: Keiji Mabuchi, Toshifumi Wakano, Ken Koseki
  • Publication number: 20140232916
    Abstract: A semiconductor apparatus, a solid-state image sensing apparatus, and a camera system capable of reducing interference between signals transmitted through adjacent via holes, preventing an increase in the number of the via holes, reducing the area of a chip having sensors thereon and the number of mounting steps thereof. A first chip and a second chip are bonded together to form a laminated structure, a wiring between the first chip and the second chip being connected through via holes, the first chip transmitting signals obtained by time-discretizing analog signals generated by respective sensors to the second chip through the corresponding via holes, the second chip having a function of sampling the signals transmitted from the first chip through the via holes at a timing different from a timing at which the signals are sampled by the first chip and a function of quantizing the sampled signals to obtain digital signals.
    Type: Application
    Filed: October 10, 2012
    Publication date: August 21, 2014
    Inventors: Toshiaki Nagai, Ken Koseki, Yosuke Ueno, Atsushi Suzuki
  • Patent number: 8803993
    Abstract: A solid-state imaging device including: a pixel section formed by a matrix-like array of a plurality of pixels performing photoelectric conversion; and a pixel signal readout section reading out a pixel signal from the pixel section in units for reading each formed by a plurality of pixels, wherein the pixel signal readout section includes a column-parallel type ADC group formed by a plurality of analog-digital converters (ADCs) for performing A-D conversion of a pixel reset level, and a signal processing system, the signal processing system obtaining only an average value of results of A-D conversion of pixel reset levels for a plurality of pixels and automatically adjusting an input offset value for the conversion range of the ADCs such that the average value of pixel reset levels will be adequately positioned with respect to the A-D conversion range.
    Type: Grant
    Filed: January 27, 2011
    Date of Patent: August 12, 2014
    Assignee: Sony Corporation
    Inventors: Ken Koseki, Yasuaki Hisamatsu
  • Publication number: 20140117210
    Abstract: Disclosed herein is an image pickup circuit including: amplifying means for amplifying a charge corresponding to an amount of light received by a photodetector, and outputting a pixel signal; ramp signal generating means for generating a ramp signal whose voltage drops with a fixed slope from a predetermined initial voltage; and comparing means for comparing the pixel signal output by the amplifying means with the ramp signal output by the ramp signal generating means. A reference potential of the pixel signal output by the amplifying means and a reference potential of the ramp signal output by the ramp signal generating means are at a same level.
    Type: Application
    Filed: January 8, 2014
    Publication date: May 1, 2014
    Applicant: Sony Corporation
    Inventors: Hayato WAKABAYASHI, Yoshiaki INADA, Ken KOSEKI
  • Publication number: 20140077068
    Abstract: A solid-state imaging device in which the potential of a signal line, which is obtained before a pixel has an operating period, is fixed to an intermediate potential between a first power-supply potential and a second power-supply potential.
    Type: Application
    Filed: November 22, 2013
    Publication date: March 20, 2014
    Applicant: Sony Corporation
    Inventors: Keiji Mabuchi, Toshifumi Wakano, Ken Koseki
  • Patent number: 8654230
    Abstract: Disclosed herein is an image pickup circuit including: amplifying means for amplifying a charge corresponding to an amount of light received by a photodetector, and outputting a pixel signal; ramp signal generating means for generating a ramp signal whose voltage drops with a fixed slope from a predetermined initial voltage; and comparing means for comparing the pixel signal output by the amplifying means with the ramp signal output by the ramp signal generating means. A reference potential of the pixel signal output by the amplifying means and a reference potential of the ramp signal output by the ramp signal generating means are at a same level.
    Type: Grant
    Filed: April 24, 2008
    Date of Patent: February 18, 2014
    Assignee: Sony Corporation
    Inventors: Hayato Wakabayashi, Yoshiaki Inada, Ken Koseki
  • Publication number: 20140009657
    Abstract: There is provided a solid state imaging apparatus, including a plurality of line sensors including a plurality of pixels arrayed in a line, each of the pixels including an amplifier which amplifies a signal corresponding to a charge accumulated in a photoelectric transducer, and signal lines each for reading a signal of each pixel of the line sensors. The plurality of line sensors are discretely arranged, and the signal lines are gathered and wired along a region in which a circuit block including the line sensors is arranged.
    Type: Application
    Filed: June 25, 2013
    Publication date: January 9, 2014
    Inventors: Kenya Kondou, Haruhisa Naganokawa, Daijiro Anai, Makoto Aoki, Syouhei Taguchi, Ken Koseki, Nobuo Nakamura
  • Patent number: 8618589
    Abstract: A solid-state imaging device in which the potential of a signal line, which is obtained before a pixel has an operating period, is fixed to an intermediate potential between a first power-supply potential and a second power-supply potential.
    Type: Grant
    Filed: June 23, 2011
    Date of Patent: December 31, 2013
    Assignee: Sony Corporation
    Inventors: Keiji Mabuchi, Toshifumi Wakano, Ken Koseki
  • Patent number: 8599279
    Abstract: A solid-state imaging apparatus includes a comparator for comparing a pixel signal obtained by a pixel section and a reference signal the value of which varies in a stepwise manner, an analog-digital converter for outputting, as a digital value, the amount of time when the pixel signal and the reference signal change levels by the comparator; a reset signal generator for generating a reset signal that triggers a reset operation to be input to the comparator in order to adjust the reference in the analog-digital converter, and a waveform processor provided between the reset signal generator and the comparator for increasing the degree of dullness of a waveform of the reset signal.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: December 3, 2013
    Assignee: Sony Corporation
    Inventors: Yuuki Yamagata, Ken Koseki, Masaru Kikuchi, Yoshiaki Inada, Junichi Inutsuka, Akari Tajima