Abstract: An NchMOS transistor Q71 on the input side of a current mirror 70 is made function as a voltage operating-point setting portion so that a pixel signal line potential (voltage of a horizontal signal line 20) would be constantly stable nearly at the GND. Then, an amplification factor and linearity become good in an amplification transistor in the solid imaging device 3. A current copier 90 is made function as a current sampling portion so as to receive a signal current IIN of the solid imaging device 3 through the current mirror 70 to carry out sampling of a pixel signal in a resetting period in the shape of current component as the pixel signal is. Calculating differential between a current component in a detecting period and an offset current, which is the current component in a resetting period in sampling, allows an offset component included in the pixel signal to be removed and only pure signal Isig to be picked up at an output terminal Iout, so that the FPN restraining function can be fulfilled.

Abstract: Disclosed herein is a data transfer circuit including, a plurality of data transfer lines, a plurality of data outputting sections, a plurality of data holding sections, a data-acquiring-clock supplying section a clock supplying section, and a column scan section.

Abstract: A solid-state image sensor includes a pixel array unit including a plurality of pixels arranged in the form of an array, column signal lines adapted to transmit pixel signals output from pixels in respective columns, a noise adding unit adapted to add temporally constant and two-dimensional spatially random noise to the pixel signals transmitted via the column signal lines, and an analog-to-digital converter adapted to convert a signal level and a reference level of each pixel signal including the noise added thereto by the noise adding unit.

Abstract: A solid-state imaging device includes: a pixel array section having a plurality of unit pixels, each including a photoelectric conversion element, arranged therein; driving means for performing a shutter operation for removing charge stored in the photoelectric conversion element and a read operation for reading the charge of an electric signal that is obtained by the photoelectric conversion of the photoelectric conversion element and is then stored in the photoelectric conversion element; and control means, when a unit pixel driving mode is changed from a first driving mode to a second driving mode in the units of frames, for changing the shutter operation to the second driving mode while keeping the read operation in the first driving mode for a period corresponding to one frame in the current frame, and changing the read operation to the second driving mode in the next frame.

Abstract: The present invention relates to an image sensor capable of obtaining a good-quality image with a simple configuration. A pixel accumulates a charge by performing photoelectric conversion on incident light, and outputs a pixel signal corresponding to the charge. A vertical scanning circuit controls the pixel to cause the pixel to perform a shutter process of discharging an unnecessary charge accumulated in the pixel, a charge accumulation process of accumulating a charge generated through photoelectric conversion in a predetermined exposure time in the pixel, and a read process of outputting a pixel signal corresponding to the charge accumulated in the pixel in the charge accumulation process.

Abstract: An imaging device includes: a pixel section having a plurality of pixel circuits arranged in a matrix form; and a signal processing section that processes an output signal read from the pixel section. The pixel section includes a first output signal line, at least one first color pixel circuit connected to the first output signal line, a second output signal line, and at least one second color pixel circuit adjacent to the first color pixel circuit in a row direction thereof and connected to the second output signal line. The signal processing section includes a first signal processing circuit, a second signal processing circuit, a selection circuit, a first current source, a second current source, a current source selection circuit, a first connection node, and a second connection node.

Abstract: A solid-state imaging device including: an imaging pixel region where a plurality of imaging pixels is disposed; a vertical selecting circuit for outputting pixel signals from imaging pixels of respective columns on a selected row of the imaging pixel region to vertical signal lines provided respectively for the columns; charge integrating amps provided respectively for the vertical signal lines of the columns so as to receive inputs of pixel signals from imaging pixels of the respective columns; holding elements that allow the input pixel signals to be held in the charge integrating amps even in periods when the charge integrating amps are in a standby state; and a horizontal selecting circuit for transferring pixel signals output from the respective charge integrating amps by a horizontal signal line.

Abstract: A solid-state imaging device in which the potential of a signal line, which is obtained before a pixel has an operating period, is fixed to an intermediate potential between a first power-supply potential and a second power-supply potential.

Abstract: From a pixel array where imaging pixels are arranged, pixel signals of respective columns on a selected row are read in parallel in a horizontal blanking period of a horizontal period. The pixel signals of the respective columns are output to horizontal signal lines in an effective period of the horizontal period via charge integrating amps provided respectively for the columns, i.e., provided respectively for vertical signal lines, and are thereby transferred horizontally. In the charge integrating amps, it is possible to enter a standby state while holding the pixel signals by a holding voltage. Furthermore, in the charge integrating amps, a reference potential for precharging feedback capacitors for amps at the time of a reading operation is automatically controlled based on a black level. Furthermore, pixel signals from the respective charge integrating amps are horizontally transferred in parallel using a plurality of horizontal signal lines.

Abstract: From a pixel array where imaging pixels are arranged, pixel signals of respective columns on a selected row are read in parallel in a horizontal blanking period of a horizontal period. The pixel signals of the respective columns are output to horizontal signal lines in an effective period of the horizontal period via charge integrating amps provided respectively for the columns, i.e., provided respectively for vertical signal lines, and are thereby transferred horizontally. In the charge integrating amps, it is possible to enter a standby state while holding the pixel signals by a holding voltage. Furthermore, in the charge integrating amps, a reference potential for precharging feedback capacitors for amps at the time of a reading operation is automatically controlled based on a black level. Furthermore, pixel signals from the respective charge integrating amps are horizontally transferred in parallel using a plurality of horizontal signal lines.

Abstract: A solid-state imaging device includes a pixel array including pixels two-dimensionally arranged in matrix form, with a signal line provided in each column of the arranged pixels, each pixel including a photoelectric conversion element, and a fixing unit fixing the potential of the signal line, which is obtained before the pixel has an operating period, to an intermediate potential between a first power-supply potential and a second power-supply potential.

Abstract: A dc level control method for holding a dc level of a clamp portion in an electric signal to be a prescribed value is disclosed, wherein the method comprises the steps of: comparing a dc level of a sampling interval in said electric signal with a predetermined reference value to obtain a difference between said dc level and said reference value using an A/D converting section for dc level comparison which has a lower bit resolution than an A/D converting section for digital signal processing of said electric signal; and feeding back a clamp signal to said electric signal so that said obtained difference between said dc level and said reference value substantially becomes zero. This method is suitable for applying to a signal processing system for a solid state imaging apparatus.

Abstract: A solid-state image pickup device includes a pixel array section including a plurality of unit pixels, a reference signal production section configured to generate a reference signal and output a detection value, a comparison section configured to compare a reset level upon resetting, a counter configured to start a counting action and continue the counting action to measure a comparison time period in order to obtain count values corresponding to the reset level and the signal level, a detection section configured to retain a result of the comparison of said comparison section when the reset level reaches the detection value as a result of the detection of a black sun phenomenon for a fixed period of time, and a prevention section configured to prevent a black sun phenomenon based on a result of the detection of said detection section.

Abstract: The levels of the power supply and the ground are kept constant against a parasitic resistance by keeping the constant current of an amplifier irrespective of the size of a pixel signal and the gain of the amplifier in this case in an image signal reading circuit system having the amplifier arranged to each column. The amplifier has a limiter at an output terminal thereof which limits an output voltage of the amplifier to a range for keeping the constant consumption-current.

Abstract: The levels of the power supply and the ground are kept constant against a parasitic resistance by keeping the constant current of an amplifier irrespective of the size of a pixel signal and the gain of the amplifier in this case in an image signal reading circuit system having the amplifier arranged to each column. The amplifier has a limiter at an output terminal thereof which limits an output voltage of the amplifier to a range for keeping the constant consumption-current.

Abstract: A pixel drive circuit includes a plurality of pixel circuits each including a photoelectric converting unit for converting an incident light into an electric charge and accumulating the converted electric charge, the plurality of pixel circuits being arranged in a matrix shape, an address decoder for selecting the pixel circuits to be controlled which are arranged on an identical line, a storage circuit for storing operation information to be executed by the pixel circuits selected by the address decoder, and a control circuit for controlling an operation of the pixel circuits selected by the address decoder in accordance with a storage state of the storage circuit. The control circuit controls a charge discharging operation of discharging an electric charge remaining in the photoelectric converting unit of each of the pixel circuits. The storage circuit holds the storage state until the charge discharging operation is completed.

Abstract: From a pixel array where imaging pixels are arranged, pixel signals of respective columns on a selected row are read in parallel in a horizontal blanking period of a horizontal period. The pixel signals of the respective columns are output to horizontal signal lines in an effective period of the horizontal period via charge integrating amps provided respectively for the columns, i.e., provided respectively for vertical signal lines, and are thereby transferred horizontally. In the charge integrating amps, it is possible to enter a standby state while holding the pixel signals by a holding voltage. Furthermore, in the charge integrating amps, a reference potential for precharging feedback capacitors for amps at the time of a reading operation is automatically controlled based on a black level. Furthermore, pixel signals from the respective charge integrating amps are horizontally transferred in parallel using a plurality of horizontal signal lines.

Abstract: In an analog front end (FE) IC chip having a CDS (Correlated Double Sampling) function and an AGC (Automatic Gain Control) function, a clamp circuit for clamping an output signal during a black reference signal period is equipped with a mechanism for suppressing the effect of noises contaminated from a power source, external circuits, etc.

Abstract: From a pixel array where imaging pixels are arranged, pixel signals of respective columns on a selected row are read in parallel in a horizontal blanking period of a horizontal period. The pixel signals of the respective columns are output to horizontal signal lines in an effective period of the horizontal period via charge integrating amps provided respectively for the columns, i.e., provided respectively for vertical signal lines, and are thereby transferred horizontally. In the charge integrating amps, it is possible to enter a standby state while holding the pixel signals by a holding voltage. Furthermore, in the charge integrating amps, a reference potential for precharging feedback capacitors for amps at the time of a reading operation is automatically controlled based on a black level. Furthermore, pixel signals from the respective charge integrating amps are horizontally transferred in parallel using a plurality of horizontal signal lines.

Abstract: A solid-state imaging device including: an imaging pixel region where a plurality of imaging pixels is disposed; a vertical selecting circuit for outputting pixel signals from imaging pixels of respective columns on a selected row of the imaging pixel region to vertical signal lines provided respectively for the columns; charge integrating amps provided respectively for the vertical signal lines of the columns so as to receive inputs of pixel signals from imaging pixels of the respective columns; holding elements that allow the input pixel signals to be held in the charge integrating amps even in periods when the charge integrating amps are in a standby state; and a horizontal selecting circuit for transferring pixel signals output from the respective charge integrating amps by a horizontal signal line.