Patents by Inventor Kenji Iida

Kenji Iida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060112544
    Abstract: The present invention relates to a method of manufacturing a wiring board comprising: a build-up layer, in which wiring patterns are piled with insulating layers; and a core substrate, which is separately formed from the build-up layer, the method comprising the steps of: separably forming the build-up layer on a plate-shaped support; electrically connecting the core substrate to the wiring patterns of the build-up layer on the support; and removing the support from the build-up layer so as to form the wiring board, in which the build-up layer is connected to the core substrate. By separably forming the build-up layer and the core substrate, the wiring board effectively exhibiting characteristics thereof can be produced.
    Type: Application
    Filed: November 4, 2005
    Publication date: June 1, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Takashi Shuto, Kenji Takano, Kenji IIda, Kenichiro Abe, Keiji Arai, Kiyotaka Seyama
  • Publication number: 20060114750
    Abstract: A timepiece includes pointers, motors for driving the pointers, a pointer position detector for detecting the positions of the pointers, a control unit, an electricity storage unit as a power supply, and a voltage detector for detecting the power supply voltage. The control unit controls the pointer position detection by means of the pointer position detector on the basis of the power supply voltage detected by the voltage detector. Therefore, the pointer position detector can be halted when the power supply voltage decreases to less than a specific voltage, and the pointer position detector can be driven while the power supply voltage is low.
    Type: Application
    Filed: November 28, 2005
    Publication date: June 1, 2006
    Applicant: Seiko Epson Corporation
    Inventors: Kenji Iida, Fumiaki Miyahara, Kunio Koike, Eisaku Shimizu
  • Publication number: 20060108147
    Abstract: A printed wiring board is made of first and second substrates superimposed on each other. The first and second substrates respectively include a core layer made of resin containing carbon fibers. The second substrate has the outline different from that of the first substrate. A stepped surface is defined on the front surface at least of the first substrate. Electrodes can be formed on the stepped surface as well as on the back surface of the first substrate and the front surface of the second substrate. This structure enables detection of an electric signal from the stepped surface. A further flexibility can thus be achieved in locating electrodes as compared with a conventional printed wiring board having uniform substrates simply superimposed on each other. This results in an expanded use or purpose for a printed wiring board.
    Type: Application
    Filed: December 30, 2005
    Publication date: May 25, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Tomoyuki Abe, Nobuyuki Hayashi, Motoaki Tani, Kenichiro Abe, Kenji Iida
  • Publication number: 20050099528
    Abstract: A mobile terminal device with a camera is provided which can secure emitted light brightness of a camera light unit and save power consumption of the device. During photographing, when the driving power of the camera light unit is increased, driving power for an illumination unit is decreased so that the increase of the total power consumption of the camera light unit and illumination unit can be minimized. In addition, the camera lamp unit and illumination unit are driven by respective driving circuits that share a power supply unit.
    Type: Application
    Filed: March 31, 2004
    Publication date: May 12, 2005
    Inventors: Atsuo Soma, Kenji Iida, Satoru Matsumiya, Toshio Hiraishi, Hiroyuki Katsurai
  • Publication number: 20040211751
    Abstract: The method of manufacturing a circuit board is capable of preventing deformation of a core substrate, ensuring size thereof and highly concentrating cable patterns so as to realize compact and high-performance semiconductor devices. The method of manufacturing a circuit board of the present invention comprises the steps of: forming a multilayered body, in which cable patterns on different layers insulated by an insulating layer are electrically connected, on a core substrate by a buildup process; and separating the multilayered body from the core substrate. A metal layer is vacuum-adhered on the core substrate.
    Type: Application
    Filed: January 28, 2004
    Publication date: October 28, 2004
    Inventors: Takashi Shuto, Takefumi Kashiwa, Kenji Takano, Kenji Iida, Kenichiro Abe
  • Patent number: 6701613
    Abstract: In a method of manufacturing a multilayer circuit board, cable patterns in a plurality of cable layers can be precisely formed, and the cable layer are formed with higher density, with higher reliability. The multilayer circuit board comprises: a plurality of cable layers, each of which includes electric conductive sections; a plurality of first insulating layers, each of which encloses the electric conductive sections in each cable layer and fills spaces between the electric conductive sections; and post vias electrically connecting the electric conductive sections in one cable layer to those in another cable layer. Height of the electric conductive sections in each cable layer are equal to that of the first insulating layer enclosing those electric conductive sections.
    Type: Grant
    Filed: February 22, 2001
    Date of Patent: March 9, 2004
    Assignee: Fujitsu Limited
    Inventor: Kenji Iida
  • Patent number: 6696751
    Abstract: In conventional semiconductor devices, customarily, it is sought to position the mounting region of a semiconductor element in the center of a package, and hence the dimensions of the package are increased unnecessarily, but the object of the present invention is to avoid unnecessary increasing of the package dimensions, without impairing the required functions of the semiconductor device. Unnecessary increasing of package dimensions is avoided by providing a semiconductor device comprising a package having a semiconductor element mounting region, a first region containing the aforementioned mounting region, and a second region partially adjoining the periphery of the above-described first region.
    Type: Grant
    Filed: February 6, 2001
    Date of Patent: February 24, 2004
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Atsunori Kajiki, Kenji Iida
  • Publication number: 20040003943
    Abstract: In the multilayer circuit board, cable patterns in a plurality of cable layers can be precisely formed, and the cable layer are formed with higher density, with higher reliability. The multilayer circuit board comprises: a plurality of cable layers, each of which includes electric conductive sections; a plurality of first insulating layers, each of which encloses the electric conductive sections in each cable layer and fills spaces between the electric conductive sections; and post vias electrically connecting the electric conductive sections in one cable layer to those in another cable layer. Height of the electric conductive sections in each cable layer are equal to that of the first insulating layer enclosing those electric conductive sections.
    Type: Application
    Filed: July 7, 2003
    Publication date: January 8, 2004
    Applicant: FUJITSU LIMITED
    Inventor: Kenji IIda
  • Patent number: 6630852
    Abstract: A power-generation detection circuit for detecting a power-generation state by an AC voltage supplied from a power-generation device including a capacitor, and switching element, a resistor, and an inverter circuit which controls the charging of the capacitor by a power-generation device. The switching element is switched by the AC voltage from the power-generation device. The voltage of the capacitor is detected by the inverter circuit thereby performing power-generation detection.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: October 7, 2003
    Assignee: Seiko Epson Corporation
    Inventors: Teruhiko Fujisawa, Shinji Nakamiya, Yoshitaka Iijima, Kenji Iida
  • Patent number: 6620083
    Abstract: A tool pot used for a tool magazine of a machine tool to removably hold a tool is disclosed. A main body of the tool pot is constructed a cylindrical wall defining a holing aperture for holding the tool, end ribs formed at opposed ends of the cylindrical wall and a plurality of longitudinal ribs formed between the end ribs on the outer periphery of the cylindrical wall. And the main body is integrally molded from a glass-fiber reinforced thermoplastic resin material such as crystalline nylon-type resin. Therefore, the tool pot has high wear resistance and light weight, and it can be recycled.
    Type: Grant
    Filed: March 19, 2001
    Date of Patent: September 16, 2003
    Assignee: Toyoda Koki Kabushiki Kaisha
    Inventors: Akimasa Ninomiya, Mamoru Kato, Fumio Suzuki, Kenji Iida, Toshikazu Sakei, Yasuhito Ishihara
  • Publication number: 20030135994
    Abstract: The present invention relates to a method for manufacturing a printed circuit board, and the method comprises forming penetrating holes in predetermined positions of an insulating substrate, then forming resist films having a predetermined pattern on the front and the rear surfaces of the insulating substrate; plating the insulating substrate provided with the resist films so as to form conductive plating patterns on the front and the rear surfaces of the insulating substrate and conductive paths on the inside surfaces of the penetrating holes, the conductive plating patterns being connected to each other via the conductive paths; and subsequently removing the resist films.
    Type: Application
    Filed: January 15, 2003
    Publication date: July 24, 2003
    Applicant: Fujitsu Limited
    Inventors: Takashi Shutou, Yasuhito Takahashi, Kenji Iida, Kenji Takano, Yukio Miyazaki
  • Patent number: 6476580
    Abstract: In an electronic apparatus including a generator device for generating power, a storage device for storing the generated electric energy, and a motor driven by the electric energy stored in the storage device, it is detected whether a magnetic field is generated by power generation. If it is detected that a magnetic field is generated by power generation, a correcting driving-pulse signal having an effective power larger than a normal driving-pulse signal, which is output for controlling the driving of the motor, is output to the motor. In performing this operation, a determination is made by assuming that a magnetic field is generated while the storage device is in the charging state.
    Type: Grant
    Filed: January 18, 2001
    Date of Patent: November 5, 2002
    Assignee: Seiko Epson Corporation
    Inventors: Shinji Nakamiya, Teruhiko Fujisawa, Yoshitaka Iijima, Kenji Iida
  • Patent number: 6476579
    Abstract: A pulse motor driving device having a rotation detecting unit adapted to detect whether or not a pulse motor rotates. In this device, a control unit performs an operation of increasing the effective value of the driving power of the pulse motor and periodically performs an operation of lowering the effective value of the driving power thereof when it is detected by the rotation detecting unit that the pulse motor does not rotate. Further, the control unit interrupts the operation of lowering the effective value of the driving power of the pulse motor when a magnetic field is detected by a magnetic detecting unit.
    Type: Grant
    Filed: June 20, 2000
    Date of Patent: November 5, 2002
    Assignee: Seiko Epson Corporation
    Inventors: Hidehiro Akahane, Shinji Nakamiya, Yoshitaka Iijima, Kenji Iida, Tsuneaki Furukawa
  • Patent number: 6452358
    Abstract: In an electronic apparatus which includes a power generator and a storage device for storing electric energy obtained thereby, it is detected whether a motor driven by the stored electric energy is rotating by comparing the rotation detecting voltage, which is proportional to the induction voltage generated in the motor caused by the rotation of the motor, with a rotation reference voltage. The generation state of the power generator or the charging state of the storage device is detected. The level of the rotation detecting voltage or the level of the rotation reference voltage is shifted by a predetermined amount based on the detected generation state of the power generator or the detected charging state of the storage device so that the voltage difference between the rotation detecting voltage and the rotation reference voltage is increased during the no-rotation period.
    Type: Grant
    Filed: January 23, 2001
    Date of Patent: September 17, 2002
    Assignee: Seiko Epson Corporation
    Inventors: Yoshitaka Iijima, Kenji Iida, Shinji Nakamiya
  • Publication number: 20020079954
    Abstract: A power-generation detection circuit for detecting a power-generation state by an AC voltage supplied from a power-generation device including a capacitor, and switching element, a resistor, and an inverter circuit which controls the charging of the capacitor by a power-generation device. The switching element is switched by the AC voltage from the power-generation device. The voltage of the capacitor is detected by the inverter circuit thereby performing power-generation detection.
    Type: Application
    Filed: October 5, 2001
    Publication date: June 27, 2002
    Inventors: Teruhiko Fujisawa, Shinji Nakamiya, Yoshitaka Iijima, Kenji Iida
  • Patent number: 6389686
    Abstract: A process for fabricating thin multi-layer circuit boards. A substrate is disposed over a heat-accumulating block adjacent thereto so that it is uniformly heated from the back side thereof during the pre-baking.
    Type: Grant
    Filed: December 1, 2000
    Date of Patent: May 21, 2002
    Assignee: Fujitsu Limited
    Inventors: Yasuhito Takahashi, Yasunaga Kurokawa, Kenji Iida, Masaru Sumi, Yuichiro Ohta, Toshiro Katsube, Kazuo Nakano, Norikazu Ozaki, Hiroyuki Katayama
  • Publication number: 20020045292
    Abstract: In conventional semiconductor devices, customarily, it is sought to position the mounting region of a semiconductor element in the center of a package, and hence the dimensions of the package are increased unnecessarily, but the object of the present invention is to avoid unnecessary increasing of the package dimensions, without impairing the required functions of the semiconductor device. Unnecessary increasing of package dimensions is avoided by providing a semiconductor device comprising a package having a semiconductor element mounting region, a first region containing the aforementioned mounting region, and a second region partially adjoining the periphery of the above-described first region.
    Type: Application
    Filed: December 20, 2001
    Publication date: April 18, 2002
    Applicant: Shinko Electric Industries Co., Ltd.
    Inventors: Atsunori Kajiki, Kenji Iida
  • Publication number: 20020035019
    Abstract: A tool pot used for a tool magazine of a machine tool to removably hold a tool is disclosed. A main body of the tool pot is constructed a cylindrical wall defining a holing aperture for holding the tool, end ribs formed at opposed ends of the cylindrical wall and a plurality of longitudinal ribs formed between the end ribs on the outer periphery of the cylindrical wall. And the main body is integrally molded from a glass-fiber reinforced thermoplastic resin material such as crystalline nylon-type resin. Therefore, the tool pot has high wear resistance and light weight, and it can be recycled.
    Type: Application
    Filed: March 19, 2001
    Publication date: March 21, 2002
    Applicant: TOYODA KOKI KABUSHIKI KAISHA
    Inventors: Akimasa Ninomiya, Mamoru Kato, Fumio Suzuki, Kenji Iida, Toshikazu Sakei, Yasuhito Ishihara
  • Publication number: 20020023895
    Abstract: In the multilayer circuit board, cable patterns in a plurality of cable layers can be precisely formed, and the cable layer are formed with higher density, with higher reliability. The multilayer circuit board comprises: a plurality of cable layers, each of which includes electric conductive sections; a plurality of first insulating layers, each of which encloses the electric conductive sections in each cable layer and fills spaces between the electric conductive sections; and post vias electrically connecting the electric conductive sections in one cable layer to those in another cable layer. Height of the electric conductive sections in each cable layer are equal to that of the first insulating layer enclosing those electric conductive sections.
    Type: Application
    Filed: February 22, 2001
    Publication date: February 28, 2002
    Applicant: FUJITSU LIMITED
    Inventor: Kenji Iida
  • Patent number: D461733
    Type: Grant
    Filed: September 19, 2001
    Date of Patent: August 20, 2002
    Assignee: SMC Kabushiki Kaisha
    Inventor: Kenji Iida