Abstract: A first AlGaN layer formed over a substrate, a second AlGaN layer formed over the first AlGaN layer, an electron transit layer formed over the second AlGaN layer, and an electron supply layer formed over the electron transit layer are provided. A relationship of “0?x1<x2?1” is found when a composition of the first AlGaN layer is represented by Alx1Ga1-x1N, and a composition of the second AlGaN layer is represented by Alx2Ga1-x2N. Negative charges exist at an upper surface of the AlGaN layer more than positive charges existing at a lower surface of the AlGaN layer.

Abstract: A compound semiconductor device includes: an electron transport layer formed over a substrate; an electron supply layer formed over the electron transport layer; and a cap layer formed over the electron supply layer; the cap layer includes a first compound semiconductor layer containing GaN; a second compound semiconductor layer containing AlN, which is formed over the first compound semiconductor layer; a third compound semiconductor layer containing GaN, which is formed over the second compound semiconductor layer; and at least one of a first AlGaN-containing layer and a second AlGaN-containing layer, with the first AlGaN-containing layer formed between the first compound semiconductor layer and the second compound semiconductor layer and the Al content increases toward the second compound semiconductor layer, and the second AlGaN-containing layer formed between the second compound semiconductor layer and the third compound semiconductor layer and the Al content increases toward the second compound semicond

Abstract: A compound semiconductor device includes: a conductive SiC substrate; an AlN buffer layer formed on said conductive SiC substrate and containing Cl; a compound semiconductor buffer layer formed on said AlN layer which contains Cl, said compound semiconductor buffer layer not containing Cl; and a device constituent layer or layers formed above said compound semiconductor buffer layer not containing Cl.

Abstract: A semiconductor device includes a first semiconductor layer formed over a substrate, a second semiconductor layer formed over the first semiconductor layer, a source electrode and a drain electrode formed over the second semiconductor layer, an insulating film formed over the second semiconductor layer, a gate electrode formed over the insulating film, and a protection film covering the insulating film, the protection film being formed by thermal CVD, thermal ALD, or vacuum vapor deposition.

Abstract: A semiconductor epitaxial substrate includes: a single crystal substrate; an AlN layer epitaxially grown on the single crystal substrate; and a nitride semiconductor layer epitaxially grown on the AlN layer, wherein an interface between the AlN layer and nitride semiconductor layer has a larger roughness than an interface between the single crystal substrate and AlN layer, and a skewness of the upper surface of the AlN layer is positive.

Abstract: A semiconductor device includes a GaN electron transport layer provided over a substrate; a first AlGaN electron supply layer provided over the GaN electron transport layer; an AlN electron supply layer provided over the first AlGaN electron supply layer; a second AlGaN electron supply layer provided over the AlN electron supply layer; a gate recess provided in the second AlGaN electron supply layer and the AlN electron supply layer; and a gate electrode provided over the gate recess.

Abstract: A method for manufacturing a compound semiconductor structure, includes (a) selecting a conductive SiC substrate in accordance with color and resistivity and (b) epitaxially growing a GaN series compound semiconductor layer on the selected conductive SiC substrate. The step (a) preferably selects a conductive SiC substrate whose main color is green, whose conductivity type is n-type and whose resistivity is 0.08 52 cm to 1×105 ?cm, or whose main color is black, whose conductivity type is p-type and whose resistivity is 1×103 ?cm to 1×105?cm, or whose main color is blue, whose conductivity type is p-type and whose resistivity is 10 ?cm to 1×105 ?cm. The step (b) preferably includes (b-1) growing an AlInGaN layer having a thickness not thinner than 10 ?m on the conductive SiC substrate by hydride VPE.

Abstract: A semiconductor epitaxial substrate includes: a single crystal substrate; an AlN layer epitaxially grown on the single crystal substrate; and a nitride semiconductor layer epitaxially grown on the AN layer, wherein an interface between the AlN layer and nitride semiconductor layer has a larger roughness than an interface between the single crystal substrate and AlN layer, and a skewness of the upper surface of the AlN layer is positive.

Abstract: A method for manufacturing a compound semiconductor structure, includes (a) selecting a conductive SiC substrate in accordance with color and resistivity and (b) epitaxially growing a GaN series compound semiconductor layer on the selected conductive SiC substrate. The step (a) preferably selects a conductive SiC substrate whose main color is green, whose conductivity type is n-type and whose resistivity is 0.08 ?cm to 1×105 ?cm, or whose main color is black, whose conductivity type is p-type and whose resistivity is 1×103 ?cm to 1×105 ?cm, or whose main color is blue, whose conductivity type is p-type and whose resistivity is 10 ?cm to 1×105 ?cm. The step (b) preferably includes (b-1) growing an AlInGaN layer having a thickness not thinner than 10 ?m on the conductive SiC substrate by hydride VPE.

Abstract: A magnetic testing apparatus has a magnetizing device applying a rotating magnetic field to a material to be tested, a testing signal detecting device, and a signal processing device applying signal processing to the testing signal. The signal processing device has a first synchronous detecting device detecting a testing signal by using the first current as a reference signal, a second synchronous detecting device detecting an output signal of the first synchronous detecting device by using the second current as a reference signal to extract a candidate flaw signal, and a testing image display device displaying a testing image in which each of pixels has a gray level corresponding to an intensity of the candidate flaw signal at each of positions of the material to be tested, and a phase of the candidate flaw signal at each of the positions is capable of being identified.

Abstract: A compound semiconductor device includes: a conductive SiC substrate; an AlN buffer layer formed on said conductive SiC substrate and containing Cl; a compound semiconductor buffer layer formed on said AlN layer which contains Cl, said compound semiconductor buffer layer not containing Cl; and a device constituent layer or layers formed above said compound semiconductor buffer layer not containing Cl.

Abstract: A compound semiconductor device is provided with a substrate, an AlN layer formed over the substrate, an AlGaN layer formed over the AlN layer and larger in electron affinity than the AlN layer, another AlGaN layer formed over the AlGaN layer and smaller in electron affinity than the AlGaN layer. Furthermore, there are provided an i-GaN layer formed over the latter AlGaN layer, and an i-AlGaN layer and an n-AlGaN layer formed over the i-GaN layer.

Abstract: A compound semiconductor device includes: a conductive SiC substrate; an AlN buffer layer formed on said conductive SiC substrate and containing Cl; a compound semiconductor buffer layer formed on said AlN layer which contains Cl, said compound semiconductor buffer layer not containing Cl; and a device constituent layer or layers formed above said compound semiconductor buffer layer not containing Cl.

Abstract: A nitride semiconductor device includes a substrate, a stacked semiconductor structure formed over the substrate and including a electron channel layer of an undoped nitride semiconductor and an electron supplying layer of an n-type nitride semiconductor formed epitaxially over the electron channel layer, the n-type nitride semiconductor having an electron affinity smaller than an electron affinity of said undoped nitride semiconductor and a two-dimensional electron gas being formed in the electron channel layer along an interface to the electron supply layer, a gate electrode formed over the stacked semiconductor structure in correspondence to a channel region, and source and drain electrodes formed over the stacked semiconductor structure in ohmic contact therewith respectively at a first side and a second side of the gate electrode, the stacked semiconductor structure including, between the substrate and the electron channel layer, an n-type conductive layer and a barrier layer containing Al formed consecu

Abstract: A GaN layer functions as an electron transit layer and is formed to exhibit, at least at a portion thereof, A/B ratio of 0.2 or less obtained by a photoluminescence measurement, where “A” is the light-emission intensity in the 500-600 nm band, and “B” is the light-emission intensity at the GaN band-edge.

Abstract: A compound semiconductor device having a transistor structure, includes a substrate, a first layer formed on the substrate and comprising GaN, a second layer formed over the first layer and containing InN whose lattice constant is larger than the first layer, a third layer formed over the second layer and comprising GaN whose energy bandgap is smaller than the second layer, and a channel region layer formed on the third layer.

Abstract: A semiconductor epitaxial substrate includes: a single crystal substrate; an AlN layer epitaxially grown on the single crystal substrate; and a nitride semiconductor layer epitaxially grown on the AlN layer, wherein an interface between the AlN layer and nitride semiconductor layer has a larger roughness than an interface between the single crystal substrate and AlN layer, and a skewness of the upper surface of the AlN layer is positive.

Abstract: A semiconductor epitaxial substrate includes: a single crystal substrate; an AlN layer epitaxially grown on the single crystal substrate; and a nitride semiconductor layer epitaxially grown on the AlN layer, wherein an interface between the AlN layer and nitride semiconductor layer has a larger roughness than an interface between the single crystal substrate and AlN layer, and a skewness of the upper surface of the AlN layer is positive.

Abstract: A lower electron supply layer is disposed over a lower electron transport layer made of compound semiconductor. The lower electron supply layer is made of n-type compound semiconductor having an electron affinity smaller than that of the lower electron transport layer. An upper electron transport layer is disposed over the lower electron supply layer. The upper electron transport layer is made of compound semiconductor having a doping concentration lower than that of the lower electron supply layer or non-doped compound semiconductor. An upper electron supply layer is disposed over the upper electron transport layer. The upper electron supply layer is made of n-type compound semiconductor having an electron affinity smaller than that of the upper electron transport layer. A source and drain electrodes are disposed over the upper electron supply layer. A gate electrode is disposed over the upper electron supply layer between the source and drain electrodes.

Abstract: A lower electron supply layer is disposed over a lower electron transport layer made of compound semiconductor. The lower electron supply layer is made of n-type compound semiconductor having an electron affinity smaller than that of the lower electron transport layer. An upper electron transport layer is disposed over the lower electron supply layer. The upper electron transport layer is made of compound semiconductor having a doping concentration lower than that of the lower electron supply layer or non-doped compound semiconductor. An upper electron supply layer is disposed over the upper electron transport layer. The upper electron supply layer is made of n-type compound semiconductor having an electron affinity smaller than that of the upper electron transport layer. A source and drain electrodes are disposed over the upper electron supply layer. A gate electrode is disposed over the upper electron supply layer between the source and drain electrodes.