Abstract: A lower electron supply layer is disposed over a lower electron transport layer made of compound semiconductor. The lower electron supply layer is made of n-type compound semiconductor having an electron affinity smaller than that of the lower electron transport layer. An upper electron transport layer is disposed over the lower electron supply layer. The upper electron transport layer is made of compound semiconductor having a doping concentration lower than that of the lower electron supply layer or non-doped compound semiconductor. An upper electron supply layer is disposed over the upper electron transport layer. The upper electron supply layer is made of n-type compound semiconductor having an electron affinity smaller than that of the upper electron transport layer. A source and drain electrodes are disposed over the upper electron supply layer. A gate electrode is disposed over the upper electron supply layer between the source and drain electrodes.

Abstract: A GaN layer functions as an electron transit layer and is formed to exhibit, at least at a portion thereof, A/B ratio of 0.2 or less obtained by a photoluminescence measurement, where “A” is the light-emission intensity in the 500-600 nm band, and “B” is the light-emission intensity at the GaN band-edge.

Abstract: A lower electron supply layer is disposed over a lower electron transport layer made of compound semiconductor. The lower electron supply layer is made of n-type compound semiconductor having an electron affinity smaller than that of the lower electron transport layer. An upper electron transport layer is disposed over the lower electron supply layer. The upper electron transport layer is made of compound semiconductor having a doping concentration lower than that of the lower electron supply layer or non-doped compound semiconductor. An upper electron supply layer is disposed over the upper electron transport layer. The upper electron supply layer is made of n-type compound semiconductor having an electron affinity smaller than that of the upper electron transport layer. A source and drain electrodes are disposed over the upper electron supply layer. A gate electrode is disposed over the upper electron supply layer between the source and drain electrodes.

Abstract: A GaN layer functions as an electron transit layer and is formed to exhibit, at least at a portion thereof, A/B ratio of 0.2 or less obtained by a photoluminescence measurement, where “A” is the light-emission intensity in the 500-600 nm band, and “B” is the light-emission intensity at the GaN band-edge.

Abstract: A semiconductor device includes a substrate, a buffer layer that is formed with an aluminum nitride layer on the substrate and has a film thickness of 5 nm to 40 nm, an operating layer that is formed with a gallium nitride-based semiconductor on the buffer layer, and a control electrode that is formed on the operating layer.

Abstract: A compound semiconductor device includes: a conductive SiC substrate; an AlN buffer layer formed on said conductive SiC substrate and containing Cl; a compound semiconductor buffer layer formed on said AlN layer which contains Cl, said compound semiconductor buffer layer not containing Cl; and a device constituent layer or layers formed above said compound semiconductor buffer layer not containing Cl.

Abstract: A method for manufacturing a compound semiconductor structure, includes (a) selecting a conductive SiC substrate in accordance with color and resistivity and (b) epitaxially growing a GaN series compound semiconductor layer on the selected conductive SiC substrate. The step (a) preferably selects a conductive SiC substrate whose main color is green, whose conductivity type is n-type and whose resistivity is 0.08 ?cm to 1×105 ?cm, or whose main color is black, whose conductivity type is p-type and whose resistivity is 1×103 ?cm to 1×105 ?cm, or whose main color is blue, whose conductivity type is p-type and whose resistivity is 10 ?cm to 1×105 ?cm. The step (b) preferably includes (b-1) growing an AlInGaN layer having a thickness not thinner than 10 ?m on the conductive SiC substrate by hydride VPE.

Abstract: A nitride semiconductor device includes a substrate, a stacked semiconductor structure formed over the substrate and including a electron channel layer of an undoped nitride semiconductor and an electron supplying layer of an n-type nitride semiconductor formed epitaxially over the electron channel layer, the n-type nitride semiconductor having an electron affinity smaller than an electron affinity of said undoped nitride semiconductor and a two-dimensional electron gas being formed in the electron channel layer along an interface to the electron supply layer, a gate electrode formed over the stacked semiconductor structure in correspondence to a channel region, and source and drain electrodes formed over the stacked semiconductor structure in ohmic contact therewith respectively at a first side and a second side of the gate electrode, the stacked semiconductor structure including, between the substrate and the electron channel layer, an n-type conductive layer and a barrier layer containing Al formed consecu

Abstract: A compound semiconductor device having a transistor structure, includes a substrate, a first layer formed on the substrate and comprising GaN, a second layer formed over the first layer and containing InN whose lattice constant is larger than the first layer, a third layer formed over the second layer and comprising GaN whose energy bandgap is smaller than the second layer, and a channel region layer formed on the third layer.

Abstract: A semiconductor epitaxial substrate includes: a single crystal substrate; an AlN layer epitaxially grown on the single crystal substrate; and a nitride semiconductor layer epitaxially grown on the AN layer, wherein an interface between the AlN layer and nitride semiconductor layer has a larger roughness than an interface between the single crystal substrate and AlN layer, and a skewness of the upper surface of the AlN layer is positive.

Abstract: A lower electron supply layer is disposed over a lower electron transport layer made of compound semiconductor. The lower electron supply layer is made of n-type compound semiconductor having an electron affinity smaller than that of the lower electron transport layer. An upper electron transport layer is disposed over the lower electron supply layer. The upper electron transport layer is made of compound semiconductor having a doping concentration lower than that of the lower electron supply layer or non-doped compound semiconductor. An upper electron supply layer is disposed over the upper electron transport layer. The upper electron supply layer is made of n-type compound semiconductor having an electron affinity smaller than that of the upper electron transport layer. A source and drain electrodes are disposed over the upper electron supply layer. A gate electrode is disposed over the upper electron supply layer between the source and drain electrodes.

Abstract: A compound semiconductor device has a buffer layer formed on a conductive SiC substrate, an AlxGa1-xN layer formed on the buffer layer in which an impurity for reducing carrier concentration from an unintentionally doped donor impurity is added and in which the Al composition x is 0<x<1, a GaN-based carrier transit layer formed on the AlxGa1-xN layer, a carrier supply layer formed on the carrier transit layer, a source electrode and a drain electrode formed on the carrier supply layer, and a gate electrode formed on the carrier supply layer between the source electrode and the drain electrode. Therefore, a GaN-HEMT that is superior in device characteristics can be realized in the case of using a relatively less expensive conductive SiC substrate compared with a semi-insulating SiC substrate.

Abstract: It is possible to match a parts model with a two-dimensional drawing. A parts model has shape changing elements whose shapes are changed before and after assembling and other common elements. Three-dimensional shape data on the shapes of the shape changing elements before assembling and their shapes after assembling and the shapes of the common elements are stored as three-dimensional shape data on the parts model in database 12. A calculation unit 14 sets a restriction condition to become a single part between the shapes of the shape changing elements before assembling and the shapes of the common elements for the three-dimensional shape data stored in the database 12 and sets a restriction condition to become a single part between the shapes of the shape changing elements after assembling and the shapes of the common elements, so that three-dimensional shape data is spread into the two-dimensional drawing according to the restriction condition and displayed on the screen of the display unit 16.

Abstract: The semiconductor device comprises a collector layer 14; a base layer 16 of a carbon-doped GaxIn1-xAsySb1-y layer having one surface connected to the collector layer 14; an emitter layer 18 connected the other surface of the base layer 16; a base contact layer 30 of a carbon-doped GaAsSb layer electrically connected to the base layer 16; and a base electrode 32 formed on the base contact layer 30. The semiconductor device of such structure can have a much reduced base resistance RB, whereby InP/GaInAsSb-based HBTs including InP/InGaAs-based HBTs can have higher maximum oscillation frequency fmax. Because of the carbon-doped semiconductor layer the semiconductor device can have higher reliability.

Abstract: A semiconductor device includes a substrate, a buffer layer that is formed with an aluminum nitride layer on the substrate and has a film thickness of 5 nm to 40 nm, an operating layer that is formed with a gallium nitride-based semiconductor on the buffer layer, and a control electrode that is formed on the operating layer.

Abstract: A GaN layer functions as an electron transit layer and is formed to exhibit, at least at a portion thereof, A/B ratio of 0.2 or less obtained by a photoluminescence measurement, where “A” is the light-emission intensity in the 500-600 nm band, and “B” is the light-emission intensity at the GaN band-edge.

Abstract: An eddy current braking apparatus according to the invention comprises: a brake disk (2) connected to a rotary shaft (1); a plurality of permanent magnets (7) arranged so that magnetic pole surfaces are opposed to the brake disk (2); and a drive mechanism for moving the permanent magnets (7) toward and away from the brake disk (2). Preferably, it further comprises a guide sleeve (3) supported by a nonrotatable structural section not connected to the rotary shaft (1), which receives a support ring (4) supporting the permanent magnets (7) and is arranged facing to the brake disk (2). Moreover, in the guide sleeve (3), there are provided ferromagnetic members (8) positioned opposite to the brake disk (2). Alternatively, the whole of said guide sleeve (3) including an end face opposed to said permanent magnets (7) is constructed of nonmagnetic material.

Abstract: A high electron mobility transistor using a Group III-V compound semiconductor comprises an undoped second channel layer laminated on an InP substrate via a buffer layer, an undoped first channel layer laminated on the second channel layer, and a doped electron-supplying layer laminated on the first channel layer. The first channel layer is composed of In1-xGaxAs and has an energy level of conduction band lower than that of the electron-supplying layer at the interface. The second channel layer is composed of a Group III-V compound semiconductor using a Group V element other than P, has an energy level of conduction band higher than that of the first channel layer, and has a band gap wider than that of the first channel layer.

Abstract: A single row rotating-type eddy current braking apparatus for use with a rotor mounted on a powered shaft comprises a support ring, a plurality of magnets, a plurality of ferromagnetic switching plates, and a support body. The switching plates or magnets are capable of rotating with respect to each other to effect braking. The dimensions of the switching plates and angular displacement of the magnets and switching plates are controlled to minimize drag torque when in a non-braking state. The switching plates can be made to rotate and the bearing can be employed in combination with the rotating and stationary components to alleviate problems such as thermal expansion and wear. The apparatus also utilizes a pneumatic cylinder designed to rotate in the direction of the shaft rotation to achieve a braking state, and can employ a single rod double acting cylinder to switch between braking and non-braking states.

Abstract: A high electron mobility transistor using a Group III-V compound semiconductor comprises an undoped second channel layer laminated on an InP substrate via a buffer layer, an undoped first channel layer laminated on the second channel layer, and a doped electron-supplying layer laminated on the first channel layer. The first channel layer is composed of In1−xGaxAs and has an energy level of conduction band lower than that of the electron-supplying layer at the interface. The second channel layer is composed of a Group III-V compound semiconductor using a Group V element other than P, has an energy level of conduction band higher than that of the first channel layer, and has a band gap wider than that of the first channel layer.