Patents by Inventor Kenji Kawai

Kenji Kawai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6666019
    Abstract: An exhaust emission control system of an internal combustion engine capable of post injection is disclosed which provides control such that the injection timing in sub injection is set to a point earlier than the target injection timing when the sub injection is started, and the injection timing in the sub injection is then delayed to the target injection timing. This realizes the post injection under the optimum conditions and enables an efficient rise in the exhaust temperature while inhibiting deterioration of the drivability due to a rapid change in torque.
    Type: Grant
    Filed: March 27, 2002
    Date of Patent: December 23, 2003
    Assignee: Mitsubishi Fuso Truck and Bus Corporation
    Inventors: Toru Kawatani, Kihoko Kaita, Shinichi Saito, Takeshi Hashizume, Junya Watanabe, Kenji Kawai, Satoshi Hiranuma, Yoshinaka Takeda
  • Publication number: 20030217812
    Abstract: A parallel flat plate type plasma etching equipment can supply RF to both the upper electrode 14 and the lower electrode 18. In the plasma etching equipment a metal plate 31 having a ground potential, and having a plurality of openings H in the range of a predetermined area is installed between the upper electrode 14 and the wafer 16 placed on the lower electrode 18. A plasma etching equipment comprises a lower electrode supplied with a high-frequency power and a microwave-introducing window in the location facing said lower electrode. In the plasma etching equipment a metal plate 32 has a ground potential, and has a plurality of openings H in the range of a predetermined area. The metal plate 32 is installed between the microwave-introducing window 26 and the wafer 16 placed on the lower electrode 18.
    Type: Application
    Filed: February 6, 2003
    Publication date: November 27, 2003
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Takahiro Yoshiki, Kenji Kawai
  • Publication number: 20030202610
    Abstract: In a transmission node, a portion of the control information is separated into M (M is an integer) parts of control information blocks having N (N is an integer) bit length. A control information parity having (8-N) bit length is added to control information block i. The control information block is encoded to M parts of control information having 8 bit length according to a predetermined control information bit array. The control information parity and the control information bit array are set such that Hamming distance of each of the control information code is d, and Hamming distance of the control information 10B code is D (d and D are integers). In a receiving node, the control information code is separated into the control information block and the control information parity. Parity check is performed. When an error is detected, error processing is performed.
    Type: Application
    Filed: October 16, 2002
    Publication date: October 30, 2003
    Inventors: Kazuhiko Terada, Kenji Kawai, Osamu Ishida, Haruhiko Ichino
  • Patent number: 6634170
    Abstract: An exhaust emission control system of an internal combustion engine is provided which controls the oxygen concentration of exhaust passing through the exhaust emission control device according to the flow rate of exhaust flowing through an exhaust passage when the exhaust emission control device is regenerated, so that the regeneration is completed within a short period of time while the filter is prevented from being damaged by melting during the regeneration. This improves the exhaust emission control performance and reliability of the filter.
    Type: Grant
    Filed: March 27, 2002
    Date of Patent: October 21, 2003
    Assignee: Mitsubishi Fuso Truck and Bus Corporation
    Inventors: Satoshi Hiranuma, Kihoko Kaita, Shinichi Saito, Takeshi Hashizume, Junya Watanabe, Kenji Kawai, Toru Kawatani, Yoshinaka Takeda
  • Patent number: 6635561
    Abstract: An attempt is made to achieve an upward leap in the capacitance of a capacitor of MIM structure and further improvements in the reliability of a semiconductor device. A method of manufacturing a semiconductor device has a step of forming an amorphous silicon film on the surface of a lower electrode of a capacitor, a step for roughening the silicon film, to thereby form rough polysilicon, and a step for etching metal film of a lower electrode while the rough polysilicon is taken as a mask, thereby roughening the surface of the lower electrode. Through the foregoing steps, the surface of a lower electrode of a capacitor of MIM (metal/insulator/metal) structure is formed roughly, thereby increasing the surface area of the capacitor. Thus, a large-capacitance capacitor of MIM structure can be fabricated.
    Type: Grant
    Filed: July 23, 2001
    Date of Patent: October 21, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kenji Kawai, Hajime Kimura
  • Publication number: 20030182935
    Abstract: An NOx catalyst 17 for selectively reducing NOx in exhaust gas by adsorbing ammonia is provided at an exhaust system of an engine 1, ammonia or urea water is supplied to the NOx catalyst by reducing agent supplying means 29, a consumption amount of ammonia adsorbed to the NOx catalyst is derived by consumption amount deriving means 43 based on an exhaust amount of NOx exhausted from the engine detected or estimated by NOx exhaust amount deriving means 41 and an actual NOx cleaning rate by the NOx catalyst derived by actual NOx cleaning rate deriving means 42, an actual adsorption amount of ammonia adsorbed to the NOx catalyst is derived in accordance with an addition amount of ammonia and the consumption amount of ammonia by adsorption amount deriving means 45 and the reducing agent supplying means is controlled by controlling means 46 in accordance with the actual adsorption amount.
    Type: Application
    Filed: December 27, 2002
    Publication date: October 2, 2003
    Inventors: Kenji Kawai, Yoshinori Takahashi, Shinichi Saito, Toru Kawatani, Yoshinaka Takeda, Ritsuko Shinozaki, Reiko Doumeki, Takeshi Hashizume, Satoshi Hiranuma
  • Publication number: 20030169450
    Abstract: The object of the present invention is, while employing only a simple structure, to engage in rapid communication with an external device and to display results of the communication. According to the present invention, disclosed is an electronic apparatus, which comprises conversion means for converting a target image into image signals, supply means for supplying, to a monitor, signals in consonance with the image signal obtained by the conversion means in order to reproduce the target image, communication means for using a DS-Link method to perform bidirectional communication with an external device handling the image signal for the target image and control means for displaying on the monitor information concerning the external device that is obtained by the communication means.
    Type: Application
    Filed: March 12, 2003
    Publication date: September 11, 2003
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Kenji Kawai
  • Publication number: 20030138735
    Abstract: In a method for forming a resist pattern, the surface of a basic substance-containing underlying film is exposed to a plasma of a carbon-containing gas to modify the surface. A chemically modifying resist film is coated on the underlying film. And the chemically modifying resist is subjected to exposure and development treatments for patterning of the chemically amplifying resist.
    Type: Application
    Filed: July 10, 2002
    Publication date: July 24, 2003
    Inventor: Kenji Kawai
  • Publication number: 20030137051
    Abstract: An anti-reflection coating 5 used at time of forming a first contact hole 6 is interposed between a first insulating layer 4 and a second insulating layer 80, and the anti-reflection coating 5 is served as an etching prevention film for the first insulating layer 4 at time of forming a second contact hole 9 in the second insulating layer 80, whereby an electrical short between a conductive plug and an electrode layer is prevented; an electrical connection between upper and lower conductive plugs is stabilized; and a semiconductor device having a highly reliable contact structure, in which multi-layer conductive plugs are included, is obtainable.
    Type: Application
    Filed: May 18, 2000
    Publication date: July 24, 2003
    Inventor: Kenji Kawai
  • Publication number: 20030105990
    Abstract: Each of relay nodes 51 to 5M adds a no-disturbance notification information or a code error notification monitoring information to a received signal so as to transmit it. When a code error 7E occurs in a section between a relay nodes 5i−1 and 5i, the relay node 5i−1 transmits a signal 2 containing the monitoring information to which the signal 1 which is transmitted from the transmitting node is added at a predetermined period of time to the relay node 5i. When a code error 7E occurs in the above-mentioned section, the signal 2 includes an errored code which is caused by the code error 7E. The relay node 5i adds the monitoring information to the signal 2 at a predetermined period of time. When the errored code which is caused by the above-mentioned code 7E is detected in a predetermined time, the monitoring information is added thereto after a predetermined time passes. A signal 3 to which the monitoring information is added is received at a receiving node.
    Type: Application
    Filed: October 17, 2002
    Publication date: June 5, 2003
    Inventors: Kenji Kawai, Osamu Ishida, Haruhiko Ichino
  • Publication number: 20030054629
    Abstract: A first interconnection is formed in a first interlayer insulating film. An etching stopper film is formed on the first interconnection. On the etching stopper film, a second interlayer insulating film and an anti-reflective coating are successively formed, and a via hole penetrating the second interlayer insulating film and the anti-reflective coating to reach the etching stopper film is formed. An organic film is formed in the via hole, and a trench reaching the organic film is formed in the second insulating film. By removing the anti-reflective coating and the etching stopper film at the bottom portion of the via hole, a portion of the surface of the first interconnection is exposed, and a second interconnection is formed in the trench and the via hole.
    Type: Application
    Filed: May 15, 2002
    Publication date: March 20, 2003
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kenji Kawai, Kenichiro Shiozawa, Yusuke Nakajima
  • Publication number: 20030049020
    Abstract: An image processing apparatus includes an image pickup circuit having a plurality of photographic modes, such as television standards, a compression processing circuit for performing compression processing of an image pickup signal outputted from the image pickup circuit, the compression circuit having a plurality of compression modes, and a selecting circuit for selecting one of the compression modes of the compression processing circuit in accordance with a selected one of the photographic modes of the image pickup circuit.
    Type: Application
    Filed: July 15, 2002
    Publication date: March 13, 2003
    Inventors: Koji Takahashi, Motokazu Kashida, Kenji Kawai
  • Publication number: 20020182876
    Abstract: A semiconductor device etching method and apparatus can be used to etch a silicon insulation film and an underlying film with a high etch selectivity free of a significant variation. The apparatus uses a fluorocarbon type gas as an etching gas to etch a thin film of a semiconductor device placed in a reaction chamber thereof and it includes an etching-gas introduction means introducing the etching gas into the reaction chamber, the reaction chamber in which an etching step is effected, an exhaust means exhausting a gas from the reaction chamber, wherein a substance preventing a polymerization reaction of a fluorocarbon type molecule covers a surface of a portion of the reaction chamber contacting the etching gas.
    Type: Application
    Filed: April 25, 2002
    Publication date: December 5, 2002
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Kenji Kawai
  • Publication number: 20020173150
    Abstract: A wiring layer dry etching method is improved not to reduce electrical characteristics of a semiconductor device. A semiconductor substrate on which a mask for patterning a wiring layer is formed is prepared, in which mask is formed on wiring layer (a first step). Affected layers on a surface of the wiring layer are dry-etched and removed (second step). Wiring layer is dry-etched by using mask (third step). When shifting is performed from the second step to the third step, vacuuming is not performed, and continuous discharge is performed.
    Type: Application
    Filed: April 9, 2002
    Publication date: November 21, 2002
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kenji Kawai, Atsunori Nishiura, Ryoichi Yoshifuku
  • Publication number: 20020157386
    Abstract: An exhaust emission control system of an internal combustion engine is provided which controls the oxygen concentration of exhaust passing through the exhaust emission control device according to the flow rate of exhaust flowing through an exhaust passage when the exhaust emission control device is regenerated, so that the regeneration is completed within a short period of time while the filter is prevented from being damaged by melting during the regeneration. This improves the exhaust emission control performance and reliability of the filter.
    Type: Application
    Filed: March 27, 2002
    Publication date: October 31, 2002
    Inventors: Satoshi Hiranuma, Kihoko Kaita, Shinichi Saito, Takeshi Hashizume, Junya Watanabe, Kenji Kawai, Toru Kawatani, Yoshinaka Takeda
  • Publication number: 20020152744
    Abstract: An exhaust emission control system of an internal combustion engine capable of post injection is disclosed which provides control such that the injection timing in sub injection is set to a point earlier than the target injection timing when the sub injection is started, and the injection timing in the sub injection is then delayed to the target injection timing. This realizes the post injection under the optimum conditions and enables an efficient rise in the exhaust temperature while inhibiting deterioration of the drivability due to a rapid change in torque.
    Type: Application
    Filed: March 27, 2002
    Publication date: October 24, 2002
    Inventors: Toru Kawatani, Kihoko Kaita, Shinichi Saito, Takeshi Hashizume, Junya Watanabe, Kenji Kawai, Satoshi Hiranuma, Yoshinaka Takeda
  • Patent number: 6453120
    Abstract: An image processing apparatus includes an image pickup circuit having a plurality of photographic modes, such as television standards, a compression processing circuit for performing compression processing of an image pickup signal outputted from the image pickup circuit, the compression circuit having a plurality of compression modes, and a selecting circuit for selecting one of the compression modes of the compression processing circuit in accordance with a selected one of the photographic modes of the image pickup circuit.
    Type: Grant
    Filed: June 19, 1996
    Date of Patent: September 17, 2002
    Assignee: Canon Kabushiki Kaisha
    Inventors: Koji Takahashi, Motokazu Kashida, Kenji Kawai
  • Patent number: 6452226
    Abstract: A non-volatile semiconductor memory device and a manufacturing method of the same where an etching residue generating short-circuit between gates is made harmless or a device is miniaturized are obtained. The method includes the steps of forming on a semiconductor substrate, a first gate layer and a second gate layer, forming a second gate electrode by etching the second gate layer, forming a first gate electrode by etching the first gate layer using the second gate electrode as a mask, and removing a residue left on a step portion by isotropic etching.
    Type: Grant
    Filed: February 23, 2001
    Date of Patent: September 17, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kenji Kawai, Hajime Kimura, Kazuyuki Ohmi
  • Publication number: 20020114390
    Abstract: There are provided image coding apparatus and method in which image data is inputted, a continuous change is given to the input image data, the image data is coded, a coding condition when coding the input image data is controlled in accordance with the continuous changing process, and the image data is coded.
    Type: Application
    Filed: March 9, 1998
    Publication date: August 22, 2002
    Inventors: KENJI KAWAI, KOJI TAKAHASHI
  • Patent number: 6410991
    Abstract: A relatively thick gate oxide film and a relatively thin gate oxide film are formed on a surface of silicon substrate. In a region exactly under the relatively thick gate oxide film, a halogen is added only within a depth range of no more than 2 nm from the main surface of silicon substrate. Thus, a semiconductor device having a dual gate oxide and a method of manufacturing the same can be obtained capable of reducing damage to the substrate through a simplified process.
    Type: Grant
    Filed: November 20, 1998
    Date of Patent: June 25, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kenji Kawai, Kazumasa Yonekura