Abstract: In a method of forming a phase-change memory device, a variable resistance member may be formed on a s semiconductor substrate having a contact region, and a first electrode may be formed to contact a first portion of the variable resistance member and to be electrically connected to the contact region. A second electrode may be formed so as to contact a second portion of the variable resistance member.

Abstract: In a method of forming a phase-change memory device, a variable resistance member may be formed on a s semiconductor substrate having a contact region, and a first electrode may be formed to contact a first portion of the variable resistance member and to be electrically connected to the contact region. A second electrode may be formed so as to contact a second portion of the variable resistance member.

Abstract: A portable die cleaning apparatus and method are provided The apparatus is capable of performing a plasma cleaning process for a surface of a die using plasma discharge generated in a reaction chamber that is defined on the die, without separating the die. The portable die cleaning apparatus includes a frame with an open lower face to define a reaction chamber facing the surface of the die between the surface of the die and the frame itself when the frame is seated on the die and an active electrode that is placed at a position opposite to the die in a state where the die is electrically grounded, and receives electric power from an external power supply to generate plasma in the reaction chamber.

Abstract: A phase change memory includes a word line disposed on a semiconductor substrate and a cell diode that physically contacts the semiconductor substrate and a corresponding word line. The word line may be formed of a metal, such as tungsten. Accordingly, no metal contact is included and the word line formed of metal is in contact with the cell diode.

Abstract: A nonvolatile memory device includes a semiconductor substrate of a first conductivity type, a plurality of word lines on the semiconductor substrate, each the plurality of word lines including a floating gate of a second conductivity type. A ground select line and a string select line are disposed on respective sides of word lines. An impurity region of the second conductivity type underlies a first word line adjacent the ground select line. The device may further include a second impurity region of the second conductivity type underlying a second word line adjacent the string select line. In still further embodiments, the device may further include third impurity regions of the second conductivity type underlying respective third word lines between the first word line and the second word line. Methods of forming such devices are also provided.

Abstract: In one aspect, a memory device is provided which includes a plurality of bit lines extending in a first direction, a plurality of word lines extending in a second direction, an array of programmable volumes electrically connected between the bit lines and word lines, and thermally conductive striped patterns located between the programmable volumes of the array and extending in at least one of the first and second directions.

Abstract: A transistor includes a gate electrode on a substrate, source/drain regions in the substrate at both sides of the gate electrode, and a channel region defined between the source/drain regions, wherein the channel region includes a recessed region and at least one of the source/drain regions is spaced away from the recessed region of the channel region.

Abstract: Disclosed herein are an apparatus and method for manufacturing a balloon catheter in which a non-contact type laser perforator and printer are separately provided above a primary extruder such that inflation apertures can be uniformly perforated through a non-vulcanized lumen tube and simultaneously, tube cutting positions can be printed on the lumen tube at positions uniformly spaced apart from the inflation apertures without stopping a primary extrusion process. Also, a bond preventing agent layer is coated on the lumen tube at balloon inflating portions prior to cutting the tube, to facilitate a secondary extrusion of the tube. With this configuration, continuous and accurate perforation of inflation apertures is possible and automatic tube cutting can be achieved based on the printed tube cutting positions. Also, the present invention can compensate for a time delay due to a bond preventing agent application process and achieve high productivity and minimized loss of material.

Abstract: In an embodiment, an image sensor includes an isolation layer disposed in a semiconductor substrate to define a first active region and a second active region extending from the first active region. A photodiode is disposed in a portion of the first active region. A floating diffusion region is provided in the second active region at a position spaced apart from the photodiode. A transfer gate electrode is disposed on the second active region between the photodiode and the floating diffusion region. The transfer gate electrode is disposed to cover both sidewalls and an upper portion of the second active region. The transfer gate electrode has a region extending onto the first active region and overlapping the photodiode. The photodiode has a protrusion into the second active region at the portion adjacent to the transfer gate electrode. A deep n-impurity region of the photodiode extends in the protrusion.

Abstract: A phase-change memory device may include first and second spaced apart conductive electrodes, and a phase-change memory element coupled between the first and second conductive electrodes. More particularly, a first portion of the phase-change memory element may have a first cross-sectional area along a current path between the first and second conductive electrodes, and a second portion of the phase-change memory element may have a second cross-sectional area along the current path between the first and second conductive electrodes. Moreover, the first and second cross-sectional areas may be different.

Abstract: The present invention provide a catheter which exhausts a humor such as a hematoma, a brain fluid, and an encephalophyma smoothly without any infection, and be able to inject a hematoma resolvent while maintaining a constant brain pressure, and is inserted into an accurate operative portion in the cranial cavity using a brain stereotactic frame conveniently and easily. The catheter 100 includes a long tube 110 made of an atoxic, transparent and flexible material; a two-way fitting 160 having two channels and inserted into a rear portion of the tube through a fitting 120; second and third coupling members 140 and 150 selectively coupled to a branched channel of the two-way fitting 160; an injection member 170 including a needle portion 174 inserted into a rear portion of the third coupling member 150 through an inserting hole 153; and a fourth coupling member 180 including a seal member 181 and being inserted into a reception groove 171 formed in a rear portion of the injection member 170.

Abstract: In a method of forming a phase-change memory device, a variable resistance member may be formed on a s semiconductor substrate having a contact region, and a first electrode may be formed to contact a first portion of the variable resistance member and to be electrically connected to the contact region. A second electrode may be formed so as to contact a second portion of the variable resistance member.

Abstract: A phase-change memory device may include first and second spaced apart conductive electrodes, and a phase-change memory element coupled between the first and second conductive electrodes. More particularly, a first portion of the phase-change memory element may have a first cross-sectional area along a current path between the first and second conductive electrodes, and a second portion of the phase-change memory element may have a second cross-sectional area along the current path between the first and second conductive electrodes. Moreover, the first and second cross-sectional areas may be different.

Abstract: A phase change memory includes a plurality of word lines, a plurality of bits lines intersecting the word lines, and a plurality of memory cells arranged in rows along the word lines and located at corresponding intersection regions of the word lines and bit lines. Each of the memory cells includes a cell transistor having a gate connected to a corresponding word line, and a resistor and a phase change cell connected in series between a drain of the cell transistor and a corresponding bit line. In order to increase a cell drive current, the phase change memory also includes a plurality of auxiliary transistors respectively connected between the drains of the cell transistors of adjacent said memory cells.

Abstract: A method of extracting the interconnection capacitance of a semiconductor integrated circuit is provided. An interconnection structure composed of a plurality of signal lines and dummy conductive patterns disposed between the signal lines is made into data. Data on interconnection structure primitives, which are made by changing portions of the dummy patterns into high-k dielectric materials is generated based on the interconnection structure data. Capacitance of the interconnection structure is then extracted by inputting data on the interconnection structure primitives to an RC extractor and operating the data. According to this method, extracting interconnection capacitance is easily applied to various types of RC extractors. Moreover, the time required to extract the interconnection capacitance is reduced.

Abstract: A phase change memory includes a plurality of word lines, a plurality of bits lines intersecting the word lines, and a plurality of memory cells arranged in rows along the word lines and located at corresponding intersection regions of the word lines and bit lines. Each of the memory cells includes a cell transistor having a gate connected to a corresponding word line, and a resistor and a phase change cell connected in series between a drain of the cell transistor and a corresponding bit line. In order to increase a cell drive current, the phase change memory also includes a plurality of auxiliary transistors respectively connected between the drains of the cell transistors of adjacent said memory cells.

Abstract: The present invention relates to a method for making a silicon balloon catheter in which a first tube having its outer diameter slightly smaller than that of a desired catheter is formed by an extruding method, mold lubricant is coated at a portion of a balloon injection opening, a thin film type second tube is formed at the coated outer surface of the first tube by a second extruding, and then the catheter is vulcanized and cut. As a result, when liquid is injected to an expansion tube, the second tube is separated from the first tube, thereby performing a function as a balloon.

Abstract: The present invention provide a catheter which exhausts a humor such as a hematoma, a brain fluid, and an encephalophyma smoothly without any infection, and be able to inject a hematoma resolvent while maintaining a constant brain pressure, and is inserted into an accurate operative portion in the cranial cavity using a brain stereotactic frame conveniently and easily. The catheter 100 includes a long tube 110 made of an atoxic, transparent and flexible material; a two-way fitting 160 having two channels and inserted into a rear portion of the tube through a fitting 120; second and third coupling members 140 and 150 selectively coupled to a branched channel of the two-way fitting 160; an injection member 170 including a needle portion 174 inserted into a rear portion of the third coupling member 150 through an inserting hole 153; and a fourth coupling member 180 including a seal member 181 and being inserted into a reception groove 171 formed in a rear portion of the injection member 170.

Abstract: A method of extracting the interconnection capacitance of a semiconductor integrated circuit is provided. An interconnection structure composed of a plurality of signal lines and dummy conductive patterns disposed between the signal lines is made into data. Data on interconnection structure primitives, which are made by changing portions of the dummy patterns into high-k dielectric materials is generated based on the interconnection structure data. Capacitance of the interconnection structure is then extracted by inputting data on the interconnection structure primitives to an RC extractor and operating the data. According to this method, extracting interconnection capacitance is easily applied to various types of RC extractors. Moreover, the time required to extract the interconnection capacitance is reduced.

Abstract: A method of calculating capacitance between conductive patterns of an integrated circuit (IC) by defining a mesh of nodes in a space between at least two electrodes, calculating the electric potential at each node, and then calculating the parasitic capacitance between the electrodes.