Abstract: A gate wire including a gate line and a gate electrode is formed on a substrate and a gate insulating layer is formed on the substrate. A semiconductor pattern and an etching assistant pattern are formed on the gate insulating layer and a source/drain conductor pattern and an etching assistant layer are formed on the semiconductor pattern and the etching assistant pattern. A data wire including a data line and source and drain electrodes separated from each other is formed by removing the etching assistant layer and partly removing the source/drain conductor pattern. A pixel electrode connected to the drain electrodes is formed.

Abstract: In an organic thin film transistor (TFT) substrate, the organic TFT substrate includes gate lines, data lines, a gate electrode, a source electrode, a drain electrode, a gate insulating layer, an organic semiconductor layer, and an organic protective layer. The gate and data lines are insulated from each other and cross each other to define pixel areas. The gate electrode is connected to the gate line. The source electrode is connected to the data line. The drain electrode faces the source electrode with the gate electrode disposed therebetween. The gate insulating layer covers the gate electrode and exposes a portion of the source and drain electrodes. The organic semiconductor layer contacts the source and drain electrodes. The organic protective layer is disposed on the organic semiconductor layer to protect the organic semiconductor layer.

Abstract: A display device capable of minimizing leakage of a voltage applied to a storage line, comprising an insulating substrate; a first metal wiring layer which is formed on the insulating substrate; a storage line which is isolated from the first metal wiring layer and formed along the first metal wiring layer; a first insulating film which covers the first metal wiring layer and the storage line; a second metal wiring layer which is formed on the first insulating film and comprises a storage capacity forming layer corresponding to the storage line; a second insulating film which covers the second metal wiring layer and comprises a pixel contact hole exposing a portion of the storage capacity forming layer; and a pixel electrode which is formed on the second insulating film and connected to the storage capacity forming layer via the pixel contact hole.

Abstract: A data processor receives sets of input image data having respective input grays and outputs sets of output image data having respective output grays. Each set of output image data corresponds to one of the plurality of sets of input image data and have more image data than each set of the input image data. A data driver supplies the pixels with data voltages corresponding to the output image data supplied from the data processor. A set of output grays corresponding to a set of input grays are selected from sets of grays, each set of grays giving an average front transmittance substantially equal to an average front transmittance of the set of input grays. The sets of output grays generate the closest average lateral gamma curve generated by the sets of grays relative to an average front gamma curve generated by the input grays.

Abstract: A method for fabricating a flat panel display, comprising preparing an insulating substrate; forming separated source and drain electrodes on the insulating substrate to define a channel region; forming a first passivation layer on the source and drain electrodes; forming a metal layer having an opening corresponding to the channel region on the first passivation layer; forming a deposition opening in the passivation layer by using the metal layer as a mask to expose the channel region; forming an organic semiconductor layer and a second passivation layer, in turn, in the deposition opening and on the metal layer; and removing the metal layer, the organic semiconductor layer and the second passivation layer while allowing the layers formed in the deposition opening to remain.

Abstract: An organic thin film transistor (OTFT) array panel includes a substrate, a data line formed on the substrate, a source electrode connected with the data line, a drain electrode, including a portion facing the source electrode, an insulating layer formed on the source electrode and the drain electrode and having an opening and a contact hole, an organic semiconductor positioned in the opening and at least partially contacting the source electrode and the drain electrode, a gate insulator formed on the organic semiconductor, a stopper formed on the gate insulator, a gate line crossing over the data line and including a gate electrode formed on the stopper, and a pixel electrode connected to the drain electrode through the contact hole.

Abstract: In a display apparatus and a method of manufacturing the display apparatus, a gate line, a data line, and a plurality of layers are formed on an array substrate on which a pixel area, a pad area, and a peripheral area are defined. During the forming processes of the gate line, the data line, and the layers, the gate line and the data line are partially exposed in the peripheral area, or contact portions formed on the gate line and the data line in the peripheral area are exposed. Thus, the gate line and the data line may be tested using the contact portions as electrical terminals during the manufacturing process of the display apparatus.

Abstract: The invention provides a flat panel display having an insulating substrate; a data line formed on the insulating substrate; an interlayer insulating film formed on the data line having a first contact opening exposing the data line; a connecting member formed in a part of the first contact opening; an interlayer insulating film around the first contact opening; a gate insulating film formed on the connecting member having a second contact opening exposing the connecting member; and an organic semiconductor layer formed on the gate insulating film.

Abstract: A thin film transistor array panel includes an insulating substrate, a first conductive layer disposed on the insulating substrate, an organic semiconductor disposed between the source electrode and the drain electrode, a gate insulating layer disposed on the organic semiconductor, and a second conductive layer disposed on the gate insulating layer. The first conductive layer includes a data line, a source electrode connected to the data line, a drain electrode spaced apart from the source electrode, and a pixel electrode connected to the drain electrode and formed of the same layer as the drain electrode, and the second conductive layer includes a gate line and a gate electrode connected to the gate line.

Abstract: In a method of fabricating a thin film transistor array substrate for a liquid crystal display, a gate line assembly is formed on a substrate with a chrome-based under-layer and an aluminum alloy-based over-layer while proceeding in the horizontal direction. The gate line assembly has gate lines, and gate electrodes, and gate pads. A gate insulating layer is deposited onto the insulating substrate such that the gate insulating layer covers the gate line assembly. A semiconductor layer and an ohmic contact layer are sequentially formed on the gate insulating layer. A data line assembly is formed on the ohmic contact layer with a chrome-based under-layer and an aluminum alloy-based over-layer. The data line assembly has data lines crossing over the gate lines, source electrodes, drain electrodes, and data pads. A protective layer is deposited onto the substrate, and patterned to thereby form contact holes exposing the drain electrodes, the gate pads, and the data pads.

Abstract: A method for manufacturing an organic thin film transistor array panel includes forming a data line including a source electrode and a drain electrode apart from the data line on a substrate and forming a bank insulating layer including a first opening and a second opening on the data line and the drain electrode. An organic semiconductor is formed in the first opening, sequential deposition is performed of an insulating material layer and a metal layer on the bank insulating layer and the organic semiconductor. A first passivation layer is formed on the metal layer which is etched using the first passivation layer as an etch mask to form a gate line including a gate electrode. The insulating material layer is etched using the first passivation layer as an etch mask to form a gate insulating layer. A second passivation layer is formed on the first passivation layer and a pixel electrode is formed on the second passivation layer.

Abstract: An organic thin film transistor substrate for a display device includes a gate line, a data line insulated from the gate line, at least two organic thin film transistors, each of which is connected between the gate line and the data line, and both of which are commonly connected to a main drain electrode, and a pixel electrode connected to the main drain electrode.

Abstract: A liquid crystal display is provided, which includes: a plurality of pixel row groups, each pixel row group including at least one pixel row that includes a plurality of pixels arranged in a matrix and including switching elements; a plurality of gate lines connected to the switching elements and transmitting a gate-on voltage for turning on the switching elements; and a plurality of data lines connected to the switching elements and transmitting data voltages, wherein the switching elements in adjacent pixel row groups are connected to the data lines at opposite sides.

Abstract: Disclosed herein are a display device to prevent light from being incident to a thin film transistor, and a method of manufacturing the same. An electrophoretic device includes a first substrate including a display area and a non-display area, a first thin film transistor connected to a gate line and a data line disposed in the display area, a driving circuit including a second thin film transistor disposed in the non-display area, a plurality of microcapsules disposed on the first substrate and including charged pigment particles, and a first light shielding layer overlapping a channel region of the second thin film transistor and disposed between the second thin film transistor and the microcapsules.

Abstract: An organic thin film transistor array panel, for an embodiment, includes a plurality of pixel electrodes formed on a top layer to cover organic thin film transistors, with display areas defined by the areas of the pixel electrodes. Accordingly, the aperture ratio of the display device may be increased. A ratio of width to length (W/L) in a channel of an organic thin film transistor may be increased, and thereby on current (Ion) of the organic thin film transistor may be increased. The organic semiconductor may be prevented from overflowing while being formed in holes by an inkjet printing method such that deterioration of thin film transistor characteristics and pixel defects is prevented. The adhesive of the electrophoretic sheet is prevented from penetrating into the organic semiconductor when the electrophoretic display is formed by attaching the electrophoretic sheet to the organic thin film transistor array panel by a lamination method.

Abstract: A thin film transistor array panel according to an embodiment of the present invention includes: a gate line; a data line intersecting the gate line; a thin film transistor connected to the gate line and the data line; a pixel electrode connected to the thin film transistor; and a shielding electrode electrically isolated from the data line, covering the data line at least in part, and having an aperture exposing the data line.

Abstract: A method for a thin film transistor array panel includes forming a gate line and a pixel electrode on a substrate, forming a gate insulating layer covering the gate line, forming a data line including a source electrode and a drain electrode on the gate insulating layer, forming an interlayer insulating layer covering the data line and the drain electrode on the gate insulating layer, forming a first opening in the interlayer insulating layer, forming an organic semiconductor in the first opening, forming a passivation layer on the organic semiconductor and the interlayer insulating layer, and forming a second opening in the interlayer insulating layer to expose the pixel electrode.

Abstract: A transistor includes a wire formed on a substrate, the wire comprising a semiconductor core, a first cover enclosing a portion of the semiconductor core, and a second cover enclosing the first cover, a first electrode formed on the second cover of the wire, an insulating layer formed on the first electrode and having contact holes exposing portions the semiconductor core, and a second electrode and a third electrode connected to the wire through the contact holes.

Abstract: A liquid crystal display is provided, which includes: a plurality of pixel row groups, each pixel row group including at least one pixel row that includes a plurality of pixels arranged in a matrix and including switching elements; a plurality of gate lines connected to the switching elements and transmitting a gate-on voltage for turning on the switching elements; and a plurality of data lines connected to the switching elements and transmitting data voltages, wherein the switching elements in adjacent pixel row groups are connected to the data lines at opposite sides.

Abstract: A thin film transistor array panel according to an embodiment of the present invention includes: a gate line; a data line intersecting the gate line; a thin film transistor connected to the gate line and the data line; a pixel electrode connected to the thin film transistor; and a shielding electrode electrically isolated from the data line, covering the data line at least in part, and having an aperture exposing the data line.