Abstract: Methods and apparatuses related to federated search of multiple sources with conflict resolution are disclosed. A method may comprise obtaining a set of data ontologies (e.g., types, properties, and links) associated with a plurality of heterogeneous data sources; receiving a selection of a graph comprising a plurality of graph nodes connected by one or more graph edges; and transforming the graph into one or more search queries across the plurality of heterogeneous data sources. A method may comprise obtaining a first data object as a result of executing a first search query across a plurality of heterogeneous data sources; resolving, based on one or more resolution rules, at least the first data object with a repository data object; deduplicating data associated with at least the first data object and the repository data object prior to storing the deduplicated data in a repository that has a particular data model.

Abstract: The present disclosure provides a method based on an android system for displaying a three-dimension interface, including: a three-dimension engine library transmitting a user operation command to an android system service layer; the android system service layer transmitting the user operation command to a java terminal; the java terminal generating a responding instruction according to the user operation command and sending the responding instruction to the android system service layer; the android system service layer sending the responding instruction to the three-dimension engine library; and the three-dimension engine library controlling a three-dimension model document to load a three-dimension model corresponding to the responding instruction and redrawing the three-dimension interface accordingly. In the present disclosure, with the android system service layer, a decline of processing ability when the system resources are overloaded in an instant can be avoided.

Abstract: An extreme ultraviolet light system includes an optical amplifier system and a catalytic conversion system. Each optical amplifier of the optical amplifier system includes a gain medium in the form of a gas mixture that produces an amplified light beam. The optical amplifier system includes a fluid input and a fluid output through which the gas mixture flows. The catalytic conversion system is fluidly connected to the fluid output of the optical amplifier system and to the fluid input of the optical amplifier system. The catalytic conversion system includes a catalytic converter that includes a housing; a substrate within the housing including openings through which the gas mixture can flow; and a catalyst applied as a coating to the interior surfaces of the openings of the substrate, the catalyst including particles of metal. The particles of metal can be nanoparticles of precious metal.

Abstract: An extreme ultraviolet light system includes an optical amplifier system and a catalytic conversion system. Each optical amplifier of the optical amplifier system includes a gain medium in the form of a gas mixture that produces an amplified light beam. The optical amplifier system includes a fluid input and a fluid output through which the gas mixture flows. The catalytic conversion system is fluidly connected to the fluid output of the optical amplifier system and to the fluid input of the optical amplifier system. The catalytic conversion system includes a catalytic converter that includes a housing; a substrate within the housing including openings through which the gas mixture can flow; and a catalyst applied as a coating to the interior surfaces of the openings of the substrate, the catalyst including particles of metal. The particles of metal can be nanoparticles of precious metal.

Abstract: A transcutaneous multimodal delivery device for drug delivery and the methods of making and using the same are provided.

Abstract: Techniques are disclosed that allow for power conservation in integrated circuit memories, such as SRAM. The techniques can be embodied in circuitry that allows for floating of bitlines to eliminate or otherwise reduce power leakage associated with precharging bitlines. For instance, the techniques can be embodied in a bitline floating circuit having a single logic gate for qualifying the precharge control signal with a wake signal, so that precharging of the bitline does not occur if the wake signal is not in an active state. The techniques further allow for the elimination or reduction of unnecessary power consumption by the I/O circuitry or the memory array, such as when the memory array is not being accessed or when the array or a portion thereof is permanently disabled for yield recovery.

Abstract: A method for moving MS in the manner of the least packet loss can be divided into two steps. In the first step, when the MS is still connected to the source CN node and is running the effective loads, the MS prepares the routing information pointing at the target CN node. In the second step, the connection between the source CN node and the RAN node is released, the MS ID, the context data and the mobile information are transmitted to the target CN node. Then, a new connection between the target CN node and the RAN node is established. The step is completed synchronously and rapidly to minimize the packet loss. When establishing a new connection, the routing information transmitted to the MS before is used so that a new CN node is pointed at.

Abstract: A locking device (1) comprising at least one locking mechanism (2) having a catch (3), a pivotal first pawl (4), and a second pawl (5), with which the first pawl (4) can be blocked from being swiveled. The locking device (1) further comprises a motor-driven actuating mechanism (6), which displaces at least one operating lever (7) in such a manner that the operating lever (7), during its movement cooperates with both pawls (4, 5) one after the other. The locking device is used to lock or unlock seat backs of motor vehicles.

Abstract: The present disclosure provides a method based on an android system for displaying a three-dimension interface, including: a three-dimension engine library transmitting a user operation command to an android system service layer; the android system service layer transmitting the user operation command to a java terminal; the java terminal generating a responding instruction according to the user operation command and sending the responding instruction to the android system service layer; the android system service layer sending the responding instruction to the three-dimension engine library; and the three-dimension engine library controlling a three-dimension model document to load a three-dimension model corresponding to the responding instruction and redrawing the three-dimension interface accordingly. In the present disclosure, with the android system service layer, a decline of processing ability when the system resources are overloaded in an instant can be avoided.

Abstract: A phase shift keyed demodulator includes first and second beam splitters, a first optical path, a second optical path, and a wavelength tuner. The first beam splitter splits an input signal into first and second output signals. The second beam splitter splits each first and second output signal into a transmitted signal and a reflected signal. The first optical path includes an optical path of each transmitted signal from a beam splitting surface to a reflector and back to the beam splitting surface. The second optical path includes an optical path of each reflected signal from the beam splitting surface to a mirror surface and back to the beam splitting surface. A path difference introduces a delay between the transmitted signal and the reflected signal. The wavelength tuner tunes the demodulator to a predetermined central wavelength and introduces a phase shift between first and second transmitted signals.

Abstract: A memory cell includes a fuse and at least one transistor. The transistor is used to control the programming or sensing of the fuse. A program voltage is applied to a stack of first and second conductive layers. A first portion of the stack couples the program voltage to a terminal of the transistor in a cell. A second portion of the stack couples the program voltage to a terminal of the transistor in another cell.

Abstract: A hierarchical DRAM sensing apparatus and method which employs local bit line pairs and global bit lines. A word line selects the cells in a cluster of sense amplifiers, each of the amplifiers being associated with a pair of bit lines. One of the local bit lines is selected for coupling to global bit lines and a global sense amplifier. Clusters are located in a plurality of subarrays forming a bank with the global bit lines extending from each of the banks to the global sense amplifier.

Abstract: Techniques and circuitry are disclosed for efficiently implementing programmable memory array circuit architectures, such as PROM, OTPROM, and other such programmable non-volatile memories. The circuitry employs an antifuse scheme that includes an array of memory bitcells, each containing a program device and an antifuse element configured with current path isolation well and for storing the memory cell state. The bitcell configuration, which can be used in conjunction with column/row select circuitry, power selector circuitry, and/or readout circuitry, allows for high-density memory array circuit designs and layouts.

Abstract: A method of displaying an image defined by an input video signal on a backlit video device accommodates changes of luminance between successive frames of the input video signal. Changes of luminance distribution, which is a function of a distribution of pixel luminance values in the frames, between the successive frames are detected. Target adjustments to luminance of the backlight and to light transmission of the image panel for a current frame of the input video signal are defined to compensate luminance of the displayed image for the adjustment to luminance of the backlight. Actual adjustments to luminance of the backlight and to light transmission of the image panel for the current frame are functions of the target adjustments for the current frame and of the actual adjustments for a previous frame in proportions, which are a function of the changes detected of luminance distribution between successive frames.

Abstract: A transcutaneous multimodal delivery device for drug delivery and the methods of making and using the same are provided.

Abstract: A method for moving MS in the manner of the least packet loss can be divided into two steps. In the first step, when the MS is still connected to the source CN node and is running the effective loads, the MS prepares the routing information pointing at the target CN node. In the second step, the connection between the source CN node and the RAN node is released, the MS ID, the context data and the mobile information are transmitted to the target CN node. Then, a new connection between the target CN node and the RAN node is established. The step is completed synchronously and rapidly to minimize the packet loss. When establishing a new connection, the routing information transmitted to the MS before is used so that a new CN node is pointed at.

Abstract: A locking device (1) comprising at least one locking mechanism (2) having a catch (3), a pivotal first pawl (4), and a second pawl (5), with which the first pawl (4) can be blocked from being swiveled. The locking device (1) further comprises a motor-driven actuating mechanism (6), which displaces at least one operating lever (7) in such a manner that the operating lever (7), during its movement cooperates with both pawls (4, 5) one after the other. The locking device is used to lock or unlock seat backs of motor vehicles.

Abstract: A process of forming a semiconductive capacitor device for a memory circuit includes forming a first capacitor cell recess and a second capacitor cell recess that are spaced apart by a capacitor cell boundary of a first height. The process includes lowering the first height of the capacitor cell boundary to a second height. A common plate capacitor bridges between the first recess and the second recess over the boundary above the second height and below the first height.

Abstract: Techniques are disclosed for reducing area needed for implementing a memory array, such as SRAM arrays. The techniques may be embodied, for example, in a memory array design that includes a sense amplifier configured to operate in a reading mode for readout of memory cells and a writing mode for writing to memory cells. In addition, a common column multiplexer can be used for both read and write functions (as opposed to having separate multiplexers for reading and writing).

Abstract: Techniques are disclosed that allow for power conservation in integrated circuit memories, such as SRAM. The techniques can be embodied in circuitry that allows for floating of bitlines to eliminate or otherwise reduce power leakage associated with precharging bitlines. For instance, the techniques can be embodied in a bitline floating circuit having a single logic gate for qualifying the precharge control signal with a wake signal, so that precharging of the bitline does not occur if the wake signal is not in an active state. The techniques further allow for the elimination or reduction of unnecessary power consumption by the I/O circuitry or the memory array, such as when the memory array is not being accessed or when the array or a portion thereof is permanently disabled for yield recovery.