Patents by Inventor KHANG CHOONG YONG

KHANG CHOONG YONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170093064
    Abstract: A board-edge interconnection module features integrated capacitive coupling, which enables a board design employing the module to avoid having AC capacitors and flexible cables with bulky connectors. The recovered real estate enables further miniaturization, enabling the component to be used on a wide variety of devices, including ultra-mobile computing devices.
    Type: Application
    Filed: September 24, 2015
    Publication date: March 30, 2017
    Inventors: JACKSON CHUNG PENG KONG, ENG HUAT GOH, BOK ENG CHEAH, SU SIN FLORENCE PHUN, KHANG CHOONG YONG, MIN KEEN TANG
  • Publication number: 20170091131
    Abstract: A universal interconnection scheme enables system architecture modularization with a hot-pluggable external computing module, such as a PC-on-a-card device using USB type-C technology. With the flexibility to interchange the system computing module with an external module, system performance can be augmented to fulfill the essential needs of the user, whether the system is a portable low-power tablet device, a smartphone, a wearable device such as an Internet of Things device, or a high-performance PC.
    Type: Application
    Filed: September 24, 2015
    Publication date: March 30, 2017
    Inventors: KHANG CHOONG YONG, KHAI ERN SEE, AMIT KUMAR SRIVASTAVA, JACKSON CHUNG PENG KONG, TEONG KEAT BEH, ENG HUAT GOH
  • Patent number: 9606949
    Abstract: A universal interconnection scheme enables system architecture modularization with a hot-pluggable external computing module, such as a PC-on-a-card device using USB type-C technology. With the flexibility to interchange the system computing module with an external module, system performance can be augmented to fulfill the essential needs of the user, whether the system is a portable low-power tablet device, a smartphone, a wearable device such as an Internet of Things device, or a high-performance PC.
    Type: Grant
    Filed: September 24, 2015
    Date of Patent: March 28, 2017
    Assignee: INTEL CORPORATION
    Inventors: Khang Choong Yong, Khai Ern See, Amit Kumar Srivastava, Jackson Chung Peng Kong, Teong Keat Beh, Eng Huat Goh
  • Patent number: 9552995
    Abstract: Some example forms relate to an electrical interconnect for an electronic package. The electrical interconnect includes a dielectric layer that includes a trench formed into one surface of the dielectric layer and a signal conductor that fills the trench and extends above the one surface of dielectric layer. The electrical interconnect further includes a conductive reference layer mounted on an opposing side of the dielectric layer. The conductive reference layer is electromagnetically coupled to the signal conductor when current passes through the signal conductor.
    Type: Grant
    Filed: November 26, 2014
    Date of Patent: January 24, 2017
    Assignee: Intel Corporation
    Inventors: Khang Choong Yong, Bok Eng Cheah, Teong Keat Beh, Howard L. Heck, Jackson Chung Peng Kong, Stephen H. Hall, Kooi Chi Ooi
  • Publication number: 20160370181
    Abstract: Methods and systems may provide for a gyratory sensing system (GSS) for extending the human machine interface (HMI) of an electronic device, particularly small form factor, wearable devices. The gyratory sensing system may include a gyratory sensor and a rotatable element to engage the gyratory sensor. The rotatable element may be sized and configured to be easily manipulated by hand to extend the HMI of the electronic device such that the functions of the HMI may be more accessible. The rotatable element may include one or more rotatable components, such as a body, edge or face of a smart watch, that each may be configured to perform a function upon rotation, such as resetting, selecting, and/or activating a menu item.
    Type: Application
    Filed: June 16, 2015
    Publication date: December 22, 2016
    Applicant: Intel Corporation
    Inventors: Khang Choong Yong, Wil Choon Song, Howard L. Heck, Su Sin Florence Phun
  • Patent number: 9489333
    Abstract: Methods and apparatus relating to an adaptive termination scheme for a low power, high speed bus are described. In an embodiment, logic at least partially causes termination of a portion (e.g., one or more transmission lines) of an interconnect. The logic adaptively optimizes the number of lines that are to be terminated based on one or more operating conditions of the interconnect. Other embodiments are also disclosed.
    Type: Grant
    Filed: September 27, 2014
    Date of Patent: November 8, 2016
    Assignee: Intel Corporation
    Inventors: Khang Choong Yong, Wil Choon Song, Howard L. Heck
  • Patent number: 9455752
    Abstract: Described is an apparatus which comprises: a pre-driver coupled to a transmitter, the transmitter having a differential output; and a tuning circuit operable to couple to the differential output to tune the pre-driver of the transmitter according to a common mode noise signature of a common mode signal derived from the differential output.
    Type: Grant
    Filed: September 11, 2014
    Date of Patent: September 27, 2016
    Assignee: Intel Corporation
    Inventors: Khang Choong Yong, Boon Ping Koh, Amit Kumar Srivastava, Wil Choon Song
  • Publication number: 20160174374
    Abstract: An interconnect topology that includes vertical trench routing in a substrate is disclosed. In one embodiment, the interconnect comprises a substrate having a plurality of layers including a first ground plane layer; a pair of signal conductors that form a differential signal pair, each conductor of the pair of signal conductors having a first portion and a second portion, the second portion extending from the first portion into at least one of the plurality of layers, wherein width of the second portion is less than width of the first portion; and wherein the first ground plane layer is only a first partial layer and has a first void region that is closer to the pair of signal conductors than the first partial layer.
    Type: Application
    Filed: December 12, 2014
    Publication date: June 16, 2016
    Inventors: Jackson Kong, Bok Eng Cheah, Khang Choong Yong, Howard L. Heck, Kuan-Yu Chen
  • Publication number: 20160148866
    Abstract: Some example forms relate to an electrical interconnect for an electronic package. The electrical interconnect includes a dielectric layer that includes a trench formed into one surface of the dielectric layer and a signal conductor that fills the trench and extends above the one surface of dielectric layer. The electrical interconnect further includes a conductive reference layer mounted on an opposing side of the dielectric layer. The conductive reference layer is electromagnetically coupled to the signal conductor when current passes through the signal conductor.
    Type: Application
    Filed: November 26, 2014
    Publication date: May 26, 2016
    Inventors: Khang Choong Yong, Bok Eng Cheah, Teong Keat Beh, Howard L. Heck, Jackson Chung Peng Kong, Stephen H. Hall, Kooi Chi Ooi
  • Publication number: 20160092392
    Abstract: Methods and apparatus relating to an adaptive termination scheme for a low power, high speed bus are described. In an embodiment, logic at least partially causes termination of a portion (e.g., one or more transmission lines) of an interconnect. The logic adaptively optimizes the number of lines that are to be terminated based on one or more operating conditions of the interconnect. Other embodiments are also disclosed.
    Type: Application
    Filed: September 27, 2014
    Publication date: March 31, 2016
    Applicant: Intel Corporation
    Inventors: KHANG CHOONG YONG, WIL CHOON SONG, HOWARD L. HECK
  • Publication number: 20160080007
    Abstract: Described is an apparatus which comprises: a pre-driver coupled to a transmitter, the transmitter having a differential output; and a tuning circuit operable to couple to the differential output to tune the pre-driver of the transmitter according to a common mode noise signature of a common mode signal derived from the differential output.
    Type: Application
    Filed: September 11, 2014
    Publication date: March 17, 2016
    Inventors: KHANG CHOONG YONG, BOON PING KOH, AMIT KUMAR SRIVASTAVA, WIL CHOON SONG