Abstract: Methods and systems may provide for a gyratory sensing system (GSS) for extending the human machine interface (HMI) of an electronic device, particularly small form factor, wearable devices. The gyratory sensing system may include a gyratory sensor and a rotatable element to engage the gyratory sensor. The rotatable element may be sized and configured to be easily manipulated by hand to extend the HMI of the electronic device such that the functions of the HMI may be more accessible. The rotatable element may include one or more rotatable components, such as a body, edge or face of a smart watch, that each may be configured to perform a function upon rotation, such as resetting, selecting, and/or activating a menu item.

Abstract: To overcome the problem of the fiber weave effect desynchronizing differential signals in a pair of traces of approximately the same length in a printed circuit board, the pair of traces can be routed to traverse largely parallel paths that are above one another in the printed circuit board. The material between the paths can include weaved fiber bundles. The material on opposite sides of the paths, surrounding the pair of traces and the weaved fiber bundles, can include resin-rich material. As a result, the pair of traces are directly adjacent to the same materials, which can allow signals in the traces to propagate at the same speed, and prevent desynchronization of differential signals traversing the paths. The path length difference associated with traversing to different depths can be compensated with a relatively small in-plane diagonal jog of one of the traces.

Abstract: Methods and systems may provide for a gyratory sensing system (GSS) for extending the human machine interface (HMI) of an electronic device, particularly small form factor, wearable devices. The gyratory sensing system may include a gyratory sensor and a rotatable element to engage the gyratory sensor. The rotatable element may be sized and configured to be easily manipulated by hand to extend the HMI of the electronic device such that the functions of the HMI may be more accessible. The rotatable element may include one or more rotatable components, such as a body, edge or face of a smart watch, that each may be configured to perform a function upon rotation, such as resetting, selecting, and/or activating a menu item.

Abstract: In embodiments, a device may include a single electromagnetic interference (EMI) shield plate that defines an enclosed area. The EMI shield plate may have an inner surface and an outer surface opposite the inner surface. The device may further include a first printed circuit board (PCB) coupled with the inner surface, wherein the first PCB is within the enclosed area. Other embodiments may be described and/or claimed.

Abstract: Embodiments are generally directed to a mutual inductance suppressor for crosstalk immunity enhancement. An embodiment of a printed circuit board includes a first signal trace and a second signal trace on a first layer, wherein the first signal trace and second signal trace are non-intersecting; a second layer below the first layer, the second layer including a voltage reference plane; and a mutual inductance suppressor in the voltage reference plane, the mutual inductance suppressor including a serpentine portion of the voltage reference plane between the first signal trace and the second signal trace.

Abstract: Embodiments of the present disclosure describe integrated circuit (IC) package assemblies having a stiffener that extends beyond a package substrate outer edge, computing devices incorporating the IC package assemblies, methods for formation of the IC package assemblies, and associated configurations. An IC package assembly may include a package substrate having a first side, a second side opposite the first side, and an outer edge extending between the first side and the second side; an IC die coupled with the first side of the package substrate, where the IC die includes a power terminal; a stiffener coupled with the first side of the package substrate, where the stiffener surrounds the IC die and includes a conductive routing region coupled with the IC die power terminal, and a passive electronic device coupled with the conductive routing region. Other embodiments may be described and/or claimed.

Abstract: To overcome the problem of the fiber weave effect desynchronizing differential signals in a pair of traces of approximately the same length in a printed circuit board, the pair of traces can be routed to traverse largely parallel paths that are above one another in the printed circuit board. The material between the paths can include weaved fiber bundles. The material on opposite sides of the paths, surrounding the pair of traces and the weaved fiber bundles, can include resin-rich material. As a result, the pair of traces are directly adjacent to the same materials, which can allow signals in the traces to propagate at the same speed, and prevent desynchronization of differential signals traversing the paths. The path length difference associated with traversing to different depths can be compensated with a relatively small in-plane diagonal jog of one of the traces.

Abstract: The technique described herein includes a device to address the electrical performance (e.g. signal integrity) degradation ascribed to electromagnetic interference and/or crosstalk coupling occur at tightly coupled (e.g. about 110 ?m pitch or less) interconnects, including the first level (e.g. the interconnection between a die and a package substrate). In some embodiments, this invention provides a conductive layer with a plurality of cavities to isolate electromagnetic coupling and/or interference between adjacent interconnects for electronic device performance scaling. In some embodiments, at least one interconnect joint is coupled to the conductive layer, and at least one interconnect joint is isolated from the conductive layer by a dielectric lining at least one of the cavities, the conductive layer being associated to a ground reference voltage by the interconnect joint coupled to the conductive layer.

Abstract: Capacitive interconnects and processes for fabricating the capacitive interconnects are provided. In some embodiments, the capacitive interconnect includes first metal layers, second metal layers; and dielectric layers including a dielectric layer that intercalates a first metal layer of the first metal layers and a second metal layer of the second metal layers. Such layers can be assembled in a nearly concentric arrangement, where the dielectric layer abuts the first metal layer and the second metal layer abuts the dielectric layer. In addition, the capacitive interconnect can include a first electrode electrically coupled to at least one of the first metal layers, and a second electrode electrically coupled to at least one of the second metal layers, the second electrode assembled opposite to the first electrode. The first electrode and the second electrode can include respective solder tops.

Abstract: An electronic device and associated methods are disclosed. In one example, the electronic device includes a first device and a second device coupled to a surface of a substrate, and a continuous flexible shield woven over the first device and under the second device to separate the first device from the second device. In selected examples, the continuous flexible shield may be formed from a laminate and one or more of the devices may be coupled through an opening or via in the continuous flexible shield.

Abstract: An apparatus is provided which comprises: a crystal having an input and an output; a first interconnect line having first and second ends, wherein the first end is coupled to the input; a second interconnect line having first and second ends, wherein the first end is coupled to the output; a first capacitor coupled to the input and ground; and a second capacitor coupled to the second end of the second interconnect line. An apparatus is provided which comprises: a high pass filter; a pair of AC coupling capacitors coupled to the high pass filter; a low pass filter coupled to the pair of AC coupling capacitors; and an analog to digital converter (ADC) coupled to the low pass filter.

Abstract: Methods and apparatus relating to integrating System in Package (SiP) with Input/Output (IO) board for platform miniaturization are described. In an embodiment, a SiP board includes a plurality of logic components. An IO board is coupled to the SiP board via a grid array. The plurality of logic components is provided on both sides of the SiP board and one or more of the plurality of logic components are to positioned in an opening in the IO board. Other embodiments are also disclosed and claimed.

Abstract: Apparatus and methods are provided for ameliorating distortion issues associated with a conductor that passes over a void in a reference plane. In an example, the signal conductor can include a first part routed over the major surface of a first side of the reference plane structure on a first side of the void and that approaches a first edge of the reference plane structure with a first trajectory, a second part routed over the major surface of the reference plane structure on a second side of the void and that approaches a second edge of the reference plane structure with a second trajectory, and a third portion connecting the first portion with the second portion, the third portion spanning the void, and having a plurality of spurs extending from a body of the third portion.

Abstract: Embodiments herein disclose techniques for apparatuses and methods for making a slot antenna on a PCB with a cutout. A PCB may include a metal layer. The metal layer may include a cavity to be a first radiating element of an antenna, and a slot to be a second radiating element of the antenna. In addition, the cavity may extend to be the cutout of the PCB through other layers of the PCB. The first and second radiating elements may provide a determined transmission frequency for the antenna. The metal layer may further include a portion of a transmission line of the antenna, and the transmission line is in contact with the cavity and the slot. A package may be affixed to the PCB, where a portion of the package may be within the cutout of the PCB. Other embodiments may be described and/or claimed.

Abstract: A system for board-to-board interconnect is described herein. The system includes a first printed circuit board (PCB) having a first recess along a first edge of the first PCB that exposes a first solder pad on a layer of the first PCB. The system also includes a second PCB having a second recess along a second edge of the second PCB that exposes a second solder pad on a layer of the second PCB. The second recess is complementary to the first recess to allow the first PCB to mate with the second PCB. The first solder pad is aligned with the second solder pad when the first PCB is mated with the second PCB. The system additionally includes an assembly configured to electronically couple the first solder pad with the second solder pad.

Abstract: A semiconductor apparatus includes a floating-bridge interconnect that couples two semiconductive devices that are arranged across a middle semiconductive device. The floating-bridge interconnect can be semiconductive material such as a silicon bridge, or it can be an organic bridge. Computing functions required in one of the two semiconductive devices can be off-loaded to any of the floating-bridge interconnect or the other of the two semiconductive devices.

Abstract: Described is an apparatus which comprises: a pre-driver coupled to a transmitter, the transmitter having a differential output; and a tuning circuit operable to couple to the differential output to tune the pre-driver of the transmitter according to a common mode noise signature of a common mode signal derived from the differential output.

Abstract: Methods and apparatus relating to integrating System in Package (SiP) with Input/Output (IO) board for platform miniaturization are described. In an embodiment, a SiP board includes a plurality of logic components. An IO board is coupled to the SiP board via a grid array. The plurality of logic components is provided on both sides of the SiP board and one or more of the plurality of logic components are to positioned in an opening in the IO board. Other embodiments are also disclosed and claimed.

Abstract: Methods and systems may provide for a gyratory sensing system (GSS) for extending the human machine interface (HMI) of an electronic device, particularly small form factor, wearable devices. The gyratory sensing system may include a gyratory sensor and a rotatable element to engage the gyratory sensor. The rotatable element may be sized and configured to be easily manipulated by hand to extend the HMI of the electronic device such that the functions of the HMI may be more accessible. The rotatable element may include one or more rotatable components, such as a body, edge or face of a smart watch, that each may be configured to perform a function upon rotation, such as resetting, selecting, and/or activating a menu item.

Abstract: Described herein are microelectronics packages and methods for manufacturing the same. The microelectronics package may include a transmitter, a receiver, and a package stiffening element. The package stiffening element may be in electrical communication with the transmitter and the receiver. The package stiffening element may be configured to act as an antenna for both the transmitter and the receiver.