Patents by Inventor Khoi A. Phan

Khoi A. Phan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030052084
    Abstract: A system for monitoring and controlling aperture etching in an alternating aperture phase shift mask is provided. The system includes one or more light sources, each light source directing light to one or more apertures etched on a mask. Light reflected from the apertures is collected by a measuring system, which processes the collected light. The collected light is indicative of properties including the depth, width and/or profile of the openings on the mask. The measuring system provides such depth, width and/or profile related data to a processor that determines the acceptability of the aperture and/or the mask. The system also includes a plurality of etching devices associated with etching apertures in the mask. The processor may selectively control the etching devices so as to regulate aperture etching.
    Type: Application
    Filed: September 18, 2001
    Publication date: March 20, 2003
    Inventors: Cyrus E. Tabery, Khoi A. Phan, Bharath Rangarajan, Bhanwar Singh, Ramkumar Subramanian
  • Patent number: 6535288
    Abstract: The present invention is directed to a system and a method for controlling a thin film formation on a moving substrate as part of a process for manufacturing an integrated circuit. The invention involves the use of scatterometry to control the thin film formation process by analyzing the thin film on the moving substrate comprising an optical indicia and a periodic analysis structure in a periodic manner. The optical indicia is spatially associated with the periodic analysis structure and is utilized in conjunction with a signaling system to determine a position of the moving substrate, whereby a repeatable analysis of a corresponding location on the moving substrate can be performed. Scatterometry permits in-situ measurements of thin film formation progress, whereby thin film formation process conditions can be controlled in a feedback loop to obtain a targeted result. Scatterometry can also be facilitated by providing a grating pattern on a non-production portion of the substrate.
    Type: Grant
    Filed: July 10, 2001
    Date of Patent: March 18, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bharath Rangarajan, Michael K. Templeton, Bhanwar Singh, Khoi A. Phan
  • Patent number: 6533865
    Abstract: The present invention relates to a method of eliminating microbubbles associated with a developer solution. The method includes depositing the developer solution over an exposed photoresist film which overlies a substrate and agitating the developer solution using waves. The agitation of the developer solution causes the microbubbles to exit the developer solution and reduces defects previously associated therewith. In addition, a system for eliminating microbubbles associated with a developer solution is disclosed. The system includes an apparatus for applying the developer solution to a photoresist film which overlies a substrate and a developer agitation system. The developer agitation system is operably coupled to the developer solution and agitates the developer solution using waves, which causes the microbubbles to exit the developer solution.
    Type: Grant
    Filed: March 8, 2000
    Date of Patent: March 18, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Khoi A. Phan, Bharath Rangarajan
  • Patent number: 6510730
    Abstract: A system and method for evaluating optical proximity corrected (OPC) designs is provided. The system includes an AFM measurement system for performing measurements relating to a segment of a feature pattern corresponding to a predetermined OPC mask feature. The measurement system is configured to determine a first image for the segment of the printed feature based upon the measurements. The measurement system compares the first image with another image corresponding to different OPC design to evaluate performance characteristics of the respective OPC designs.
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: January 28, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Khoi Phan, Ramkumar Subramanian, Bhanwar Singh
  • Patent number: 6513151
    Abstract: A method for new product mask evaluation is provided. Focus exposure matrices are printed at one or more layers (e.g., active gate) on full flow production wafers. The focus exposure matrices are then analyzed to produce data that facilitates detecting printed defects. The full flow production wafers are also subjected to end of line electrical testing to determine bit level errors. Print defects can be correlated with bit level errors to increase confidence in detected defects. The method includes a hierarchy of testing layers, each of which produce data that can be employed in detecting defects in a reticle and/or producing a yield analysis. The method involves scanning a reticle upon which the new product mask is etched and performing a printability simulation to determine what affect, if any, detected reticle defects will have on printing defects on a wafer.
    Type: Grant
    Filed: February 26, 2001
    Date of Patent: January 28, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Jeff Erhardt, Khoi Phan
  • Patent number: 6507474
    Abstract: One aspect of the present invention elates to a method of reducing electrostatic charges on a patterned photoresist to improve evaluation of the developed photoresist, involving the steps of evaluating the patterned photoresist to determine if electrostatic charges exist thereon; positioning an ionizer near the patterned photoresist, the ionizer generating ions thereby reducing the electrostatic charges on the patterned photoresist; and evaluating the patterned photoresist with an electron beam.
    Type: Grant
    Filed: June 19, 2000
    Date of Patent: January 14, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bhanwar Singh, Ramkumar Subramanian, Khoi A. Phan, Bryan K. Choo, Bharath Rangarajan
  • Patent number: 6486072
    Abstract: A system and method are disclosed for facilitating removal of a defect from a substrate. A charge is applied at the surface of substrate, such as in the form of an ionized gas, to weaken attractive forces between the defect and the substrate. As a result of weakening the attractive forces, a suitable defect removal system may be employed to remove the defect.
    Type: Grant
    Filed: November 10, 2000
    Date of Patent: November 26, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Khoi A. Phan, Bharath Rangarajan, Bhanwar Singh
  • Patent number: 6479820
    Abstract: In one embodiment, the present invention relates to a method of processing a photoresist on a semiconductor structure, involving the steps of exposing and developing the photoresist; evaluating the exposed and developed photoresist to determine if negative charges exist thereon; contacting the exposed and developed photoresist with a positive ion carrier thereby reducing any negative charges thereon; and evaluating the exposed and developed photoresist with an electron beam.
    Type: Grant
    Filed: April 25, 2000
    Date of Patent: November 12, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bhanwar Singh, Ramkumar Subramanian, Bharath Rangarajan, Khoi A. Phan, Bryan K. Choo
  • Publication number: 20020160281
    Abstract: The present invention relates to a system and method of modifying mask layout data to improve the fidelity of mask manufacture. The system and method include determining the difference between the mask layout design and the mask features as written, and generating sizing corrections. The sizing corrections can be used to modify the mask layout data, and/or stored in a database.
    Type: Application
    Filed: June 20, 2002
    Publication date: October 31, 2002
    Inventors: Ramkumar Subramanian, Khoi A. Phan, Bhanwar Singh, Bharath Rangarajan
  • Publication number: 20020142493
    Abstract: A system and method are disclosed for providing in-situ monitoring of thin film thickness, such as by employing a non-destructive optical measurement technique. The monitored film thickness may be employed to help achieve a desired feature film thickness and uniformity across a surface of a substrate. By monitoring film thickness during semiconductor processing, for example, one or more process control parameters may be adjusted to help achieve a desired film thickness and/or uniformity thereof.
    Type: Application
    Filed: April 2, 2001
    Publication date: October 3, 2002
    Inventors: Arvind Halliyal, Khoi A. Phan, Bhanwar Singh
  • Patent number: 6459482
    Abstract: The present invention provides SEM systems, SEM calibration standards, and SEM calibration methods that improved accuracy in critical dimension measurements. The calibration standards have features formed with an amorphous material such as amorphous silicon. Amorphous materials lack the crystal grain structure of materials such as polysilicon and are capable of providing sharper edged features and higher accuracy patterns than grained materials. The amorphous material can be bound to a silicon wafer substrate through an intermediate layer of material, such as silicon dioxide. Where the intermediate layer is insulating material, as is silicon dioxide, the intermediate layer may be patterned with gaps to provide for electrical communication between the amorphous silicon and the silicon wafer. Charges imparted to the amorphous silicon during electron beam scanning may thereby drain to the silicon wafer rather than accumulating to a level where they would distort the electron beam.
    Type: Grant
    Filed: December 4, 2000
    Date of Patent: October 1, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bhanwar Singh, Ramkumar Subramanian, Khoi A. Phan, Bharath Rangarajan, Michael K. Templeton, Sanjay K. Yedur, Bryan K. Choo
  • Patent number: 6453916
    Abstract: An edge bead removal system and method is provided that employs a nozzle for applying edge bead removal solvent to an edge bead of a photoresist material layer disposed on a wafer. The nozzle eliminates solvent splash by lowering the angle of dispense to less than 20° as well as providing more degrees of freedom to the nozzle arm adjustments. Adjustment screws and a built-in protractor provide precision in setting the application angle. The nozzle includes a clamp design having a nozzle body clamp which holds the nozzle and a main shaft with a protractor assembly for up and down angle adjustments. A support bracket is coupled to the protractor assembly and allows for pivoting and side to side movement of the protractor assembly and the support bracket with respect to one another. A clamp connects a main arm structure that moves the entire edge bead removal nozzle assembly over the wafer.
    Type: Grant
    Filed: June 23, 2000
    Date of Patent: September 24, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Quang Tran, Khoi Phan
  • Patent number: 6451512
    Abstract: In one embodiment, the present invention relates to a method of processing an ultrathin resist, involving the steps of depositing the ultra-thin photoresist over a semiconductor substrate, the ultra-thin resist having a thickness less than about 3,000 Å; irradiating the ultra-thin resist with electromagnetic radiation having a wavelength of about 250 nm or less; developing the ultra-thin resist; and contacting the ultra-thin resist with a silicon containing compound in an environment of at least one of ultraviolet light and ozone, wherein contact of the ultra-thin resist with the silicon containing compound is conducted between irradiating and developing the ultra-thin resist or after developing the ultra-thin resist.
    Type: Grant
    Filed: May 1, 2000
    Date of Patent: September 17, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bharath Rangarajan, Ramkumar Subramanian, Khoi A. Phan, Bhanwar Singh, Michael K. Templeton, Sanjay K. Yedur, Bryan K. Choo
  • Patent number: 6444381
    Abstract: One aspect of the present invention relates to a method for reducing carbon contamination on a mask involving placing a mask plate having carbon-containing contaminants thereon in a processing chamber; simultaneously contacting the mask plate with oxygen and exposing the mask plate with a flood exposure of electron beams wherein the carbon-containing contaminants are converted to a by-product; and removing the by-product from the processing chamber.
    Type: Grant
    Filed: December 4, 2000
    Date of Patent: September 3, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bhanwar Singh, Ramkumar Subramanian, Michael K. Templeton, Bharath Rangarajan, Khoi A. Phan, Bryan K. Choo, Sanjay K. Yedur
  • Patent number: 6444373
    Abstract: The present invention relates to a system and method of modifying mask layout data to improve the fidelity of mask manufacture. The system and method include determining the difference between the mask layout design and the mask features as written, and generating sizing corrections. The sizing corrections can be used to modify the mask layout data, and/or stored in a database.
    Type: Grant
    Filed: June 16, 2000
    Date of Patent: September 3, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Ramkumar Subramanian, Khoi A. Phan, Bhanwar Singh, Bharath Rangarajan
  • Patent number: 6441398
    Abstract: A method for contact hole formation and inspection during integrated circuit fabrication is disclosed. The method includes defining tolerances for one or more contact hole formation processes, and then performing the formation processes to create at least one contact hole. After at least one of the formation processes is performed, a waveform is generated for the contact hole. A critical dimension (CD) and an edge width value are then generated for the contact hole from the waveform. The CD and the edge width value are then compared to the tolerances to detect and correct variations in the formation process. In a further aspect of the present invention, the edge width is compared to a predetermined limit to automatically detect contact holes having sloped sidewalls.
    Type: Grant
    Filed: June 27, 2001
    Date of Patent: August 27, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Jean Yang, Ian Dudley, Khoi Phan
  • Patent number: 6423479
    Abstract: In one embodiment, the present invention relates to a method of processing a lithography mask, involving the steps of exposing a lithography substrate with actinic radiation through the lithography mask in a chamber; removing the lithography mask from the chamber, wherein the lithography mask contains carbon contaminants; and contacting the lithography mask with sulfur trioxide thereby reducing the carbon contaminants thereon.
    Type: Grant
    Filed: January 31, 2000
    Date of Patent: July 23, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Ramkumar Subramanian, Khoi A. Phan, Bharath Rangarajan, Bhanwar Singh, Sanjay K. Yedur, Bryan K. Choo
  • Patent number: 6373053
    Abstract: A system is provided for detecting scumming in a wafer. The system includes an analysis system for providing a signal corresponding to a surface portion of the wafer and a processing system operatively coupled to the analysis system. The processing system is configured to determine a shape of at least a portion of the signal and, the processing system detects scumming in the wafer based upon the shape of at least a portion of the signal.
    Type: Grant
    Filed: January 31, 2000
    Date of Patent: April 16, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bryan K. Choo, Bhanwar Singh, Sanjay K. Yedur, Khoi A. Phan
  • Patent number: 6371134
    Abstract: In one embodiment, the present invention relates to a method of processing a semiconductor structure, involving the steps of providing the semiconductor structure having a patterned resist thereon; stripping the patterned resist from the semiconductor structure, wherein an amount of carbon containing resist debris remain on the semiconductor structure; and contacting the semiconductor structure with ozone thereby reducing the amount of carbon containing resist debris thereon.
    Type: Grant
    Filed: January 31, 2000
    Date of Patent: April 16, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Ramkumar Subramanian, Khoi A. Phan, Bharath Rangarajan, Bhanwar Singh, Sanjay K. Yedur, Bryan K. Choo
  • Patent number: 6339955
    Abstract: The present invention relates to a method of determining a film thickness and comprises identifying a depth associated with a defect in an underlying material and forming the film over the underlying material. The method further comprises identifying a depth associated with the defect in the film and then using the identified depths to determine the film thickness. The present invention also relates to a system for determining a film thickness and comprises a defect inspection tool operable to identify a location of one or more defects in an underlying material and a topology measurement tool operable to measure a change in topology of a surface. The system also comprises a controller operably coupled to the defect inspection tool and the topology measurement tool.
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: January 22, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Khoi A. Phan, Bharath Rangarajan, Bhanwar Singh