Abstract: Stack packages are provided. The stack package includes a substrate having first and second bond fingers and a plurality of semiconductor chips stacked on the substrate. Each of the plurality of semiconductor chips has an input bonding pad and an output bonding pad. A first interconnection electrically connects the first bond finger to the input bonding pad of a lowermost semiconductor chip of the plurality of semiconductor chips. A second interconnection electrically connects the output bonding pad of a lower semiconductor chip of the plurality of semiconductor chips to the input bonding pad of an upper semiconductor chip stacked on the lower semiconductor chip. A third interconnection electrically connects the output bonding pad of an uppermost semiconductor chip of the plurality of semiconductor chips to the second bond finger.

Abstract: A multilayer ceramic electronic component includes a hexahedral ceramic body including dielectric layers and having first and second main surfaces opposing each other in a thickness direction, first and second end surfaces opposing each other in a length direction, and first and second side surfaces opposing each other in a width direction; first and second internal electrodes stacked to have the dielectric layer interposed therebetween within the ceramic body and alternately exposed through the first and second end surfaces; and first and second external electrodes electrically connected to the first and second internal electrodes, respectively, and including first and second head parts formed on the first and second end surfaces, wherein width of the first and second head parts is less than width of the ceramic body, and when length, width and thickness of the ceramic body are defined as L, W, and T, respectively, T/W>1.0 is satisfied.

Abstract: A substrate processing apparatus that simultaneously forms thin films on a plurality of substrates and performs heat treatment includes: a plurality of substrate holders, each including a substrate support that supports a substrate and a first gas pipe having one or a plurality of injection holes; a boat where the plurality of substrate holders are stacked and including a second gas pipe connected with the first gas pipe of each of the substrate holders; a process chamber providing a space in which the substrates stacked in the boat are processed; a conveying unit that carries the boat into/out of the process chamber; a first heating unit disposed outside the process chamber; and a gas supply unit including a third gas pipe connected with the second gas pipe and supplying a heated or cooled gas into the second gas pipe.

Abstract: A method of forming a polycrystalline silicon layer, a thin film transistor (TFT), an organic light emitting diode (OLED) display device having the same, and methods of fabricating the same. The method of forming a polycrystalline silicon layer includes providing a substrate, forming a buffer layer on the substrate, forming an amorphous silicon layer on the buffer layer, forming a groove in the amorphous silicon layer, forming a capping layer on the amorphous silicon layer, forming a metal catalyst layer on the capping layer, and annealing the substrate and crystallizing the amorphous silicon layer into a polycrystalline silicon layer.

Abstract: A magnetron unit moving apparatus for preventing magnetization and magnetron sputtering equipment having the same. The magnetron unit moving apparatus includes a magnetron unit disposed adjacent to a target, to generate a specific magnetic field, and a movement unit to space the magnetron unit and the target apart such that a strength of a magnetic field generated over the target is within a predetermined reference strength range. It is possible to space the target and the magnetron unit apart so as to prevent the target from being magnetized when a process is not performed.

Abstract: An apparatus and a method for mining temporal pattern are provided. A method for mining temporal pattern includes generating a data pattern group comprising data patterns from sequential data, generating a candidate pattern group comprising candidate patterns from the data pattern group, calculating a support value for a candidate pattern in a candidate pattern group based on a discrepancy value of the candidate pattern, and determining whether the candidate pattern satisfies a predetermined pattern requirement, based on the calculated support value.

Abstract: A deposition apparatus, and a canister for the deposition apparatus capable of maintaining a predetermined amount of source material contained in a reactive gas supplied to a deposition chamber when the source material is deposited on a substrate by atomic layer deposition includes a main body, a source storage configured to store a source material, a heater disposed outside the main body, and a first feed controller configured to control the source material supplied to the main body from the source storage.

Abstract: A method of manufacturing a thin film transistor (TFT) comprises forming a buffer layer, an amorphous silicon layer, and an insulating layer on a substrate; crystallizing the amorphous silicon layer as a polycrystalline silicon layer; forming a semiconductor layer and a gate insulating layer which have a predetermined shape by simultaneously patterning the polycrystalline silicon layer and the insulating layer; forming a gate electrode including a first portion and a second portion by forming and patterning a metal layer on the gate insulating layer. The first portion is formed on the gate insulating layer and overlaps a channel region of a semiconductor layer, and the second portion contacts the semiconductor layer. A source region and a drain region are formed on the semiconductor layer by doping a region of the semiconductor layer. The region excludes the channel region overlapping the gate electrode and constitutes a region which does not overlap the gate electrode.

Abstract: A thin film transistor (TFT) includes a semiconductor on a substrate; an ohmic contact overlapping at least a portion of the semiconductor; a source electrode and a drain electrode on the ohmic contact; a gate insulating layer covering the semiconductor; and a gate electrode overlapping the semiconductor and between the source electrode and the drain electrode on the gate insulating layer, wherein the gate electrode is laterally separated from the drain electrode by a first distance and is laterally separated from the source electrode by a second distance.

Abstract: A method of forming a polycrystalline silicon layer includes forming a first amorphous silicon layer and forming a second amorphous silicon layer such that the first amorphous silicon layer and the second amorphous silicon layer have different film qualities from each other, and crystallizing the first amorphous silicon layer and the second amorphous silicon layer using a metal catalyst to form a first polycrystalline silicon layer and a second polycrystalline silicon layer. A thin film transistor includes the polycrystalline silicon layer formed by the method and an organic light emitting device includes the thin film transistor.

Abstract: A dielectric ceramic composition includes: a base material powder BamTiO3 (0.995?m?1.010); 0.2 to 2.0 moles of a first accessory ingredient, an oxide or carbide containing at least one of Ba and Ca, based on 100 moles of the base material powder; a second accessory ingredient, an oxide containing Si or a glass compound containing Si; 0.2 to 1.5 moles of a third accessory ingredient, an oxide containing at least one of Sc, Y, La, Ac, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu, based on 100 moles of the base material powder; and 0.05 to 0.80 mole of a fourth accessory ingredient, an oxide containing at least one of Cr, Mo, W, Mn, Fe, Co, and Ni, based on 100 moles of the base material powder, a content ratio of the first accessory ingredient to the second accessory ingredient being 0.5 to 1.7.

Abstract: A method of manufacturing a TFT, including forming a buffer layer, an amorphous silicon layer, an insulating layer, and a first conductive layer on a substrate, forming a polycrystalline silicon layer by crystallizing the amorphous silicon layer, forming a semiconductor layer, a gate insulating layer, and a gate electrode that have a predetermined shape by simultaneously patterning the polycrystalline silicon layer, the insulating layer, and the first conductive layer, wherein the polycrystalline silicon layer is further etched to produce an undercut recessed a distance compared to sidewalls of the insulating layer and the first conductive layer, forming source and drain regions within the semiconductor layer by doping corresponding portions of the semiconductor layer, forming an interlayer insulating layer on the gate electrode, the interlayer insulating layer covering the gate insulating layer and forming source and drain electrodes that are electrically connected to source and drain regions respectively.

Abstract: A thin film transistor may include a substrate, a buffer layer on the substrate, a semiconductor layer formed on the buffer layer, a gate insulating pattern on the semiconductor layer, a gate electrode on the gate insulating pattern, an interlayer insulating layer covering the gate electrode and the gate insulating pattern, the interlayer insulating layer having a contact hole and an opening extending therethrough, the contact hole exposing a source area and a drain area of the semiconductor layer, and the opening exposing a channel area of the semiconductor layer, and a source electrode and a drain electrode formed on the interlayer insulating layer, the source electrode being connected with the source area and the drain electrode being connected with the drain area of the semiconductor layer.

Abstract: There are provided a dielectric composition and a multilayer ceramic electronic component using the same, the dielectric composition including dielectric grains having a perovskite structure represented by ABO3, wherein the dielectric grain includes a base material, in which at least one rare earth element RE is solid-solubilized in at least one of A and B, and a transition element TR, and a ratio (TR/RE) of the transition element to the rare earth element is 0.2 to 0.8.

Abstract: A method of fabricating a polycrystalline silicon layer includes: forming an amorphous silicon layer on a substrate; crystallizing the amorphous silicon layer into a polycrystalline silicon layer using a crystallization-inducing metal; forming a metal layer pattern or metal silicide layer pattern in contact with an upper or lower region of the polycrystalline silicon layer corresponding to a region excluding a channel region in the polycrystalline silicon layer; and annealing the substrate to getter the crystallization-inducing metal existing in the channel region of the polycrystalline silicon layer to the region in the polycrystalline silicon layer having the metal layer pattern or metal silicide layer pattern. Accordingly, the crystallization-inducing metal existing in the channel region of the polycrystalline silicon layer can be effectively removed, and thus a thin film transistor having an improved leakage current characteristic and an OLED display device including the same can be fabricated.

Abstract: A method of manufacturing a thin film transistor (TFT), a TFT manufactured by the method, a method of manufacturing an organic light-emitting display apparatus that includes the TFT, a display including the TFT. By including a buffer layer below and an insulating layer above a silicon layer for the TFT, the silicon layer can be crystallized without being exposed to air, so that contamination can be prevented. Also, due to the overlying insulating layer, the silicon layer can be patterned without directly contacting photoresist. The result is a TFT with uniform and improved electrical characteristics, and an improved display apparatus.

Abstract: A substrate processing apparatus that forms thin films on a plurality of substrates and thermally processes the substrates, by uniformly heating the substrates. The substrate processing apparatus includes a processing chamber, a boat in which substrates are stacked, an external heater located outside of the processing chamber, a feeder to move the boat into and out of the processing chamber, a lower heater located below the feeder, and a central heater located in the center of the boat.

Abstract: An apparatus and a method for supporting acquisition of a multi-parametric image are provided. An apparatus for supporting acquisition of a multi-parametric image includes: a disease selector configured to select a suspected disease of a patient based on patient information; and an image selector configured to determine a set of imaging conditions of a multi-parametric magnetic resonance image corresponding to the suspected disease based on a multi-parametric magnetic resonance imaging model.

Abstract: Stack packages are provided. The stack package includes a substrate having first and second bond fingers and a plurality of semiconductor chips stacked on the substrate. Each of the plurality of semiconductor chips has an input bonding pad and an output bonding pad. A first interconnection electrically connects the first bond finger to the input bonding pad of a lowermost semiconductor chip of the plurality of semiconductor chips. A second interconnection electrically connects the output bonding pad of a lower semiconductor chip of the plurality of semiconductor chips to the input bonding pad of an upper semiconductor chip stacked on the lower semiconductor chip. A third interconnection electrically connects the output bonding pad of an uppermost semiconductor chip of the plurality of semiconductor chips to the second bond finger.

Abstract: A multilayer ceramic capacitor includes a ceramic body having first and second main surfaces opposing one another, first and second lateral surfaces opposing one another, and first and second end surfaces opposing one another. First and second internal electrodes have an overlap region with lead out portions exposed to the first lateral surface of the ceramic body. An insulating layer is formed to cover the overlap region of the lead out portions exposed to the first lateral surface of the ceramic body; and first and second external electrodes are formed on the first lateral surface of the ceramic body on which the insulating layer is formed and electrically connected to the first and second internal electrodes. Thicknesses of the insulating layer from the first lateral surface and the first and second external electrodes from the first lateral surface are specified.