Patents by Inventor Ki Yong Lee

Ki Yong Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140160615
    Abstract: A multilayer ceramic electronic component including: a ceramic main body including a dielectric layer and having first and second main surfaces opposing one another, first and second lateral surfaces opposing one another, and first and second end surfaces opposing one another; a first internal electrode formed within the ceramic main body, including a capacitance formation part having an overlap region to form capacitance and a first lead out portion extending from the capacitance formation part so as to be exposed to the first lateral surface; a second internal electrode alternately laminated together with the first internal electrode, having a second lead out portion extending from the capacitance formation part so as to be exposed to the first lateral surface; first and second external electrodes; and insulating layers.
    Type: Application
    Filed: December 14, 2012
    Publication date: June 12, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Min Gon LEE, Hyung Joon KIM, Ki Yong LEE, Jun Hee KIM, Jae Yeol CHOI
  • Publication number: 20140122515
    Abstract: An apparatus and method for aiding diagnosis are provided.
    Type: Application
    Filed: October 21, 2013
    Publication date: May 1, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ki-Yong Lee, Yeong-Kyeong Seong
  • Patent number: 8706977
    Abstract: A method for inter-processor communication in a mobile terminal is disclosed. The method of inter-processor communication for a mobile terminal having a first processor, a second processor, and a shared memory includes determining, by the first processor, the size of data to be sent to the second processor, comparing the determined size of the data with the size of one of multiple buffer areas in the shared memory to be used for transmission, rearranging the shared memory according to the data size when the size of the data is greater than the size of the buffer area to be used, and sending the data to the second processor through the rearranged shared memory. It is possible to increase data transfer rates between processors when inter-processor communication is performed through a shared memory in a mobile terminal having multiple processors.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: April 22, 2014
    Assignee: Samsung Electronic Co., Ltd.
    Inventors: Ki Yong Lee, Jae Kyong Choi
  • Publication number: 20140101080
    Abstract: An apparatus and a method for diagnosis are provided. The apparatus for diagnosis lesion include: a model generation unit configured to categorize learning data into one or more categories and to generate one or more categorized diagnostic models based on the categorized learning data, a model selection unit configured to select one or more diagnostic model for diagnosing a lesion from the categorized diagnostic models, and a diagnosis unit configured to diagnose the lesion based on image data of the lesion and the selected one or more diagnostic model.
    Type: Application
    Filed: September 30, 2013
    Publication date: April 10, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jae-Cheol Lee, Yeong-Kyeong Seong, Ki-Yong Lee
  • Publication number: 20140084268
    Abstract: A method of forming a polysilicon film includes: forming an amorphous silicon film on a substrate; adsorbing a metal catalyst on the amorphous silicon film, crystallizing the amorphous silicon film through heat treatment to form the polysilicon film, the polysilicon film including a grain internal region and a grain boundary where the metal catalyst remains, providing an etchant having different oxidation selectivities with respect to the grain internal region and the grain boundary, and etching a surface of the polysilicon film by the etchant to remove the metal catalyst remaining on the grain boundary.
    Type: Application
    Filed: August 8, 2013
    Publication date: March 27, 2014
    Inventors: Yong-Duck SON, Ki-Yong LEE, Jin-Wook SEO, Min-Jae JEONG, Tak-Young LEE
  • Patent number: 8673697
    Abstract: A method of fabricating a thin film transistor, comprising steps of preparing a substrate; forming a polycrystalline silicon layer on the substrate; injecting impurities into the polycrystalline silicon layer for channel doping; patterning the polycrystalline silicon layer and forming a semiconductor layer; annealing the semiconductor layer in an H2O atmosphere, and forming a thermal oxide layer on the semiconductor layer; forming a silicon nitride layer on the thermal oxide layer; forming a gate electrode at a location corresponding to a predetermined region of the semiconductor layer; forming an interlayer insulating layer on the entire surface of the substrate; and forming source and drain electrodes electrically connected with the semiconductor layer.
    Type: Grant
    Filed: May 4, 2011
    Date of Patent: March 18, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Moon-Jin Kim, Kyoung-Bo Kim, Ki-Yong Lee, Han-Hee Yoon
  • Patent number: 8659026
    Abstract: A high-speed flat panel display has thin film transistors in a pixel array portion in which a plurality of pixels are arranged and a driving circuit portion for driving the pixels of the pixel array portion, which have different resistance values than each other or have different geometric structures than each other. The flat panel display comprises a pixel array portion where a plurality of pixels are arranged, and a driving circuit portion for driving the pixels of the pixel array portion. The thin film transistors in the pixel array portion and the driving circuit portion have different resistance values in their gate regions or drain regions than each other, or have different geometric structures than each other. One thin film transistor has a zigzag shape in its gate region or drain region or has an offset region.
    Type: Grant
    Filed: December 26, 2012
    Date of Patent: February 25, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jae-Bon Koo, Ji-Yong Park, Sang-Il Park, Ki-Yong Lee, Ul-Ho Lee
  • Patent number: 8658460
    Abstract: A method of manufacturing an organic light-emitting display device includes forming a gate electrode including a lower gate electrode on a gate insulating layer and an upper gate electrode on the lower gate electrode; forming a source region and a drain region at a semiconductor active layer using the gate electrode as a mask; forming an interlayer insulating layer on a substrate and etching the interlayer insulating layer, resulting in contact holes that expose portions of the source region and the drain region; forming a source/drain electrode raw material on the substrate and etching the source/drain electrode raw material to form a source electrode and a drain electrode; forming a gold overlapped lightly doped drain (GOLDD) structure having a LDD region at the semiconductor active layer by injecting impurity ions; depositing a protective layer on the substrate; and forming a display device on the substrate.
    Type: Grant
    Filed: February 8, 2012
    Date of Patent: February 25, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byoung-Keon Park, Tak-Young Lee, Jin-Wook Seo, Ki-Yong Lee, Heung-Yeol Na
  • Publication number: 20140045305
    Abstract: A display device including: a substrate; a first semiconductor layer disposed on the substrate; a second semiconductor layer disposed on the substrate and adjacent to the first semiconductor layer; a first insulation layer disposed on both the first semiconductor layer and the second semiconductor layer, the first insulation layer including a first opening forming a space between the first semiconductor layer and the second semiconductor layer; and a second insulation layer disposed on the first insulation layer and that fills the first opening.
    Type: Application
    Filed: October 17, 2013
    Publication date: February 13, 2014
    Applicant: Samsung Display Co., Ltd.
    Inventors: Byoung-Keon PARK, Jin-Wook Seo, Ki-Yong Lee, Yun-Mo Chung, Jong-Ryuk Park, Tak-Young Lee, Dong-Hyun Lee, Kil-Won Lee, Byung-Soo So, Yong-Duck Son, Seung-Kyu Park, Jae-Wan Jung, Min-Jae Jeong
  • Patent number: 8623720
    Abstract: A thin film transistor (TFT), a method of fabricating the same, and an organic light emitting diode (OLED) display device including the TFT. The TFT includes a substrate having a pixel region and a non-pixel region, a semiconductor layer, a gate insulating layer, a gate electrode, and source and drain electrodes disposed on the pixel region, at least one gettering site disposed on the non-pixel region, and at least one connection portion to connect the at least one gettering site and the semiconductor layer. The method of fabricating the TFT includes patterning a polycrystalline silicon (poly-Si) layer to form a plurality of semiconductor layers, connection portions, and at least one gettering site, the semiconductor layers being connected to the at least one gettering site via the connection portions, and annealing the substrate to getter the plurality of semiconductor layers.
    Type: Grant
    Filed: May 4, 2012
    Date of Patent: January 7, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Joo-Chul Yoon, Oh-Seob Kwon, Yong-Soo Lee, Su-Bin Song, Joo-Hwa Lee, Byoung-Keon Park, Tae-Hoon Yang, Jin-Wook Seo, Ki-Yong Lee
  • Patent number: 8623746
    Abstract: A method of crystallizing a silicon layer. An amorphous silicon layer is formed on a buffer layer on a substrate. A catalyst metal layer is formed on the amorphous silicon layer to have a density of from about 1011 to about 1015 atom/cm2. A crystalline seed having a pyramid shape is formed on an interface between the amorphous silicon layer and the buffer layer as a catalyst metal of the catalyst metal layer diffuses into the amorphous silicon layer. The amorphous silicon layer is thermal-treated so that a polysilicon layer is formed as a silicon crystal grows by the crystallization seed.
    Type: Grant
    Filed: January 24, 2011
    Date of Patent: January 7, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yun-Mo Chung, Ki-Yong Lee, Jin-Wook Seo, Kil-Won Lee, Bo-Kyung Choi
  • Publication number: 20130299223
    Abstract: Disclosed are a printed circuit board and a method for manufacturing the same. The method for manufacturing the printed circuit board includes forming a base circuit board including a cavity circuit pattern in a cavity region on upper and lower portions of a substrate and internal circuit layers outside the cavity region, forming a cavity separation layer on the cavity circuit pattern, forming at least one pair of an insulating layer and a circuit layer on the base circuit board, cutting the insulating layer and the cavity separation layer provided on an etch stop pattern by controlling a focal length of a laser beam such that the laser beam reaches a surface of the base circuit board, and removing the insulating layer by separating the cavity separation layer to form the cavity. The cavity separation layer is formed on the cavity circuit pattern, and the resultant structure is cut to the cavity separation layer by using a laser so that the insulating layer is separated.
    Type: Application
    Filed: July 1, 2011
    Publication date: November 14, 2013
    Applicant: LG INNOTEK CO., LTD.
    Inventors: Jae Hyoun Yoo, Hyung Jong Kim, Jun Soo Park, Ki Yong Lee, Jin Goo Jeon
  • Patent number: 8580677
    Abstract: A substrate including a thin film transistor, the substrate including an active layer disposed on the substrate, the active layer including a channel area and source and drain areas, a gate electrode disposed on the active layer, the channel area corresponding to the gate electrode, a gate insulating layer interposed between the active layer and the gate electrode, an interlayer insulating layer disposed to cover the active layer and the gate electrode, the interlayer insulating layer having first and second contact holes partially exposing the active layer, source and drain electrodes disposed on the interlayer insulating layer, the source and drain areas corresponding to the source and drain electrodes, and ohmic contact layers, the ohmic contact layers being interposed between the interlayer insulating layer and the source and drain electrodes, and contacting the source and drain areas through the first and second contact holes.
    Type: Grant
    Filed: January 11, 2013
    Date of Patent: November 12, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yun-Mo Chung, Ki-Yong Lee, Jin-Wook Seo, Min-Jae Jeong, Yong-Duck Son, Byung-Soo So, Seung-Kyu Park, Byoung-Keon Park, Dong-Hyun Lee, Kil-Won Lee, Tak-Young Lee, Jong-Ryuk Park, Jae-Wan Jung
  • Publication number: 20130288842
    Abstract: There is disclosed a continuously variable speed gear set including a driving input shaft, a carrier extended from one end of the driving input shaft to rotate integrally with the driving input shaft, a spindle gear provided in a predetermined portion of the carrier to relatively rotate with respect to the driving input shaft, the spindle gear comprising a shaft identical to the driving input shaft, a planetary gear arranged in the carrier, a driving output gear comprising a shaft arranged on the same line with the axis of the driving input shaft to relatively rotate, the driving output gear engaging with the planetary gear rotating and revolving along the rotation of the carrier to receive a rotation force from the planetary force, and a transmission input unit configured to control a rotation speed of the driving output gear by controlling a rotation speed of the spindle gear.
    Type: Application
    Filed: November 24, 2011
    Publication date: October 31, 2013
    Applicant: KOREA INSTITUTE OF INDUSTRIAL TECHNOLOGY
    Inventors: David Hyung Kim, Ki Yong Lee, Kwang Yong Shin
  • Patent number: 8569764
    Abstract: A thin film transistor includes: a substrate; a semiconductor layer disposed on the substrate, and including a channel region, source and drain regions, and edge regions having a first impurity formed at edges of the source and drain regions, and optionally, in the channel region; a gate insulating layer insulating the semiconductor layer; a gate electrode insulated from the semiconductor layer by the gate insulating layer; and source and drain electrodes electrically connected to the semiconductor layer.
    Type: Grant
    Filed: March 10, 2008
    Date of Patent: October 29, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byoung-Keon Park, Tae-hoon Yang, Jin-Wook Seo, Sei-Hwan Jung, Ki-Yong Lee
  • Patent number: 8569859
    Abstract: A display device including: a substrate; a first semiconductor layer disposed on the substrate; a second semiconductor layer disposed on the substrate and adjacent to the first semiconductor layer; a first insulation layer disposed on both the first semiconductor layer and the second semiconductor layer, the first insulation layer including a first opening forming a space between the first semiconductor layer and the second semiconductor layer; and a second insulation layer disposed on the first insulation layer and that fills the first opening.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: October 29, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byoung-Keon Park, Jin-Wook Seo, Ki-Yong Lee, Yun-Mo Chung, Jong-Ryuk Park, Tak-Young Lee, Dong-Hyun Lee, Kil-Won Lee, Byung-Soo So, Min-Jae Jeong, Yong-Duck Son, Seung-Kyu Park, Jae-Wan Jung
  • Patent number: 8546201
    Abstract: A method of crystallizing a silicon layer and a method of manufacturing a thin film transistor using the same, the method of crystallizing the silicon layer including forming an amorphous silicon layer on a substrate; performing a hydrophobicity treatment on a surface of the amorphous silicon layer so as to obtain a hydrophobic surface thereon; forming a metallic catalyst on the amorphous silicon layer that has been subjected to the hydrophobicity treatment; and heat-treating the amorphous silicon layer including the metallic catalyst thereon to crystallize the amorphous silicon layer into a polycrystalline silicon layer.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: October 1, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yun-Mo Chung, Ki-Yong Lee, Jin-Wook Seo, Min-Jae Jeong, Yong-Duck Son, Byung-Soo So, Seung-Kyu Park, Byoung-Keon Park, Dong-Hyun Lee, Kil-Won Lee, Tak-Young Lee, Jong-Ryuk Park
  • Patent number: 8546248
    Abstract: A method of forming a polycrystalline silicon layer and an atomic layer deposition apparatus used for the same. The method includes forming an amorphous silicon layer on a substrate, exposing the substrate having the amorphous silicon layer to a hydrophilic or hydrophobic gas atmosphere, placing a mask having at least one open and at least one closed portion over the amorphous silicon layer, irradiating UV light toward the amorphous silicon layer and the mask using a UV lamp, depositing a crystallization-inducing metal on the amorphous silicon layer, and annealing the substrate to crystallize the amorphous silicon layer into a polycrystalline silicon layer. This method and apparatus provide for controlling the seed position and grain size in the formation of a polycrystalline silicon layer.
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: October 1, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yun-Mo Chung, Ki-Yong Lee, Min-Jae Jeong, Jin-Wook Seo, Jong-Won Hong, Heung-Yeol Na, Eu-Gene Kang, Seok-Rak Chang, Tae-Hoon Yang, Ji-Su Ahn, Young-Dae Kim, Byoung-Keon Park, Kil-Won Lee, Dong-Hyun Lee, Sang-Yon Yoon, Jong-Ryuk Park, Bo-Kyung Choi, Maxim Lisachenko
  • Patent number: 8530290
    Abstract: A thin film transistor includes: a substrate; a semiconductor layer disposed on the substrate, and including a channel region, source and drain regions, and edge regions having a first impurity formed at edges of the source and drain regions, and optionally, in the channel region; a gate insulating layer insulating the semiconductor layer; a gate electrode insulated from the semiconductor layer by the gate insulating layer; and source and drain electrodes electrically connected to the semiconductor layer.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: September 10, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byoung-Keon Park, Tae-hoon Yang, Jin-Wook Seo, Sei-Hwan Jung, Ki-Yong Lee
  • Publication number: 20130228760
    Abstract: An organic light emitting diode (OLED) display device and a method of fabricating the same are provided. The OLED display device includes a substrate having a thin film transistor region and a capacitor region, a buffer layer disposed on the substrate, a gate insulating layer disposed on the substrate, a lower capacitor electrode disposed on the gate insulating layer in the capacitor region, an interlayer insulating layer disposed on the substrate, and an upper capacitor electrode disposed on the interlayer insulating layer and facing the lower capacitor electrode, wherein regions of each of the buffer layer, the gate insulating layer, the interlayer insulating layer, the lower capacitor electrode, and the upper capacitor electrode have surfaces in which protrusions having the same shape as grain boundaries of the semiconductor layer are formed. The resultant capacitor has an increased surface area, and therefore, an increased capacitance.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 5, 2013
    Applicant: Samsung Display Co., Ltd.
    Inventors: Byoung-Keon PARK, Tae-Hoon YANG, Jin-Wook SEO, Soo-Beom JO, Dong-Hyun LEE, Kil-Won LEE, Maxim LISACHENKO, Yun-Mo CHUNG, Bo-Kyung CHOI, Jong-Ryuk PARK, Ki-Yong LEE