Patents by Inventor Kiichi Yamashita
Kiichi Yamashita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6731171Abstract: A power amplifier module includes a bias circuit to produce an idling current and a power amplifier of which the gain is controlled by the idling current produced by the bias circuit. Effects of changes of control voltage and ambient temperature of the power amplifier module can be removed by a first detector in the bias circuit to detect changes of the control voltage and a second detector in the bias circuit to detect changes of the ambient temperature. The bias circuit may further include a differential circuit to make error amplification with the first detector provided to perform as a standard voltage source for ambient temperature detection of the second detector and the second detector provided to perform as a standard voltage source for control-voltage detection of the first detector. Thus, they serve as detection circuits or standard voltage sources mutually.Type: GrantFiled: February 25, 2002Date of Patent: May 4, 2004Assignee: Hitachi, Ltd.Inventor: Kiichi Yamashita
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Patent number: 6710649Abstract: A power amplifier module comprises a plurality of amplifier stages, each including a reference amplifier for emulating the operation of the amplifier. The current flowing to the base of a bipolar transistor that forms each reference amplifier depending on an input power level is detected, amplified, and supplied as base current of the transistor of the corresponding amplifier.Type: GrantFiled: November 21, 2002Date of Patent: March 23, 2004Assignee: Renesas Technology CorporationInventors: Hidetoshi Matsumoto, Tomonori Tanoue, Satoshi Tanaka, Kiichi Yamashita
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Patent number: 6696711Abstract: A semiconductor device comprising a plurality of heterojunction bipolar transistors with their base layer made of GaAsSb or InGaAs, a GaAs substrate, and a buffer layer placed between the base layer and the substrate is fabricated. The substrate and the buffer layer that lie directly under the intrinsic regions of a part or all of the plurality of heterojunction bipolar transistors are removed. Thereby, a semiconductor device using HBTs that can operate with a power supply voltage of 2 V or below can be provided at reduced cost as a well-reliable product, and a power amplifier with high power conversion efficiency can be provided.Type: GrantFiled: April 12, 2002Date of Patent: February 24, 2004Assignee: Renesas Technology CorporationInventors: Kazuhiro Mochizuki, Tohru Oka, Isao Ohbu, Kiichi Yamashita
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Patent number: 6636118Abstract: In a high frequency power amplifier module of a multi-stage structure in which a plurality of heterojunction bipolar transistors (npn-type HBTs) are cascade-connected, a protection circuit in which a plurality of pn junction diodes are connected in series is connected between the collector and emitter of each HBT. The p-side is connected to the collector side, and the n-side is connected to the emitter side. A protection circuit in which pn junction diodes of the number equal to or smaller than that of the pn junction diodes are connected in series is connected between the base and the emitter. The p-side is connected to the base side, and the n-side is connected to the emitter side. With the configuration, in the case where an overvoltage is applied across the collector and emitter due to a fluctuation in load on the antenna side, the collector terminal is clamped by an ON-state voltage of the protection circuits, so that the HBT can be prevented from being destroyed.Type: GrantFiled: November 14, 2001Date of Patent: October 21, 2003Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.Inventors: Cyushiro Kusano, Eiichi Hase, Hideyuki Ono, Osamu Kagaya, Yasunari Umemoto, Takahiro Fujita, Kiichi Yamashita
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Publication number: 20030102924Abstract: A power amplifier module comprises a plurality of amplifier stages, each including a reference amplifier for emulating the operation of the amplifier. The current flowing to the base of a bipolar transistor that forms each reference amplifier depending on an input power level is detected, amplified, and supplied as base current of the transistor of the corresponding amplifier.Type: ApplicationFiled: November 21, 2002Publication date: June 5, 2003Inventors: Hidetoshi Matsumoto, Tomonori Tanoue, Satoshi Tanaka, Kiichi Yamashita
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Publication number: 20030102574Abstract: In a semiconductor device such as a high-frequency power amplifier module, a plurality of amplifying means are formed on a semiconductor chip which is mounted on a main surface of a wiring substrate, and electrodes of the semiconductor chip are electrically connected by wires to electrodes of the wiring substrate. In order to make the high-frequency power amplifier module small in size, a substrate-side bonding electrode electrically connected to a wire set at a fixed reference electric potential is placed at a location farther from a side of the semiconductor chip than a substrate-side output electrode electrically connected to an output wire. A substrate-side input electrode electrically connected to an input wire is located at a distance from the side of the semiconductor chip about equal to the distance from the side of the semiconductor chip to the substrate-side output electrode, or at a location farther from the side of the semiconductor chip than the substrate-side bonding electrode is.Type: ApplicationFiled: November 12, 2002Publication date: June 5, 2003Applicant: Hitachi, Ltd.Inventors: Iwamichi Kohjiro, Yasuhiro Nunogawa, Sakae Kikuchi, Shizuo Kondo, Tetsuaki Adachi, Osamu Kagaya, Kenji Sekine, Eiichi Hase, Kiichi Yamashita
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Patent number: 6495914Abstract: A metal base substrate for mounting a plurality of bare semiconductor chip devices thereon has first and second main surfaces. The first main surface has formed thereon at least one projection, and at least two recesses in which the bare semiconductor chip devices are to be mounted. The depth of these recesses is smaller than the length of said projection, and the recesses have a higher surface smoothness than said main surfaces of said metal substrate. The metal base substrate is partially chemically etched to form the projection, and the first main surface of the substrate is mechanically worked to form at least the recesses. The conductive projection is isolated from the portion on which the bare semiconductor chip devices are mounted, of the base substrate, and the conductive projection acts as a terminal that can be electrically connected to the outside on the first and second main surfaces of the base substrate.Type: GrantFiled: February 10, 2000Date of Patent: December 17, 2002Assignee: Hitachi, Ltd.Inventors: Kenji Sekine, Hiroji Yamada, Matsuo Yamasaki, Osamu Kagaya, Kiichi Yamashita
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Patent number: 6492195Abstract: Disclosed herein is a technique which performs the thinning of a wafer and the separation thereof from a support substrate with high yields and in a short time. Described specifically, a hole-free support substrate is bonded to a second surface of a support substrate having holes with an adhesive layer melted by heating so as to bloc the holes. A wafer is bonded to a first surface of the support substrate having the holes with an adhesive layer melted by solvent. The wafer is thinned by grinding and etching. The adhesive layer is melted by heating and the support substrate having the holes is slid with respect to the hole-free support substrate to thereby separate the support substrate having the holes from the hole-free support substrate. Further, the adhesive layer is melted by solvent from the holes defined in the support substrate having the holes to thereby separate the wafer from the support substrate having the holes.Type: GrantFiled: December 13, 2000Date of Patent: December 10, 2002Assignees: Hitachi, Ltd., Hitachi Tohbu Semiconductor, Ltd.Inventors: Masaki Nakanishi, Susumu Sorimachi, Kiichi Yamashita, Hiroji Yamada, Kikuo Fukushima
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Patent number: 6489680Abstract: In a semiconductor device such as a high-frequency power amplifier module, a plurality of amplifying means are formed on a semiconductor chip which is mounted on a main surface of a wiring substrate, and electrodes of the semiconductor chip are electrically connected by wires to electrodes of the wiring substrate. In order to make the high-frequency power amplifier module small in size, a substrate-side bonding electrode electrically connected to a wire set at a fixed reference electric potential is place at a location farther from a side of the semiconductor chip than a substrate-side output electrode electrically connected to an output wire. A substrate-side input electrode electrically connected to an input wire is located at a distance from the side of the semiconductor chip about equal to the distance from the side of the semiconductor chip to the substrate-side output electrode, or at a location farther from the side of the semiconductor chip than the substrate-side bonding electrode is.Type: GrantFiled: October 5, 2001Date of Patent: December 3, 2002Assignees: Hitachi, Ltd., Hitachi Tohbu Semiconductor, Ltd.Inventors: Iwamichi Kohjiro, Yasuhiro Nunogawa, Sakae Kikuchi, Shizuo Kondo, Tetsuaki Adachi, Osamu Kagaya, Kenji Sekine, Eiichi Hase, Kiichi Yamashita
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Publication number: 20020171138Abstract: A multilayer wiring board having board having through holes in a thickness-wise direction, in which wiring board a semiconductor substrate mounted on the multi-layer wiring board has through holes in a thickness-wise direction, and entire areas, which the through holes in the semiconductor substrate occupy, in a plane orthogonal to the thickness-wise direction of the multilayer wiring board and of the semiconductor substrate are included in areas, which the through holes in the multilayer wiring board occupy.Type: ApplicationFiled: August 31, 2001Publication date: November 21, 2002Inventors: Yasuo Osone, Norio Nakazato, Isao Oobu, Kiichi Yamashita, Shinji Moriyama, Takayuki Tsutsui, Mitsuaki Hibino, Chushiro Kusano, Yasunari Umemoto
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Publication number: 20020153534Abstract: A semiconductor device comprising a plurality of heterojunction bipolar transistors with their base layer made of GaAsSb or InGaAs, a GaAs substrate, and a buffer layer placed between the base layer and the substrate is fabricated. The substrate and the buffer layer that lie directly under the intrinsic regions of a part or all of the plurality of heterojunction bipolar transistors are removed. Thereby, a semiconductor device using HBTs that can operate with a power supply voltage of 2V or below can be provided at reduced cost as a well-reliable product, and a power amplifier with high power conversion efficiency can be provided.Type: ApplicationFiled: April 12, 2002Publication date: October 24, 2002Inventors: Kazuhiro Mochizuki, Tohru Oka, Isao Ohbu, Kiichi Yamashita
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Patent number: 6461927Abstract: In the case of a semiconductor device where a base electrode 11 in a collector top heterojunction bipolar transistor is disposed so as to contact with the side face of a base layer 5 in which no ion is implanted and the surface of a high resistance extrinsic emitter area 14 in which ion is implanted, the dependence of the current gain in the collector top HBT on the collector size can be diminished.Type: GrantFiled: August 28, 2001Date of Patent: October 8, 2002Assignee: Hitachi, Ltd.Inventors: Kazuhiro Mochizuki, Tohru Oka, Isao Ohbu, Kiichi Yamashita
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Publication number: 20020135423Abstract: A power amplifier module includes a bias circuit to produce an idling current and a power amplifier of which the gain is controlled by the idling current produced by the bias circuit. Effects of changes of control voltage and ambient temperature of the power amplifier module can be removed by a first detector in the bias circuit to detect changes of the control voltage and a second detector in the bias circuit to detect changes of the ambient temperature. The bias circuit may further include a differential circuit to make error amplification with the first detector provided to perform as a standard voltage source for ambient temperature detection of the second detector and the second detector provided to perform as a standard voltage source for control-voltage detection of the first detector. Thus, they serve as detection circuits or standard voltage sources mutually.Type: ApplicationFiled: February 25, 2002Publication date: September 26, 2002Inventor: Kiichi Yamashita
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Publication number: 20020117685Abstract: In the case of a semiconductor device where a base electrode 11 in a collector top heterojunction bipolar transistor is disposed so as to contact with the side face of a base layer 5 in which no ion is implanted and the surface of a high resistance extrinsic emitter area 14 in which ion is implanted, the dependence of the current gain in the collector top HBT on the collector size can be diminished.Type: ApplicationFiled: August 28, 2001Publication date: August 29, 2002Applicant: Hitachi, Ltd.Inventors: Kazuhiro Mochizuki, Tohru Oka, Isao Ohbu, Kiichi Yamashita
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Publication number: 20020048649Abstract: An apparatus is disclosed for injecting an expandable or foaming material in a closed sectional structure of a body. The apparatus is suitable for mass-producing vehicles, such as automobiles efficiently. This apparatus is provided with a manipulator (38) movable to a desired position, a injector (50) fixed to the manipulator, a device (56) for supplying the expandable or foaming material to the injector, and a controller (40) adapted to control the position of the manipulator (10) so that the injector is set in a position in which the foaming material can be supplied to the closed sectional structure of the vehicle body through an injection port of the same closed sectional structure, and also adapted to control the supply device so that the foaming material can be injected and filled in the closed sectional structure thereof by only such an amount that was set in accordance with the volume of the inside of the sectional structure.Type: ApplicationFiled: November 9, 2001Publication date: April 25, 2002Inventors: Kiichi Yamashita, Tatsuya Wakamori, Masahito Mori, Mutsuhisa Miyamoto
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Publication number: 20020024390Abstract: There is provided a power amplifier module which is provided with a function of protecting an amplifying device against destruction caused by a standing wave by reflection from an antenna end in load variation, having a high tolerance level of device destruction and is highly efficient.Type: ApplicationFiled: August 20, 2001Publication date: February 28, 2002Applicant: Hitachi, Ltd.Inventors: Kiichi Yamashita, Tomonori Tanoue, Isao Ohbu, Kenji Sekine
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Publication number: 20020015291Abstract: In a semiconductor device such as a high-frequency power amplifier module, a plurality of amplifying means are formed on a semiconductor chip which is mounted on a main surface of a wiring substrate, and electrodes of the semiconductor chip are electrically connected by wires to electrodes of the wiring substrate. In order to make the high-frequency power amplifier module small in size, a substrate-side bonding electrode electrically connected to a wire set at a fixed reference electric potential is placed at a location farther from a side of the semiconductor chip than a substrate-side output electrode electrically connected to an output wire. A substrate-side input electrode electrically connected to an input wire is located at a distance from the side of the semiconductor chip about equal to the distance from the side of the semiconductor chip to the substrate-side output electrode, or at a location farther from the side of the semiconductor chip than the substrate-side bonding electrode is.Type: ApplicationFiled: October 5, 2001Publication date: February 7, 2002Applicant: Hitachi, Ltd.Inventors: Iwamichi Kohjiro, Yasuhiro Nunogawa, Sakae Kikuchi, Shizuo Kondo, Tetsuaki Adachi, Osamu Kagaya, Kenji Sekine, Eiichi Hase, Kiichi Yamashita
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Patent number: 6337355Abstract: An apparatus is disclosed for injecting an expandable or foaming material in a closed sectional structure of a body. The apparatus is suitable for mass-producing vehicles, such as automobiles efficiently. This apparatus is provided with a manipulator (38) movable to a desired position, a injector (50) fixed to the manipulator, a device (56) for supplying the expandable or foaming material to the injector, and a controller (40) adapted to control the position of the manipulator (10) so that the injector is set in a position in which the foaming material can be supplied to the closed sectional structure of the vehicle body through an injection port of the same closed sectional structure, and also adapted to control the supply device so that the foaming material can be injected and filled in the closed sectional structure thereof by only such an amount that was set in accordance with the volume of the inside of the sectional structure.Type: GrantFiled: July 22, 1999Date of Patent: January 8, 2002Assignees: Sunstar Giken Kabushiki Kaisha, Uni-Sunstar B.V.Inventors: Kiichi Yamashita, Tatsuya Wakamori, Masahito Mori, Mutsuhisa Miyamoto
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Patent number: 6330165Abstract: In a semiconductor device such as a high-frequency power amplifier module, a plurality of amplifying means are formed on a semiconductor chip which is mounted on a main surface of a wiring substrate, and electrodes of the semiconductor chip are electrically connected by wires to electrodes of the wiring substrate. In order to make the high-frequency power amplifier module small in size, a substrate-side bonding electrode electrically connected to a wire set at a fixed reference electric potential is place at a location farther from a side of the semiconductor chip than a substrate-side output electrode electrically connected to an output wire. A substrate-side input electrode electrically connected to an input wire is located at a distance from the side of the semiconductor chip about equal to the distance from the side of the semiconductor chip to the substrate-side output electrode, or at a location farther from the side of the semiconductor chip than the substrate-side bonding electrode is.Type: GrantFiled: July 1, 1999Date of Patent: December 11, 2001Assignees: Hitachi, Ltd., Hitachi Tohbu Semiconductor, Ltd.Inventors: Iwamichi Kohjiro, Yasuhiro Nunogawa, Sakae Kikuchi, Shizuo Kondo, Tetsuaki Adachi, Osamu Kagaya, Kenji Sekine, Eiichi Hase, Kiichi Yamashita
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Publication number: 20010005043Abstract: Disclosed herein is a technique which performs the thinning of a wafer and the separation thereof from a support substrate with high yields and in a short time. Described specifically, a hole-free support substrate is bonded to a second surface of a support substrate having holes with an adhesive layer melted by heating so as to bloc the holes. A wafer is bonded to a first surface of the support substrate having the holes with an adhesive layer melted by solvent. The wafer is thinned by grinding and etching. The adhesive layer is melted by heating and the support substrate having the holes is slid with respect to the hole-free support substrate to thereby separate the support substrate having the holes from the hole-free support substrate. Further, the adhesive layer is melted by solvent from the holes defined in the support substrate having the holes to thereby separate the wafer from the support substrate having the holes.Type: ApplicationFiled: December 13, 2000Publication date: June 28, 2001Inventors: Masaki Nakanishi, Susumu Sorimachi, Kiichi Yamashita, Hiroji Yamada, Kikuo Fukushima