Abstract: The present invention is a weld bonding method providing adhesion by both an adhesive and resistance spot welding, and includes application of an adhesive including a thermosetting epoxy resin, a latent curing agent and 1 to 15 vol % of one or more additives selected from the group consisting of conductive metals, metal oxides, metal carbides, metal nitrides, metal borides, and metal silicides, which are in the from of powder having a particle size of 10 .mu.m or less, or in the form of fragments or flakes having a thickness of 0.5 .mu.m or more and a size of 30 .mu.m or less.

Abstract: An optical frequency division multiplexing transmitter is disclosed, which comprises a plurality of optical transmitters having different optical frequencies; an optical combiner multiplexing optical signals outputted by the different optical transmitters; and an optical filter having passbands, the frequency of each of which is approximately in accordance with the frequency of each of the signals, in which the signal thus multiplexed is inputted.

Abstract: A semiconductor circuit including first and second FET's for delivering an output signal without being affected by a change in threshold voltage of the FET's is disclosed. According to one practical form of the semiconductor circuit, the drain-source current path of an additional FET whose gate and source are shorted to each other, is connected in parallel to the drain-source current path of the first FET whose gate and drain are shorted to each other, to make the voltage-current characteristic of the second FET agree with that of the parallel combination of the first and additional FET's. According to another practical form of the semiconductor circuit, a voltage dividing circuit is connected in parallel to the drain-source current path of the first FET, and a divided output voltage from the voltage dividing circuit is applied between the gate and source of each of the first and second FET's.

Abstract: An optical tuning device including a channel designator and an intermediate frequency stabilizer for stabilizing the frequency of a difference signal corresponding to the frequency difference between a transmitted optical signal and a local oscillation optical signal. The channel designator includes a bias control circuit for continuously changing the optical frequency of a local oscillation light source up to a frequency corresponding to a target channel, a channel detection circuit for detecting channel passage on the basis of the difference signal, and a channel counting circuit for storing therein the selected channel and the target channel, detecting the direction of the target channel, counting the number of channel passage times, and detecting arrival at the target channel.

Abstract: A logic circuit made up of FET's is disclosed in which an output interface circuit is formed of a source follower circuit including a signal transmitting FET and a constant-current supplying FET, and a ratio of the gate width of the signal transmitting FET to the gate width of the constant-current supplying FET is set so that the high and low levels of the output signal of the logic circuit are independent of the threshold voltage of the FET's.

Abstract: This invention relates to a threshold voltage detection circuit for detecting the threshold voltage of field effect transistors (FETs) and to a semiconductor circuit capable of a stable operation irrespective of the fluctuation of the threshold voltage by utilizing this threshold voltage detection circuit. The source-drain path of first FET is connected in series with that of second FET having substantially the same threshold voltage as that of the first FET and the conductances of these first and second FETs are set to a predetermined ratio to generate a voltage drop associated with the threshold voltage in the first FET. This voltage drop can be used for detecting the threshold voltage and for level-shifting.

Abstract: A constant voltage circuit according to this invention comprises first means attenuating or dividing fluctuating voltage and an amplifying FET, to the gate of which the output attenuated or divided by the first means is applied and whose drain is connected with the fluctuating voltage through load means. The attenuation ratio or division ratio of the first means, the mutual conductance of the amplifying FET and the impedance of the load means are so set that the voltage drop across the load means cancels the fluctuating amount of the fluctuating voltage. Consequently an output voltage, which is maintained substantially constant, is obtained at the drain of the amplifying FET, independently of fluctuations in the fluctuating voltage, and thus a constant voltage circuit can be obtained. A constant current circuit according to this invention utilizes the constant voltage circuit described above. The output voltage of the constant voltage circuit is supplied to the gate of the constant current FET.

Abstract: A current switching circuit enabling current switching at a speed of several gigabits per second (Gbit/sec) or several giga Hertz (GHz) in analog integrated circuits and digital integrated circuits using GaAs FETs is so constructed that the current switching is effected by a pair of diodes, whose cathodes are connected in common and which are driven by a GaAs FET circuit (source follower circuit). This current switching circuit includes first and second FETs, each of which has a source, a drain and a gate. First and second input signals are connected to the gates of the first and the second FETs, respectively. First and second diodes are provided with anodes connected with the sources of the first and the second FETs, respectively. A constant current source is connected in common with the cathodes of the first and the second diodes, and a load circuit is connected with the drain of at least one of the first and the second FETs.

Abstract: A high-speed light emitting diode driver circuit for optical communication systems, in which an impedance circuit is provided between the collector and emitter of a drive transistor, and another impedance circuit is provided on the emitter side. The light emitting diode is connected to the collector side of the drive transistor. The light emitting diode is driven by an input pulse signal applied to the base of the drive transistor.

Abstract: A mold is provided for use in the production of concrete pipe sections. The mold has an inner mold part including an arch-shaped mold member; a pair of substantially L-shaped side mold members each flexibly connected to an adjacent end of the arch-shaped mold member and extending along the side portions of the mold and with parts extending inwardly across the bottom portion of the mold, and a separable mold member detachably connected between the inwardly extending parts of the L-shaped side mold members. The parting of the mold from the product is accomplished by removing the separable mold member, and urging the L-shaped side mold members inwardly. Provided also is a mold for use in the production of mitred concrete pipe sections comprising an upper inclined pipe and a lower inclined pipe which are connected to each other at their mitred surfaces. A mold is also provided for producing concrete pipe elbows having partition plates adapted to produce elbows of various arcuate sizes.

Abstract: A method of searching fault locations which is employed in a transmission system comprising a transmitting terminal having a transmitter for transmitting a digital signal; a receiving terminal having a receiver for receiving the digital signal; a plurality of repeaters which are placed between the transmitting and receiving terminals, and each of which receives and amplifies the digital signal from a preceding repeater section and deliver it to a subsequent repeater section; and a plurality of transmission lines for connecting the transmitter with the first repeater, the repeaters with each other and the final repeater with each other and the final repeater with the receiver, respectively.

Abstract: In utilizing frequency dividers at high frequencies the maximum operating frequency is determined by the delay time through the frequency divider. To minimize this delay time, a digital frequency divider is provided having a binary counter constructed of flip-flops and a shift register coupled to the output of said counter, wherein the output state of the shift register is forcibly reduced to a low level in response to a control signal for varying the number of frequency division of said counter. A circuit is also provided for feeding the input terminal of the flip-flop at the first stage of said counter with an OR output made up of the outputs of said shift register and said counter. Thus, the digital frequency divider can operate at a speed which is limited only by the toggle frequency of said flip-flop circuits.

Abstract: In utilizing frequency dividers at high frequencies the maximum operating frequency is determined by the delay time through the frequency divider. To minimize this delay time, a digital frequency divider is provided having a binary counter constructed of flip-flops and a shift register coupled to the output of said counter, wherein the output state of the shift register is forcibly reduced to a low level in response to a control signal for varying the number of frequency division of said counter. A circuit is also provided for feeding the input terminal of the flip-flop at the first stage of said counter with an OR output made up of the outputs of said shift register and said counter. Thus, the digital frequency divider can operate at a speed which is limited only by the toggle frequency of said flip-flop circuits.