Patents by Inventor Kiyoshi Arita
Kiyoshi Arita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11289428Abstract: An element chip manufacturing method including: preparing a semiconductor substrate including a first layer having a first principal surface, and a second layer having a second principal surface, the first layer provided with element regions, a dicing region, and an alignment mark, wherein the first layer includes a semiconductor layer, and the second layer includes a metal layer adjacent to the semiconductor layer; irradiating a first laser beam absorbed in the metal film and passing through the semiconductor layer, from the second principal surface side to a first region corresponding to the mark; imaging the semiconductor substrate from the second principal surface side with a camera, and then calculating a second region corresponding to the dicing region on the second principal surface; irradiating a second laser beam to the second region from the second principal surface side; and dicing the semiconductor substrate into a plurality of element chips.Type: GrantFiled: May 12, 2020Date of Patent: March 29, 2022Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Kiyoshi Arita, Shogo Okita, Hidehiko Karasaki
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Publication number: 20200381367Abstract: An element chip manufacturing method including: preparing a semiconductor substrate including a first layer having a first principal surface, and a second layer having a second principal surface, the first layer provided with element regions, a dicing region, and an alignment mark, wherein the first layer includes a semiconductor layer, and the second layer includes a metal layer adjacent to the semiconductor layer; irradiating a first laser beam absorbed in the metal film and passing through the semiconductor layer, from the second principal surface side to a first region corresponding to the mark; imaging the semiconductor substrate from the second principal surface side with a camera, and then calculating a second region corresponding to the dicing region on the second principal surface; irradiating a second laser beam to the second region from the second principal surface side; and dicing the semiconductor substrate into a plurality of element chips.Type: ApplicationFiled: May 12, 2020Publication date: December 3, 2020Inventors: Kiyoshi ARITA, Shogo OKITA, Hidehiko KARASAKI
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Patent number: 8956499Abstract: An object is to provide a plasma processing device capable of accurately judging whether or not the proper maintenance time has come which is necessary for maintaining an operation state of a device in the best condition. A discharge detection sensor 23, in which a dielectric member 21 and a probe electrode unit 22 are combined with each other, is attached to an opening portion 2a provided in a lid portion 2 composing a vacuum chamber.Type: GrantFiled: August 21, 2008Date of Patent: February 17, 2015Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Tatsuhiro Mizukami, Kiyoshi Arita, Masaru Nonomura
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Patent number: 8757090Abstract: In a plasma processing apparatus for generating a plasma in a plasma generation space between a lower electrode and an upper electrode so that a processing object mounted on the lower electrode is subjected to plasma processing, a plurality of cutout portions for absorption of strain caused by thermal expansion due to rapid temperature increases in the plasma processing are formed at an equal pitch in an outer edge portion of a gas shower plate included in the upper electrode. Thus, the gas shower plate can be prevented from being damaged by occurrence of cracks in the outer edge portion of the gas shower plate or the like.Type: GrantFiled: April 4, 2006Date of Patent: June 24, 2014Assignee: Panasonic CorporationInventors: Kiyoshi Arita, Akira Nakagawa, Koji Kuga, Taiji Matano, Nobuhiro Sato
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Plasma processing device and method of monitoring plasma discharge state in plasma processing device
Patent number: 8668836Abstract: An object is to provide a plasma processing device capable of rightly monitoring existence of plasma discharge and also rightly monitoring existence of abnormal discharge. Another object of the present invention is to provide a method of monitoring a state of plasma discharge in the plasma processing device. A discharge detection sensor 23, in which a dielectric member 21 and a probe electrode unit 22 are combined with each other, is attached to an opening portion 2a provided in a lid portion 2 composing a vacuum chamber.Type: GrantFiled: August 21, 2008Date of Patent: March 11, 2014Assignee: Panasonic CorporationInventors: Tatsuhiro Mizukami, Kiyoshi Arita, Masaru Nonomura -
Patent number: 8585862Abstract: An object is to provide a plasma processing device capable of highly accurately monitoring an operation state including whether or not the plasma discharge is executed, whether the discharge is normal or abnormal and whether or not the maintenance work of the vacuum chamber is necessary. A discharge detection sensor 23, in which a dielectric member 21 and a probe electrode unit 22 are combined with each other, is attached to an opening portion 2a provided in a lid portion 2 composing a vacuum chamber. A change in electric potential induced according to a change in plasma discharge in a probe electrode is received by a plurality of wave-form detecting portions and a detection signal is outputted each time a change in electric potential agreeing with a predetermined different condition appears. The detection signal outputted from the corresponding wave-form detecting portion is counted by the plurality of wave-form detecting portions and the counted value is held.Type: GrantFiled: August 21, 2008Date of Patent: November 19, 2013Assignee: Panasonic CorporationInventors: Tatsuhiro Mizukami, Kiyoshi Arita, Masaru Nonomura
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Patent number: 8558460Abstract: A plasma processing apparatus includes: a vacuum chamber; a plasma processing execution portion; a discharge state detecting unit; a window portion; a camera; a first storing portion; a second storing portion; and an image data extracting unit. The image data extracting unit extracts at least moving image data, which show the generation state of the abnormal discharge, from the first storing portion and stores the extracted moving image data in the second storing portion when the discharge state detecting unit detects the abnormal discharge.Type: GrantFiled: January 25, 2010Date of Patent: October 15, 2013Assignee: Panasonic CorporationInventors: Masaru Nonomura, Hiroshi Haji, Kiyoshi Arita
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Patent number: 8450933Abstract: A plasma processing apparatus includes a vacuum chamber, a plasma processing execution portion, a discharge state detecting unit, a window portion, a camera, a first storing portion, a second storing portion and an image data extracting unit. When an abnormal discharge is detected, the image data extracting unit extracts at least moving image data showing a generation state of the abnormal discharge from the first storing portion and stores the extracted moving image data in the second storing portion. When plasma processing is ended without the detection of the abnormal discharge, the image data extracting unit extracts, from the first storing portion, moving image data of a predetermined specific period or still image data of a specific period derived from the moving image data of the first storing portion and stores the extracted moving image data or the extracted still image data in the second storing portion.Type: GrantFiled: January 25, 2010Date of Patent: May 28, 2013Assignee: Panasonic CorporationInventors: Masaru Nonomura, Hiroshi Haji, Kiyoshi Arita
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Patent number: 8383436Abstract: By performing plasma etching on the second surface of a semiconductor wafer on the first surface of which an insulating film is placed in dividing regions and on the second surface of which a mask for defining the dividing regions are placed, the second surface being located opposite from the first surface, the insulating film is exposed from an etching bottom portion by removing portions that correspond to the dividing regions. Subsequently, by continuously performing the plasma etching in the state in which the exposed insulating film is surface charged with electric charge due to ions in the plasma, corner portions put in contact with the insulating film are removed in the device-formation-regions. Consequently, individualized semiconductor chips having a high transverse rupture strength are manufactured.Type: GrantFiled: January 23, 2006Date of Patent: February 26, 2013Assignee: Panasonic CorporationInventor: Kiyoshi Arita
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Patent number: 8293652Abstract: To provide a substrate processing method and a semiconductor chip manufacturing method that enable low-cost formation of a mask for etching using plasma etching. During formation of a mask used in plasma dicing for separating a semiconductor wafer 1 into discrete semiconductor chips 1e by means of etching using plasma processing, there is adopted a method including printing a lyophobic liquid in an area on a rear surface 1b that is to be an objective of etching, thereby forming a lyophobic pattern made up of lyophobic films 3; supplying a low viscosity resin 4a and a high viscosity resin 4b, in this sequence, to the rear surface 1b on which the lyophobic pattern is formed, thereby forming a resin film 4 that is thicker than the lyophobic films 3 in an area where the lyophobic films 3 are not present; and curing the resin film 4, to thus form a mask 4* that covers an area except for the area to be etched.Type: GrantFiled: April 9, 2010Date of Patent: October 23, 2012Assignee: Panasonic CorporationInventors: Kiyoshi Arita, Teruaki Nishinaka
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Patent number: 8288284Abstract: To provide a substrate processing method and a semiconductor chip manufacturing method that enable low-cost formation of a mask for etching using plasma etching. During formation of a mask used in plasma dicing for separating a semiconductor wafer 1 into discrete semiconductor chips 1e by means of etching using plasma processing, there is adopted a method including printing a lyophobic liquid in an area on a rear surface 1b that is to be an objective of etching, thereby forming a lyophobic pattern made up of lyophobic films 3; supplying a low viscosity resin 4a and a high viscosity resin 4b, in this sequence, to the rear surface 1b on which the lyophobic pattern is formed, thereby forming a resin film 4 that is thicker than the lyophobic films 3 in an area where the lyophobic films 3 are not present; and curing the resin film 4, to thus form a mask 4* that covers an area except for the area to be etched.Type: GrantFiled: April 9, 2010Date of Patent: October 16, 2012Assignee: Panasonic CorporationInventors: Kiyoshi Arita, Hiroshi Haji
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Patent number: 8158494Abstract: A mask used when a semiconductor wafer is diced into individual semiconductor chips by plasma etching is formed as follows. First, a pattern of a liquid-repellent film is formed by printing a liquid-repellent liquid on the area to be etched on the rear surface of the semiconductor wafer. Next, a resin film thicker than the liquid-repellent film is formed in the area not having the liquid-repellent film by supplying a liquid resin to the rear surface on which the liquid-repellent pattern has been formed. Then, the resin film is cured to form the mask covering the area other than the area to be removed by the etching. This method allows the formation of an etching mask without using a high-cost method such as photolithography.Type: GrantFiled: March 24, 2009Date of Patent: April 17, 2012Assignee: Panasonic CorporationInventors: Hiroshi Haji, Kiyoshi Arita
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Patent number: 8110481Abstract: To provide a method of segmenting a semiconductor wafer, which is capable of preventing chippings. A semiconductor wafer 1 is partitioned into a circumferential ring-shaped region 1a and a segmentation region placed in the inner side of the ring-shaped region 1a. The semiconductor wafer 1 included in the segmentation region is cut into the form of a lattice along a plurality of perpendicular cutting lines 4 and is segmented into a plurality of chips 2. On the other hand, the semiconductor wafer 1 included in the ring-shaped region 1a is cut along two partition lines 5 extending in parallel to the cutting lines 4 from the center O of the semiconductor wafer 1 and is partitioned into four independent regions.Type: GrantFiled: August 7, 2008Date of Patent: February 7, 2012Assignee: Panasonic CorporationInventors: Kiyoshi Arita, Atsushi Harikai
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Publication number: 20120021608Abstract: To provide a substrate processing method and a semiconductor chip manufacturing method that enable low-cost formation of a mask for etching using plasma etching. During formation of a mask used in plasma dicing for separating a semiconductor wafer 1 into discrete semiconductor chips 1e by means of etching using plasma processing, there is adopted a method including printing a lyophobic liquid in an area on a rear surface 1b that is to be an objective of etching, thereby forming a lyophobic pattern made up of lyophobic films 3; supplying a low viscosity resin 4a and a high viscosity resin 4b, in this sequence, to the rear surface 1b on which the lyophobic pattern is formed, thereby forming a resin film 4 that is thicker than the lyophobic films 3 in an area where the lyophobic films 3 are not present; and curing the resin film 4, to thus form a mask 4* that covers an area except for the area to be etched.Type: ApplicationFiled: April 9, 2010Publication date: January 26, 2012Applicant: PANASONIC CORPORATIONInventors: Kiyoshi Arita, Hiroshi Haji
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Publication number: 20120015522Abstract: To provide a substrate processing method and a semiconductor chip manufacturing method that enable low-cost formation of a mask for etching using plasma etching. During formation of a mask used in plasma dicing for separating a semiconductor wafer 1 into discrete semiconductor chips 1e by means of etching using plasma processing, there is adopted a method including printing a lyophobic liquid in an area on a rear surface 1b that is to be an objective of etching, thereby forming a lyophobic pattern made up of lyophobic films 3; supplying a low viscosity resin 4a and a high viscosity resin 4b, in this sequence, to the rear surface 1b on which the lyophobic pattern is formed, thereby forming a resin film 4 that is thicker than the lyophobic films 3 in an area where the lyophobic films 3 are not present; and curing the resin film 4, to thus form a mask 4* that covers an area except for the area to be etched.Type: ApplicationFiled: April 9, 2010Publication date: January 19, 2012Applicant: Panasonic CorporationInventors: Kiyoshi Arita, Teruaki Nishinaka
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Publication number: 20110277933Abstract: A plasma processing apparatus includes: a vacuum chamber; a plasma processing execution portion; a discharge state detecting unit; a window portion; a camera; a first storing portion; a second storing portion; and an image data extracting unit. The image data extracting unit extracts at least moving image data, which show the generation state of the abnormal discharge, from the first storing portion and stores the extracted moving image data in the second storing portion when the discharge state detecting unit detects the abnormal discharge.Type: ApplicationFiled: January 25, 2010Publication date: November 17, 2011Applicant: PANASONIC CORPORATIONInventors: Masaru Nonomura, Hiroshi Haji, Kiyoshi Arita
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Publication number: 20110273094Abstract: A plasma processing apparatus includes a vacuum chamber, a plasma processing execution portion, a discharge state detecting unit, a window portion, a camera, a first storing portion, a second storing portion and an image data extracting unit. When an abnormal discharge is detected, the image data extracting unit extracts at least moving image data showing a generation state of the abnormal discharge from the first storing portion and stores the extracted moving image data in the second storing portion. When plasma processing is ended without the detection of the abnormal discharge, the image data extracting unit extracts, from the first storing portion, moving image data of a predetermined specific period or still image data of a specific period derived from the moving image data of the first storing portion and stores the extracted moving image data or the extracted still image data in the second storing portion.Type: ApplicationFiled: January 25, 2010Publication date: November 10, 2011Applicant: PANASONIC CORPORATIONInventors: Masaru Nonomura, Hiroshi Haji, Kiyoshi Arita
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Patent number: 8026181Abstract: By performing plasma etching on the second surface of a semiconductor wafer on the first surface of which an insulating film is placed in dividing regions and on the second surface of which a mask for defining the dividing regions are placed, the second surface being located opposite from the first surface, the insulating film is exposed from an etching bottom portion by removing portions that correspond to the dividing regions. Subsequently, by continuously performing the plasma etching in the state in which the exposed surfaces of the insulating film are charged with electric charge due to ions in the plasma, corner portions put in contact with the insulating film are removed. Subsequently, by removing the mask and thereafter performing plasma etching on the second surface, corner portions located on the second surface side are removed.Type: GrantFiled: April 11, 2006Date of Patent: September 27, 2011Assignee: Panasonic CorporationInventors: Kiyoshi Arita, Akira Nakagawa
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Patent number: 8012805Abstract: In a manufacturing method for performing plasma etching on a second surface of a semiconductor wafer that has a first surface where an insulating film is placed in dividing regions and the second surface which is opposite from the first surface and on which a mask for defining the dividing regions is placed thereby exposing the insulating film from etching bottom portions by removing portions that correspond to the dividing regions and subsequently continuously performing the plasma etching in the state in which the exposed surfaces of the insulating film are charged with electric charge due to ions in the plasma thereby removing corner portions put in contact with the insulating film in the device-formation-regions, isotropic etching is performed on the semiconductor wafer at any timing.Type: GrantFiled: April 11, 2006Date of Patent: September 6, 2011Assignee: Panasonic CorporationInventors: Kiyoshi Arita, Akira Nakagawa
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Patent number: 7994026Abstract: A plasma dicing apparatus in which a semiconductor wafer with a protective sheet stuck thereonto covering the entire circuit-forming surface and with an etching-resistant mask member stuck on the back surface opposite to the circuit-forming surface is mounted on a mounting stage; plasma etching is performed using the mask member as a mask; and the semiconductor wafer is diced into plural semiconductor chips. The plasma dicing apparatus includes a ring-shaped frame member retaining the outer circumference of the mask member extending off the outer circumference of the semiconductor wafer. The mounting stage is composed of a wafer supporting part supporting a semiconductor wafer and a frame member supporting part supporting the frame member. This facilitates carrying a semiconductor wafer into and out of the vacuum chamber.Type: GrantFiled: November 12, 2008Date of Patent: August 9, 2011Assignee: Panasonic CorporationInventors: Atsushi Harikai, Kiyoshi Arita, Tetsuhiro Iwai