Abstract: A method of plasma-processing a silicon-based substrate provides a mirror-like etched surface of the substrate. A silicon wafer having a protective tape affixed to a circuit-formed side of the wafer is mounted on a mounting unit disposed within a process chamber of a plasma processing apparatus while the protective tape contacts on the mounting unit. The surface of the silicon wafer is kept at a temperature of 40° C. or above when the surface of the substrate is etched by plasma generated by plasma discharge in plasma-generating gas including fluorine-containing gas fed into the process chamber. This suppressing adhesion and accumulation of a reaction product of the fluorine-containing gas with respect to the surface to be etched, and consequently, provides the surface with uniform etching.

Abstract: A surface treatment method for thinning a silicon based substrate obtains a milky-dull color on an overall surface uniformly of the silicon based substrate. To be more specific, a surface opposite to a circuit-formed surface is mechanically polished, then the surface is etched using inert gas such as argon gas for producing plasma. This etching forms micro dimples uniformly on the surface. Next, the surface is further etched using fluorine based gas for producing plasma. This etching obtains a milky-dull color uniformly on the surface. As a result, printed marks on the surface can be read with ease, and pick-up errors in die-bonding can be reduced.

Abstract: There is disclosed a method of the plasma cleaning of a chip-mounted board, in which the destruction of a chip due to the charge build-up in a land during the plasma cleaning is prevented. There is provided a mask member for covering a board placed on a plasma-generating electrode. This mask member has openings through which the chip, mounted on the land on the board, and electrodes on the board are exposed, respectively, and an exposed portion of the land, extending outwardly of the chip, and a conducting portion on the board are covered with the mask member. A high-frequency voltage is applied to the plasma-generating electrode, thereby producing plasm within a vacuum chamber, so that ions Ar+ impinge on pads on the chip to clean and charge up these pads. The land is covered with the mask member, and therefore will not be charged up with the ions Ar+ and electrons e−.

Abstract: A method of plasma processing a silicon-containing object to be processed at a high etching rate without causing a surface of the object to have a hazy appearance, so that this surface can have an excellent visual quality. In the plasma processing method of etching the surface of the semiconductor wafer, gas containing sulfur hexafluoride and helium is used as a plasma-generating gas. A fluorine radical as an active substance which reacts with silicon of the surface of the semiconductor wafer, gaseous silicon tetrafluoride yielded by the reaction and a compound (SFn) of fluorine and sulfur that is generated as a reaction product are removed by the helium gas functioning as carrier gas. The helium gas prevents the reaction product from adhering to the surface of the wafer again.

Abstract: A plasma process apparatus performing an even plasma processing over the entire surface of a substrate, without accompanying thermal damage, and method of the plasma processing. In a process room 2, where a semiconductor wafer 4 is placed on a lower electrode 3 for processing with plasma, the semiconductor wafer 4 which has been fixed on a resin sheet 4a whose thermal expansion coefficient is greater than that of the semiconductor wafer 4 is pressed at the circumference edge by a substrate holding device 5 onto the surface of lower electrode 3. In such a setup, central portion of the semiconductor wafer can also be pressed onto the lower electrode 3 via the resin sheet 4a. Thus, there will be no gap between the surface of lower electrode 3 and the substrate, which contributes to eliminate thermal damages due to abnormally high temperature and to avoid a local discharge.

Abstract: In a plasma processing apparatus and method in which a high-frequency voltage is applied to a discharging electrode to generate a plasma in a vacuum chamber, thereby performing a plasma processing for a substrate on the discharging electrode, a voltage of a discharging circuit for producing a plasma discharge is detected by a monitor control unit. The detection is made by virtue of a resistor inserted in a circuit connecting the discharging circuit and a matching unit which takes the matching in impedance between a high-frequency power supply unit and the discharging circuit. The high-frequency power supply unit is controlled on the basis of the result of detection. Also, the result of detection is compared with a reference value obtained in an initial state in which no deposited layer exists in the vacuum chamber. The comparison is made for estimating a time dependent change in internal state of the vacuum chamber.

Abstract: A semiconductor wafer processing apparatus grinds a surface of a semiconductor wafer by mechanical grinding, and then removes a damaged layer in the ground surface. In the processing apparatus, a grinding portion, a precenter portion, a wafer cleaning portion, plasma treatment portions, and magazines are arranged radially about an origin of a polar coordinate system of a third wafer transport portion having a robot mechanism, and their positions of arrangement are set such that the origin is located on lines of extension of wafer carry-in and carry-out center lines of the plasma treatment portions. Thus, the number of changed grippings of the semiconductor wafer can be minimized to prevent breakage of the semiconductor wafer. Moreover, transfer of the semiconductor wafer between the respective portions can be covered by the single robot mechanism, and the equipment can be made compact.

Abstract: The method of manufacturing a semiconductor device of the present invention comprises: forming a resin layer on a surface of a semiconductor wafer on which a plurality of semiconductor elements are formed, forming through-holes on the resin layer, a first cutting of either the semiconductor wafer or the resin layer, mounting conductive balls on the through-hole, connecting the conductive ball to electrodes of the semiconductor element, and a second cutting for dividing the wafer into each piece of semiconductor devices. With the processes of the present invention, conductive balls can be easily and effectively mounted on a wafer under optimum conditions, without failure such as slipping or falling down from the required position. This fact contributes to an increased efficiency and a good productivity in the production of semiconductor devices.

Abstract: A plasma treatment apparatus according to the present invention includes a vacuum chamber, an upper electrode and a lower electrode disposed in the vacuum chamber, a high-frequency power supply for applying a high-frequency voltage, a space adjusting device for adjusting the spacing between the two electrodes, and a workpiece-transfer-device for transferring to and from a space between the two electrodes. The plasma treatment apparatus can decrease the spacing between the two electrodes and thereby increase the etching rate. Further, the workpiece can be easily transferred to and from the space between the two electrodes by opening the spacing.

Abstract: A plasma etching apparatus and a plasma etching method for conducting a plasma etching treatment for a substrate to be treated placed on one of parallel plate electrodes disposed oppositely to each other in a treatment chamber, wherein gas supplying device is used to supply a mixed gas including oxygen and a fluorine gas in the treatment chamber and the plasma discharge is conducted between the parallel plate electrodes under the condition that the product PL of a distance L[m] between the plate electrodes and the pressure P[Pa] of the mixed gas in the treatment chamber takes a value within 2.5[Pa·m] to 15[Pa·m] so as to efficiently perform an etching treatment, at a low cost, and in uniform.

Abstract: A wire bonding method includes the steps of a lowering a capillary tool supplying a wire, restraining the lowering of the capillary tool, and wire bonding the wire to a bonding face. The inertial force of the capillary tool is reduced to almost zero by restraining the lowering of the capillary tool. As a result, wire bonding is performed under proper bonding force since no bonding force is applied to a ball on the tip of wire from the inertial force of the capillary tool. The bonding force is provided using torque control from an electric motor which lowers the capillary tool.

Abstract: A measuring device 40 measures an ultrasonic waveform provided to an inspection tool 1. A target energy memory section 45 memorizes a target energy consumed by the inspection tool 1 when the inspection tool 1 is depressed on the soldered portion of an electronic component which is properly soldered on a substrate. A reference waveform memory section 44 memorizes a reference waveform corresponding to an ultrasonic waveform measured in a no load condition of the inspection tool 1. A CPU 43 makes a judgement on whether the soldering condition of the soldered portion of the electronic component is acceptable or not based on a difference between the reference waveform and the waveform measured by the measuring device 40.

Abstract: A process for manufacturing electronic components known as TAB method comprises a process employing a single apparatus for forming bumps in a chip, a process of inner lead bonding for bonding said bumps to leads of a film carrier, and a process of outer lead bonding for bonding the leads to a circuit board after punching said film carrier. The bumps are formed by plating means or by stud bump means using a capillary tool. In another aspect of the invention there is provided an apparatus by which it is possible to form the bumps and to perform the inner lead bonding in a single apparatus. The capillary tool for forming the inner lead bonding and a pressing tool for the inner lead bonding are replaceably and selectively mounted to be held on a horn. Also, there are provided a pickup head for moving the chip furnished in a chip feeding unit to the chip stage and a moving table for moving the chip stage.

Abstract: A process for manufacturing electronic components known as TAB method comprises a process employing a single apparatus for forming bumps in a chip, a process of inner lead bonding for bonding said bumps to leads of a film carrier, and a process of outer lead bonding for bonding the leads to a circuit board after punching said film carrier. The bumps are formed by plating means or by stud bump means using a capillary tool. In another aspect of the invention there is provided an apparatus by which it is possible to form the bumps and to perform the inner lead bonding in a single apparatus. The capillary tool for forming the inner lead bonding and a pressing tool for the inner lead bonding are replaceably and selectively mounted to be held on a horn. Also, there are provided a pickup head for moving the chip furnished in a chip feeding unit to the chip stage and a moving table for moving the chip stage.