Abstract: A plasma processing apparatus includes a stage which is a lower electrode, an upper electrode which is a counter electrode for the lower electrode, and a processing chamber in which the lower and the upper electrodes are placed. The apparatus supplies a gas to a plasma generation space located between the lower and the upper electrodes to generate a plasma so that a processing object is subjected to plasma processing. In the apparatus, the upper electrode is formed up of a body portion having a gas supply port, a gas-permeable porous plate located on the underside of the body portion so as to close the gas supply port, and a support member for supporting the outer edge portion of the porous plate. Slits for absorption of strain due to thermal expansion in the plasma processing are formed at a pitch in the outer edge portion of the porous plate.

Abstract: In a method of manufacturing semiconductor chips by dicing individual semiconductor devices from a semiconductor wafer, masks formed for plasma dicing in which a semiconductor wafer is divided by conducting plasma etching are removed by mechanical grinding using a grinding head. Accordingly, by removing the masks for plasma dicing using mechanical grinding, generation of reaction products is prevented when removing the masks, so that the dicing can be conducted without causing quality deterioration due to the accumulated particles.

Abstract: In a semiconductor wafer including a plurality of imaginary-divided-regions which are partitioned by imaginary-dividing-lines that are respectively arranged in a grid-like arrangement on the semiconductor wafer and a circumferential line that is the outer periphery outline of the semiconductor wafer, a mask is placed so as to expose an entirety of surfaces of the wafer corresponding to respective removal-regions, the removal-regions being regions in approximately triangular form partitioned by the circumferential line of the wafer and the imaginary-dividing-lines and being some of the imaginary-divided-regions, and then plasma etching is performed on a mask placement-side surface, by which the semiconductor wafer is divided into the individual semiconductor devices along dividing lines while portions correspond to the removal-regions in the wafer are removed.

Abstract: In a plasma processing apparatus for generating a plasma in a plasma generation space between a lower electrode and an upper electrode so that a processing object mounted on the lower electrode is subjected to plasma processing, a plurality of cutout portions for absorption of strain caused by thermal expansion due to rapid temperature increases in the plasma processing are formed at an equal pitch in an outer edge portion of a gas shower plate included in the upper electrode. Thus, the gas shower plate can be prevented from being damaged by occurrence of cracks in the outer edge portion of the gas shower plate or the like.

Abstract: By forming dividing-groove portions in accordance with dividing regions on the second surface of a semiconductor wafer where an insulating film is placed in the dividing regions of the first surface and performing etching of the entire second surface and the surfaces of the dividing-groove portions by performing plasma etching from the second surface, corner portions on the second surface side are removed, while the insulating film is exposed from the etching bottom portion by removing the dividing-groove portions in the dividing regions. And by continuously performing the plasma etching in a state in which the exposed insulating film is surface charged with electric charge due to ions in plasma, corner portions on the first surface side put in contact with the insulating film are removed, and semiconductor chips that have a high transverse rupture strength are provided.

Abstract: In a manufacturing method for performing plasma etching on a second surface of a semiconductor wafer that has a first surface where an insulating film is placed in dividing regions and the second surface which is opposite from the first surface and on which a mask for defining the dividing regions is placed thereby exposing the insulating film from etching bottom portions by removing portions that correspond to the dividing regions and subsequently continuously performing the plasma etching in the state in which the exposed surfaces of the insulating film are charged with electric charge due to ions in the plasma thereby removing corner portions put in contact with the insulating film in the device-formation-regions, isotropic etching is performed on the semiconductor wafer at any timing.

Abstract: With use of a length-dimension of a second-line-segment of a unit-device-formation-region as an arrangement interval, a plurality of parallel lines are disposed in a device-formation-effective-region on a wafer so as to form a plurality of parallel-line-partition-regions, the unit-device-formation-regions are arranged in each of the parallel-line-partition-regions independently of and separately from other parallel-line-partition-regions so that the acquisition number of the unit-device-formation-regions is maximized, and an arrangement of the respective unit-device-formation-regions in the respective parallel-line-partition-regions is determined as an arrangement of the entire device-formation-effective-region.

Abstract: By performing plasma etching on the second surface of a semiconductor wafer on the first surface of which an insulating film is placed in dividing regions and on the second surface of which a mask for defining the dividing regions are placed, the second surface being located opposite from the first surface, the insulating film is exposed from an etching bottom portion by removing portions that correspond to the dividing regions. Subsequently, by continuously performing the plasma etching in the state in which the exposed surfaces of the insulating film are charged with electric charge due to ions in the plasma, corner portions put in contact with the insulating film are removed. Subsequently, by removing the mask and thereafter performing plasma etching on the second surface, corner portions located on the second surface side are removed.

Abstract: After a film layer 6 formed from a die attach film 4 and a UV tape 5 has been provided as a mask on a semiconductor wafer 1, boundary trenches 7 for partitioning semiconductor elements 2 formed on a circuit pattern formation surface 1a are formed in the film layer 6, thereby making a surface 1c of a semiconductor wafer 1 exposed. The exposed surface 1c of the semiconductor wafer 1 in the boundary trenches 7 is etched by means of plasma of a fluorine-based gas, and the semiconductor wafer 1 is sliced into semiconductor chips 1? along the boundary trenches 7.

Abstract: In a semiconductor wafer that has semiconductor devices arranged in a plurality of device-formation-regions and a TEG placed in dividing regions that define the device-formation-regions, a TEG-placement portion is arranged in the dividing regions partially expanded in width, and the TEG is placed in the TEG-placement portion. And, a protective sheet is stuck to the semiconductor wafer, then plasma etching is performed, and the TEG in a state where it remains in the dividing region and stuck to the protective sheet is removed together with the protective sheet by peeling off the protective sheet, thereby the device-formation-regions are divided into individual pieces, and the semiconductor chips are manufactured.

Abstract: In a surface treating apparatus using atomic hydrogen for causing atomic hydrogen to come in contact with a treating object 5 such as a substrate accommodated in a treating chamber 3, thereby carrying out a surface treatment, an atomic hydrogen generator 11 having the function of generating the atomic hydrogen by causing a hydrogen gas to come in contact with a tungsten heater incorporated into a heater cassette 12 in a generating chamber 21a, and the treating chamber 3 can communicate with each other through an opening portion 2c for introduction, and the opening portion 2c for introduction is constituted to be freely opened and closed by means of a shutter member 7. Consequently, it is possible to maintain the generating chamber 21a into a pressure reducing state irrespective of the state of the treating chamber 3, thereby eliminating a waiting time for raising a temperature of the tungsten heater and cooling the tungsten heater.

Abstract: The semiconductor chip manufacturing process is carried out in processes including a protective sheet sticking process for sticking a protective sheet onto a first surface of a semiconductor wafer so that the sheet comes in contact with the TEG, a mask placing process for placing a mask on a second surface that is a surface opposite from the first surface, a plasma etching process for performing plasma etching from the second surface to remove portions corresponding to dividing regions and separate device-formation-regions into individual semiconductor chips, and a TEG removing process for removing the TEG in a state where it remains unremoved in the dividing regions and stuck to the protective sheet together with the protective sheet by peeling off the protective sheet.

Abstract: By performing plasma etching on the second surface of a semiconductor wafer on the first surface of which an insulating film is placed in dividing regions and on the second surface of which a mask for defining the dividing regions are placed, the second surface being located opposite from the first surface, the insulating film is exposed from an etching bottom portion by removing portions that correspond to the dividing regions. Subsequently, by continuously performing the plasma etching in the state in which the exposed insulating film is surface charged with electric charge due to ions in the plasma, corner portions put in contact with the insulating film are removed in the device-formation-regions. Consequently, individualized semiconductor chips having a high transverse rupture strength are manufactured.

Abstract: For a plasma processing apparatus that performs an etching process for the face of a wafer opposite the circuit formation face, ceramic insulating films having a ring shape are positioned on the mounting face of an electrode member in consonance with the location of a large wafer or a small wafer. When a large wafer is employed, a ring member is attached. And when a small wafer is employed, a blocking member is mounted to hide a gap between the insulating films deposited on the mounting face 3b and to cover suction holes. Further, a cover member is attached to cover the blocking member from the top. With this arrangement, the plasma process can be performed, using the same electrode member, for wafers having different sizes.

Abstract: In a plasma treating apparatus, a ceramic porous substance having a three-dimensional network structure in which a frame portion formed of ceramic containing alumina is provided continuously like a three-dimensional network is used for the material of an electrode member for the plasma treating apparatus to be attached to the front surface of a gas supplying port of an electrode for plasma generation, and a gas for plasma generation is caused to pass through a hole portion formed irregularly in the three-dimensional network structure. Consequently, the distribution of the gas to be supplied is made uniform to prevent an abnormal discharge so that uniform etching having no variation can be carried out.

Abstract: In a plasma treating apparatus, a ceramic porous substance having a three-dimensional network structure in which a frame portion 18a formed of ceramic containing alumina is provided continuously like a three-dimensional network is used for the material of an electrode member 17 for the plasma treating apparatus to be attached to the front surface of a gas supplying port of an electrode for plasma generation, and a gas for plasma generation is caused to pass through a hole portion 18b formed irregularly in the three-dimensional network structure. Consequently, the distribution of the gas to be supplied is made uniform to prevent an abnormal discharge so that uniform etching having no variation can be carried out.

Abstract: In a method of cutting a semiconductor wafer in which the semiconductor wafer 6 is cut by plasma etching, a protective sheet 30 on which a metallic layer 30b, a plasma etching rate of which is low, is formed on one face of an insulating sheet 30a is stuck on to a circuit forming face 6a by an adhesive layer 30c, and plasma is exposed onto an opposite side to the circuit forming face 6a from a mask side which is formed by covering regions except for cutting lines 31b with a resist film 31a so as to conduct plasma etching on portions of the cutting lines. Due to the above structure, it is possible to use the metallic layer as an etching stop layer for suppressing the progress of etching. Therefore, fluctuation of the progress of etching can be avoided and heat damage caused on the protective sheet can be prevented.

Abstract: In a plasma processing apparatus for plasma-processing a silicon wafer 6 to which a protective film 6a is stuck in a state that the silicon wafer 6 is held by a first electrode 3 by electrostatic absorption and is being cooled, the top surface 3g of the first electrode 3 consists of a top surface central area A that is inside a boundary line P2 that is distant inward by a prescribed length from the outer periphery P1 of the silicon wafer 6 and in which the conductor is exposed, and a ring-shaped top surface peripheral area B that surrounds the top surface central area A and in which the conductor is covered with an insulating coating 3f. This structure makes it possible to hold the silicon wafer 6 by sufficient electrostatic holding force by bringing the silicon wafer 6 into direct contact with the conductor and to increase the cooling efficiency by virtue of heat conduction from the silicon wafer 6 to the first electrode 3.

Abstract: On a mask placement-side surface of a semiconductor wafer in which a plurality of semiconductor devices are formed, a mask is placed, while dicing lines for dicing the semiconductor wafer into the respective separate semiconductor devices are defined and a surface of a flawed semiconductor device among the respective semiconductor devices is partially exposed, and then plasma etching is applied to the mask placement-side surface of the semiconductor wafer so as to dice the semiconductor wafer into the respective semiconductor devices along the defined dicing lines, and an exposed portion of the flawed semiconductor device is removed so as to form a removed portion as a flawed semiconductor device distinguishing mark.

Abstract: With use of a length-dimension of a second-line-segment of a unit-device-formation-region as an arrangement interval, a plurality of parallel lines are disposed in a device-formation-effective-region on a wafer so as to form a plurality of parallel-line-partition-regions, the unit-device-formation-regions are arranged in each of the parallel-line-partition-regions independently of and separately from other parallel-line-partition-regions so that the acquisition number of the unit-device-formation-regions is maximized, and an arrangement of the respective unit-device-formation-regions in the respective parallel-line-partition-regions is determined as an arrangement of the entire device-formation-effective-region.