Patents by Inventor Koichi Kokubun

Koichi Kokubun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140055655
    Abstract: According to one embodiment, a solid-state imaging device includes: a photodiode which is provided in a pixel region in which each pixel in a pixel forming region above a substrate is disposed; an interconnection layer which includes interconnections to connect the photodiode to peripheral circuits and an interlayer insulating film to insulate the interconnections from each other, and is provided above the photodiode; a color filter which is provided above the interconnection layer corresponding to the pixel region, and limits a wavelength of light incident on the photodiode. A light incident position correcting layer is provided between the color filter corresponding to the pixel disposed in at least the outer peripheral portion of the pixel forming region and the interconnection layer, and includes an anti-reflection film which is provided above the interconnection layer, and materials which have a negative refraction index and provided above the anti-reflection film.
    Type: Application
    Filed: November 26, 2012
    Publication date: February 27, 2014
    Inventor: Koichi KOKUBUN
  • Publication number: 20130248865
    Abstract: According to an embodiment, a solid-state imaging device includes a photoelectric, conversion element. The photoelectric conversion element includes a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer. In the solid-state imaging device, D2m3/L2m3×ni32/N2<D1M2/L1M2×ni22/N2 and D1m1/L1m1×ni12/N1<D1m2/L1m2×ni22/N1 are established.
    Type: Application
    Filed: December 28, 2012
    Publication date: September 26, 2013
    Inventors: Shuichi TORIYAMA, Koichi KOKUBUN, Hiroki SASAKI
  • Patent number: 8541858
    Abstract: A solid state imaging device includes: a first photoelectric conversion layer of an organic material; a second photoelectric conversion layer of an inorganic material; a third photoelectric conversion layer of an inorganic material; a first filter of an inorganic material; a second filter of an inorganic material. The first photoelectric conversion layer photoelectrically-converts a light of a first color. The first filter is disposed between the first photoelectric conversion layer and the second photoelectric conversion layer to selectively guide a light of a second color, out of a light that passed through the first photoelectric conversion layer, to the second photoelectric conversion layer. The second filter being disposed between the first photoelectric conversion layer and the third photoelectric conversion layer to selectively guide a light of a third color, out of the light that passed through the first photoelectric conversion layer, to the third photoelectric conversion layer.
    Type: Grant
    Filed: March 21, 2011
    Date of Patent: September 24, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Koichi Kokubun
  • Publication number: 20130240708
    Abstract: A solid-state image pickup device including a pixel array having a plurality of pixels, each of which includes a photoelectric converting unit and a multilayer interference filter. The multilayer interference filter includes an upper laminated structure, a lower laminated structure, and a control structure. Both the multilayer interference filter in a first pixel and the multilayer interference filter in a second pixel which is more distant from a center of the pixel array than the first pixel are disposed to selectively guide a light having a first color to the photoelectric converting unit. The control structure in the first pixel and the control structure in the second pixel have different configurations from each other in such a manner that a filter characteristic of the multilayer interference filter in the first pixel is equivalent to that of the multilayer interference filter in the second pixel.
    Type: Application
    Filed: August 27, 2012
    Publication date: September 19, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Koichi KOKUBUN
  • Publication number: 20130154041
    Abstract: According to one embodiment, there is provided a solid-state image sensor including a photoelectric conversion layer, and a multilayer interference filter. The multilayer interference filter is arranged to conduct light of a particular color, of incident light, selectively to the photoelectric conversion layer. The multilayer interference filter has a laminate structure in which a first layer having a first refraction index and a second layer having a second refraction index are repeatedly laminated, and a third layer which is in contact with a lower surface of the laminate structure and has a third refraction index. A lowermost layer of the laminate structure is the second layer. The third refraction index is not equal to the first refraction index and is higher than the second refraction index.
    Type: Application
    Filed: August 31, 2012
    Publication date: June 20, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Koichi Kokubun, Yusaku Konno
  • Patent number: 8461659
    Abstract: According to one embodiment, in the upper laminated structure, first layers and second layers are alternately laminated, the first layer and the second layer having different refractive indices. In the lower laminated structure, first layers and second layers are alternately laminated, the first layer and the second layer having different refractive indices. The upper laminated structure and the lower laminated structure are equal in number of layers laminated therein. Each of the lowermost layer of the upper laminated structure and the uppermost layer of the lower laminated structure are configured by the first layer. The upper laminated structure and the lower laminated structure are configured to be asymmetric to each other such that, within some layer sets out of a plurality of layer sets each including two layers disposed at corresponding positions in the upper and lower laminated layers, one layer of the two layers in each layer set of the some layer sets is thinner than the other layer.
    Type: Grant
    Filed: March 21, 2011
    Date of Patent: June 11, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Kokubun, Kazufumi Shiozawa
  • Publication number: 20130134538
    Abstract: According to an embodiment, an image sensor is provided for photoelectrically converting blue light, green light and red light for each pixel. A photoelectric conversion layer for red light is provided having a light absorption coefficient that is different than the light absorption coefficient of the photoelectric conversion layers for blue light and green light.
    Type: Application
    Filed: November 19, 2012
    Publication date: May 30, 2013
    Inventors: Maki SATO, Koichi Kokubun
  • Publication number: 20130113964
    Abstract: According to one embodiment, a pixel detecting light having the longest wavelength in a picture element includes a protective film which is disposed on a photodiode at a surface side facing a light incident surface of a semiconductor substrate and a first diffraction grating portion which is disposed on the protective film and where columnar holes penetrating in a thickness direction are two-dimensionally arrayed. Diameter and array period of the holes are selected so that the first diffraction grating portion reflects light transmitting through a filter disposed on the pixel.
    Type: Application
    Filed: August 29, 2012
    Publication date: May 9, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiroki SASAKI, Koichi KOKUBUN
  • Publication number: 20130093034
    Abstract: According to one embodiment, there is provided a solid-state imaging device including a first photoelectric conversion layer and a color filter. The color filter includes a multi-layer interference filter and a guided mode resonant grating. The guided mode resonant grating includes a plurality of diffraction gratings and a plurality of inter-grating regions. The plurality of diffraction gratings are formed of a material having a first index of refraction and periodically arrayed at least one-dimensionally. The plurality of inter-grating regions are arranged between at least the plurality of diffraction gratings. Each of the plurality of inter-grating regions includes an insulating film region and an air gap region. The insulating film region is formed of a material having a second index of refraction lower than the first index of refraction.
    Type: Application
    Filed: August 31, 2012
    Publication date: April 18, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Koichi KOKUBUN, Yusaku Konno
  • Publication number: 20130057738
    Abstract: According to one embodiment, a solid-state imaging element includes a substrate, and a plurality of color filters. A plurality of photoelectric conversion units is provided in the substrate. The plurality of color filters is provided respectively for the plurality of photoelectric conversion units. The plurality of color filters is configured to selectively transmit light of a designated wavelength band. Each of the plurality of color filters includes a stacked structure unit and a periodic structure unit. A plurality of layers having different refractive indexes is stacked in the stacked structure unit. A plurality of components is provided in the periodic structure unit at different periods according to the designated wavelength band and an incident angle of the light.
    Type: Application
    Filed: August 14, 2012
    Publication date: March 7, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yusaku Konno, Naotada Okada, Koichi Kokubun
  • Publication number: 20120273837
    Abstract: According to one embodiment, a solid state imaging device includes a photoelectric converting portion including a semiconductor region and a semiconductor film. The semiconductor region has a first region and a second region. The first region is of a second conductivity type. The first region is provided in a semiconductor substrate. The second region is of a first conductivity type. The first conductivity type is a different conductivity type from the second conductivity type. The second region is provided on the first region. The semiconductor film is of the second conductivity type. The semiconductor film is provided on the semiconductor region. An absorption coefficient of a material of the semiconductor film to a visible light is higher than an absorption coefficient of a material of the semiconductor substrate to the visible light. A thickness of the semiconductor film is smaller than a thickness of the semiconductor region.
    Type: Application
    Filed: February 13, 2012
    Publication date: November 1, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Koichi KOKUBUN
  • Publication number: 20120001285
    Abstract: According to one embodiment, in the upper laminated structure, first layers and second layers are alternately laminated, the first layer and the second layer having different refractive indices. In the lower laminated structure, first layers and second layers are alternately laminated, the first layer and the second layer having different refractive indices. The upper laminated structure and the lower laminated structure are equal in number of layers laminated therein. Each of the lowermost layer of the upper laminated structure and the uppermost layer of the lower laminated structure are configured by the first layer. The upper laminated structure and the lower laminated structure are configured to be asymmetric to each other such that, within some layer sets out of a plurality of layer sets each including two layers disposed at corresponding positions in the upper and lower laminated layers, one layer of the two layers in each layer set of the some layer sets is thinner than the other layer.
    Type: Application
    Filed: March 21, 2011
    Publication date: January 5, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Koichi Kokubun, Kazufumi Shiozawa
  • Publication number: 20110272772
    Abstract: A solid state imaging device includes: a first photoelectric conversion layer of an organic material; a second photoelectric conversion layer of an inorganic material; a third photoelectric conversion layer of an inorganic material; a first filter of an inorganic material; a second filter of an inorganic material. The first photoelectric conversion layer photoelectrically-converts a light of a first color. The first filter is disposed between the first photoelectric conversion layer and the second photoelectric conversion layer to selectively guide a light of a second color, out of a light that passed through the first photoelectric conversion layer, to the second photoelectric conversion layer. The second filter being disposed between the first photoelectric conversion layer and the third photoelectric conversion layer to selectively guide a light of a third color, out of the light that passed through the first photoelectric conversion layer, to the third photoelectric conversion layer.
    Type: Application
    Filed: March 21, 2011
    Publication date: November 10, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Koichi Kokubun
  • Publication number: 20110220976
    Abstract: Certain embodiments provide a solid-state imaging device including: a semiconductor substrate of a first conductivity type having a first face and a second face that is the opposite side from the first face; a plurality of pixels provided on the first face of the semiconductor substrate, each of the pixels including a semiconductor region of a second conductivity type that converts incident light into signal charges, and stores the signal charges; a readout circuit provided on the second face of the semiconductor substrate to read the signal charges stored in the pixels; an ultrafine metal structure placed at intervals on a face on a side of the semiconductor region, the light being incident on the face; and an insulating layer provided between the ultrafine metal structure and the semiconductor region.
    Type: Application
    Filed: September 3, 2010
    Publication date: September 15, 2011
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yoshinori IIDA, Eishi Tsutsumi, Akira Fujimoto, Koji Asakawa, Hisayo Momose, Koichi Kokubun, Nobuyuki Momo
  • Publication number: 20110215433
    Abstract: According to one embodiment, a solid state imaging device includes a first photoelectric conversion film disposed above a semiconductor substrate, a first common electrode pattern which covers a first portion of the first photoelectric conversion film and has an opening pattern corresponding to a second portion of the first photoelectric conversion film, an insulating film which covers the first common electrode pattern and covers the second portion of the first photoelectric conversion film via the opening pattern, a pixel electrode pattern which covers the insulating film, a second photoelectric conversion film which covers the pixel electrode pattern, a second common electrode pattern which covers the second photoelectric conversion film, and a contact plug which penetrates through the insulating film and the second portion of the first photoelectric conversion film so as to electrically connect the pixel electrode pattern and the semiconductor substrate, wherein the width of the opening pattern is larger
    Type: Application
    Filed: March 2, 2011
    Publication date: September 8, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Koichi Kokubun
  • Publication number: 20100289118
    Abstract: A semiconductor device has an inductor. The inductor has a first metal interconnection layer formed in the insulation film to extend in a first direction which is parallel to a substrate face of the semiconductor substrate, and connected electrically at a first end part thereof to the first terminal; a first via interconnection formed in the insulation film to extend in a second direction perpendicular to the substrate face, and connected at a top part thereof to a second end part of the first metal interconnection layer; and a second metal interconnection layer formed in the insulation film to extend in the first direction under the first metal interconnection layer, facing to the first metal interconnection layer, insulated from the first metal interconnection layer by the insulation film, connected at a first end part thereof to a bottom part of the first via interconnection, and connected electrically at a second end part thereof to the second terminal.
    Type: Application
    Filed: March 2, 2010
    Publication date: November 18, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Koichi Kokubun
  • Patent number: 7417285
    Abstract: A semiconductor device comprises a semiconductor substrate having a first conductivity type, a trench capacitor, provided in the semiconductor substrate, having a charge storage region, a gate electrode provided on the semiconductor substrate via a gate insulating film, first and second impurity regions, provided at both ends of the gate electrode, respectively, having a second conductivity type, an isolation insulating film provided adjacent to the trench capacitor in the semiconductor substrate to cover an upper surface of the charge storage region, a buried strap region having the second conductivity type, the buried strap region being provided to electrically connect an upper portion of the charge storage region to the first impurity region in the semiconductor substrate, and a pocket implantation region having the first conductivity type, the pocket implantation region being provided only under the second impurity region and being spaced apart from the strap region.
    Type: Grant
    Filed: January 14, 2005
    Date of Patent: August 26, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Koichi Kokubun
  • Publication number: 20050179074
    Abstract: A semiconductor device comprises a semiconductor substrate having a first conductivity type, a trench capacitor, provided in the semiconductor substrate, having a charge storage region, a gate electrode provided on the semiconductor substrate via a gate insulating film, first and second impurity regions, provided at both ends of the gate electrode, respectively, having a second conductivity type, an isolation insulating film provided adjacent to the trench capacitor in the semiconductor substrate to cover an upper surface of the charge storage region, a buried strap region having the second conductivity type, the buried strap region being provided to electrically connect an upper portion of the charge storage region to the first impurity region in the semiconductor substrate, and a pocket implantation region having the first conductivity type, the pocket implantation region being provided only under the second impurity region and being spaced apart from the strap region.
    Type: Application
    Filed: January 14, 2005
    Publication date: August 18, 2005
    Inventor: Koichi Kokubun
  • Patent number: 6858491
    Abstract: A semiconductor manufacturing method wherein a trench is formed in an SOI substrate. A first insulating film is formed in the trench, wherein the first insulating film has a depth to reach an upper surface of a buried insulating film. A second insulating film is formed in a sidewall portion of the trench above the first insulating film, wherein the second insulating film is made of a material different from that of the first insulating film. The first insulating film is etched backed to a depth as to reach an upper surface of the buried insulating film, by using the second insulating film as a mask. The buried insulating film, exposed to the sidewall portion of the trench, is recessed. An epitaxial layer is formed in a gap created by the recessed buried insulating film. The first and second insulating films are removed, and a trench capacitor is formed in the trench.
    Type: Grant
    Filed: August 22, 2003
    Date of Patent: February 22, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Koichi Kokubun
  • Patent number: 6849890
    Abstract: A semiconductor device comprises a semiconductor substrate having first conductivity type, a trench capacitor, provided in the substrate, having a charge accumulation region, a gate electrode provided on the substrate via a gate insulating film, a gate side wall insulating film provided on a side surface of the gate electrode, drain and source regions, provided in the substrate, having a second conductivity type, an isolation insulating film provided adjacent to the trench capacitor in the substrate to cover an upper surface of the charge accumulation region, a buried strap region having the second conductivity type, the buried strap region being provided to electrically connect an upper portion of the charge accumulation region to the source region in the substrate, and a pocket implantation region having the first conductivity type, the pocket implantation region being provided below the drain and source regions and being spaced apart from the strap region.
    Type: Grant
    Filed: May 23, 2003
    Date of Patent: February 1, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Koichi Kokubun