Patents by Inventor Koichi Nishi
Koichi Nishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210134990Abstract: A semiconductor device according to the present invention includes a semiconductor substrate including at least a first semiconductor layer of a second conductivity type, a second semiconductor layer of a first conductivity type, a third semiconductor layer of the second conductivity type, and a fourth semiconductor layer of the first conductivity type provided in the upper layer of the third semiconductor layer; a first gate trench extending in the thickness direction through the fourth, third, and second semiconductor layers to the inside of the first semiconductor layer; an interlayer insulating film; a first main electrode provided in contact with the fourth semiconductor layer; and a second main electrode provided on the side opposite the first main electrode. The first gate trench includes a first gate electrode on the lower side and a second gate electrode on the upper side.Type: ApplicationFiled: July 30, 2020Publication date: May 6, 2021Applicant: Mitsubishi Electric CorporationInventor: Koichi NISHI
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Patent number: 10971608Abstract: A semiconductor substrate has a first surface and a second surface provided with an opening of a trench. A first-conductivity-type carrier storage layer is provided on the second surface side of a first-conductivity-type drift layer. A second-conductivity-type base layer is provided on the second surface side of the carrier storage layer and reaches the second surface. A first-conductivity-type impurity layer is provided on the second surface side of the base layer. A trench electrode is provided in the trench via an internal insulating film. The internal insulating film has a first thickness at a portion facing the base layer, has a second thickness at a portion facing the drift layer, and has the first thickness and the second thickness at a portion facing the carrier storage layer. The second thickness is thicker than the first thickness.Type: GrantFiled: August 30, 2019Date of Patent: April 6, 2021Assignee: Mitsubishi Electric CorporationInventor: Koichi Nishi
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Publication number: 20200283466Abstract: The present invention aims to provide a novel glycosyl hesperetin, which is significantly reduced in miscellaneous tastes characteristic of conventional products containing glycosyl hesperetin, and a method for producing the same and uses thereof; and the objects are solved by providing a glycosyl hesperetin which comprises glycosyl hesperetin in an amount of 90% or more by mass but less than 100% by mass, on a dry solid basis, but it does not substantially contain furfural, and a method for producing the same and uses thereof.Type: ApplicationFiled: May 20, 2020Publication date: September 10, 2020Inventors: Mitsuyuki KAMBE, Koichi NISHI, Akira KAWASHIMA, Akiko YASUDA, Hitoshi MITSUZUMI, Toshio ARIYASU
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Patent number: 10703773Abstract: The present invention aims to provide a novel glycosyl hesperetin, which is significantly reduced in miscellaneous tastes characteristic of conventional products containing glycosyl hesperetin, and a method for producing the same and uses thereof; and the objects are solved by providing a glycosyl hesperetin which comprises glycosyl hesperetin in an amount of 90% or more by mass but less than 100% by mass, on a dry solid basis, but it does not substantially contain furfural, and a method for producing the same and uses thereof.Type: GrantFiled: March 3, 2015Date of Patent: July 7, 2020Assignee: HAYASHIBARA CO. LTD.Inventors: Mitsuyuki Kambe, Koichi Nishi, Akira Kawashima, Akiko Yasuda, Hitoshi Mitsuzumi, Toshio Ariyasu
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Publication number: 20200144403Abstract: A semiconductor substrate has a first surface and a second surface provided with an opening of a trench. A first-conductivity-type carrier storage layer is provided on the second surface side of a first-conductivity-type drift layer. A second-conductivity-type base layer is provided on the second surface side of the carrier storage layer and reaches the second surface. A first-conductivity-type impurity layer is provided on the second surface side of the base layer. A trench electrode is provided in the trench via an internal insulating film. The internal insulating film has a first thickness at a portion facing the base layer, has a second thickness at a portion facing the drift layer, and has the first thickness and the second thickness at a portion facing the carrier storage layer. The second thickness is thicker than the first thickness.Type: ApplicationFiled: August 30, 2019Publication date: May 7, 2020Applicant: Mitsubishi Electric CorporationInventor: Koichi NISHI
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Patent number: 10593789Abstract: A semiconductor apparatus includes a semiconductor substrate including a semiconductor device. The semiconductor device includes a first n-type buffer layer, a second n-type buffer layer, and a first p-type semiconductor region. A first maximum peak concentration of first n-type carriers contained in the first n-type buffer layer is smaller than a second maximum peak concentration of second n-type carriers contained in the second n-type buffer layer. The first p-type semiconductor region is formed in the first n-type buffer layer. The first p-type semiconductor region has a narrower width than the first n-type buffer layer.Type: GrantFiled: August 30, 2018Date of Patent: March 17, 2020Assignee: Mitsubishi Electric CorporationInventors: Kenji Suzuki, Mitsuru Kaneda, Koichi Nishi
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Patent number: 10355084Abstract: A semiconductor device includes a semiconductor chip, a cell surface electrode portion, and a peripheral edge surface structure portion. The semiconductor chip has a cell portion and a peripheral edge portion provided around the cell portion in plan view. The cell surface electrode portion is provided on the cell portion. The peripheral edge surface structure portion is provided on the peripheral edge portion. The peripheral edge portion is made thinner than the cell portion so that a back surface of the peripheral edge portion is more concave than a back surface of the cell portion. When the thickness of the cell portion is represented by tc and the size of the step between the cell portion and the peripheral edge portion on the back surface is represented by dtb, 0%<dtb/tc?1.5% is satisfied.Type: GrantFiled: August 29, 2018Date of Patent: July 16, 2019Assignee: Mitsubishi Electric CorporationInventors: Koichi Nishi, Kenji Suzuki, Tetsuo Takahashi, Junichi Yamashita
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Patent number: 10347715Abstract: A semiconductor device includes a drift layer formed of a first conductive type semiconductor material, a MOSFET part including a p-type base layer provided on a front surface of the drift layer, a first n-type buffer layer provided on a reverse side of the drift layer, and a second n-type buffer layer provided on a reverse side of the first n-type buffer layer and having a high impurity concentration. The first n-type buffer layer has a higher impurity concentration than the drift layer and has a total amount of electrically active impurities per unit area of 1.0×1012 cm?2 or less.Type: GrantFiled: July 12, 2017Date of Patent: July 9, 2019Assignee: Mitsubishi Electric CorporationInventors: Kenji Suzuki, Tetsuo Takahashi, Mitsuru Kaneda, Ryu Kamibaba, Koichi Nishi
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Patent number: 10263102Abstract: An object of the present invention is to provide a semiconductor device capable of preventing an occurrence of oscillation of voltage and current and a method of manufacturing the same. A semiconductor device according to the present invention includes an n type silicon substrate and a first n type buffer layer formed in a back surface of the n type silicon substrate and having a plurality of peaks of concentration of protons whose depths from the back surface are different from each other. In the first n type buffer layer, a concentration gradient of the protons from the peak located in a position closer to the back surface toward the surface of the n type silicon substrate is smaller than a concentration gradient of the protons from the peak located in a position farther away from the back surface toward the surface.Type: GrantFiled: February 16, 2018Date of Patent: April 16, 2019Assignee: Mitsubishi Electric CorporationInventors: Kenji Suzuki, Mitsuru Kaneda, Koichi Nishi, Katsumi Nakamura
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Publication number: 20190103479Abstract: A semiconductor apparatus includes a semiconductor substrate including a semiconductor device. The semiconductor device includes a first n-type buffer layer, a second n-type buffer layer, and a first p-type semiconductor region. A first maximum peak concentration of first n-type carriers contained in the first n-type buffer layer is smaller than a second maximum peak concentration of second n-type carriers contained in the second n-type buffer layer. The first p-type semiconductor region is formed in the first n-type buffer layer. The first p-type semiconductor region has a narrower width than the first n-type buffer layer.Type: ApplicationFiled: August 30, 2018Publication date: April 4, 2019Applicant: Mitsubishi Electric CorporationInventors: Kenji Suzuki, Mitsuru Kaneda, Koichi Nishi
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Patent number: 10205013Abstract: A semiconductor switching element includes a first gate electrode and a second gate electrode. The first gate electrode is disposed, via a first gate insulating film, inside a first trench that extends from an upper surface of an emitter region to reach a semiconductor layer, and intersects with the emitter region, a base region, and a charge storage layer. The second gate electrode is disposed, via a second gate insulating film, inside a second trench that extends from the upper surface of the emitter region and an upper surface of a conductive region to reach the semiconductor layer, and is adjacent to the emitter region, the base region, the charge storage layer, and the conductive region. The second trench is smaller in depth than the first trench, and the second trench is smaller in width than the first trench.Type: GrantFiled: December 18, 2017Date of Patent: February 12, 2019Assignee: Mitsubishi Electric CorporationInventors: Mitsuru Kaneda, Tetsuo Takahashi, Kenji Suzuki, Ryu Kamibaba, Mariko Umeyama, Koichi Nishi
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Publication number: 20180366566Abstract: An object of the present invention is to provide a semiconductor device capable of preventing an occurrence of oscillation of voltage and current and a method of manufacturing the same. A semiconductor device according to the present invention includes an n type silicon substrate and a first n type buffer layer formed in a back surface of the n type silicon substrate and having a plurality of peaks of concentration of protons whose depths from the back surface are different from each other. In the first n type buffer layer, a concentration gradient of the protons from the peak located in a position closer to the back surface toward the surface of the n type silicon substrate is smaller than a concentration gradient of the protons from the peak located in a position farther away from the back surface toward the surface.Type: ApplicationFiled: February 16, 2018Publication date: December 20, 2018Applicant: Mitsubishi Electric CorporationInventors: Kenji SUZUKI, Mitsuru KANEDA, Koichi NISHI, Katsumi NAKAMURA
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Publication number: 20180308963Abstract: A semiconductor switching element includes a first gate electrode and a second gate electrode. The first gate electrode is disposed, via a first gate insulating film, inside a first trench that extends from an upper surface of an emitter region to reach a semiconductor layer, and intersects with the emitter region, a base region, and a charge storage layer. The second gate electrode is disposed, via a second gate insulating film, inside a second trench that extends from the upper surface of the emitter region and an upper surface of a conductive region to reach the semiconductor layer, and is adjacent to the emitter region, the base region, the charge storage layer, and the conductive region. The second trench is smaller in depth than the first trench, and the second trench is smaller in width than the first trench.Type: ApplicationFiled: December 18, 2017Publication date: October 25, 2018Applicant: Mitsubishi Electric CorporationInventors: Mitsuru KANEDA, Tetsuo TAKAHASHI, Kenji SUZUKI, Ryu KAMIBABA, Mariko UMEYAMA, Koichi NISHI
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Publication number: 20180130875Abstract: A semiconductor device includes a drift layer formed of a first conductive type semiconductor material, a MOSFET part including a p-type base layer provided on a front surface of the drift layer, a first n-type buffer layer provided on a reverse side of the drift layer, and a second n-type buffer layer provided on a reverse side of the first n-type buffer layer and having a high impurity concentration. The first n-type buffer layer has a higher impurity concentration than the drift layer and has a total amount of electrically active impurities per unit area of 1.0×1012 cm?2 or less.Type: ApplicationFiled: July 12, 2017Publication date: May 10, 2018Applicant: Mitsubishi Electric CorporationInventors: Kenji SUZUKI, Tetsuo TAKAHASHI, Mitsuru KANEDA, Ryu KAMIBABA, Koichi NISHI
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Publication number: 20170081354Abstract: The present invention aims to provide a novel glycosyl hesperetin, which is significantly reduced in miscellaneous tastes characteristic of conventional products containing glycosyl hesperetin, and a method for producing the same and uses thereof; and the objects are solved by providing a glycosyl hesperetin which comprises glycosyl hesperetin in an amount of 90% or more by mass but less than 100% by mass, on a dry solid basis, but it does not substantially contain furfural, and a method for producing the same and uses thereof.Type: ApplicationFiled: March 3, 2015Publication date: March 23, 2017Inventors: Mitsuyuki KAMBE, Koichi NISHI, Akira KAWASHIMA, Akiko YASUDA, Hitoshi MITSUZUMI, Toshio ARIYASU
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Patent number: 8952176Abstract: Disclosed is a compound useful as a type I 11?hydroxysteroid dehydrogenase inhibitor. A compound represented by the formula: a pharmaceutically acceptable salt or solvate thereof, wherein R1 is optionally substituted cycloalkyl, optionally substituted cycloalkenyl or the like, One of R2 and R3 is a group of the formula: —C(?O)—Y—R4, wherein Y is —NR9— or the like, R4 is optionally substituted cycloalkyl or the like, R9 is hydrogen or optionally substituted alkyl, W is optionally substituted alkylene, The other is a group of the formula: —V—R5, wherein V is a bond, —O— or the like, R6 is hydrogen or optionally substituted alkyl, R5 is hydrogen, optionally substituted alkyl or the like, X is a bond, —S—, —SO— or the like, U is a bond or optionally substituted alkylene, R7 is hydrogen or optionally substituted alkyl, Z is —S—, —O— or —NR8—, R8 is hydrogen, optionally substituted alkyl or the like.Type: GrantFiled: June 6, 2006Date of Patent: February 10, 2015Assignee: Shionogi & Co., Ltd.Inventors: Tomoyuki Ogawa, Noriyuki Kurose, Satoru Tanaka, Koichi Nishi
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Publication number: 20100197662Abstract: Disclosed is a compound useful as a type I 11?hydroxysteroid dehydrogenase inhibitor. A compound represented by the formula: a pharmaceutically acceptable salt or solvate thereof, wherein R1 is optionally substituted cycloalkyl, optionally substituted cycloalkenyl or the like, One of R2 and R3 is a group of the formula: —C(?O)—Y—R4, wherein Y is —NR9— or the like, R4 is optionally substituted cycloalkyl or the like, R9 is hydrogen or optionally substituted alkyl, W is optionally substituted alkylene, The other is a group of the formula: —V—R5, wherein V is a bond, —O— or the like, R6 is hydrogen or optionally substituted alkyl, R5 is hydrogen, optionally substituted alkyl or the like, X is a bond, —S—, —SO— or the like, U is a bond or optionally substituted alkylene, R7 is hydrogen or optionally substituted alkyl, Z is —S—, —O— or —NR8—, R8 is hydrogen, optionally substituted alkyl or the like.Type: ApplicationFiled: June 6, 2006Publication date: August 5, 2010Applicant: Shionogi & Co., Ltd.Inventors: Tomoyuki Ogawa, Noriyuki Kurose, Satoru Tanaka, Koichi Nishi
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Patent number: 7662826Abstract: A compound represented by the formula (Ia) (wherein R1a, R2a, and R3 to R5 are the same as defined in the description), a prodrug thereof, a pharmaceutically acceptable salt thereof, or solvate thereof. The compounds are useful in the prevention of or treatment for diseases relating to NAD(P)H.Type: GrantFiled: April 18, 2003Date of Patent: February 16, 2010Assignee: Shionogi & Co., Ltd.Inventors: Kaoru Seno, Koichi Nishi, Yoshiyuki Matsuo, Toshio Fujishita
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Publication number: 20060089362Abstract: A compound represented by the formula (Ia) (wherein R1a, R2a, and R3 to R5 are the same as defined in the description), a prodrug thereof, a pharmaceutically acceptable salt thereof, or solvate thereof. The compounds are useful in the prevention of or treatment for diseases relating to NAD(P)H.Type: ApplicationFiled: April 18, 2003Publication date: April 27, 2006Applicant: Shionogi & Co., LtdInventors: Kaoru Seno, Koichi Nishi, Yoshiyuki Matsuo, Toshio Fujishita
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Patent number: 6576446Abstract: Disclosed is a process for producing a high &agr;G-AA content product, which comprises the steps of: contacting a solution as a material solution, containing &agr;G-AA, L-ascorbic acid, and a saccharide(s), with an anion exchange resin packed in a column to adsorb the &agr;G-AA and L-ascorbic acid on the anion exchanger; washing the anion exchanger with water to remove the saccharide(s) therefrom; feeding to the column an aqueous solution, as an eluent, of an acid and/or a salt with a concentration of less than 0.5 N to fractionate a fraction rich in 2-O-&agr;-D-glucopyranosyl-L-ascorbic acid and a fraction rich in L-ascorbic acid; and collecting the former fraction.Type: GrantFiled: June 8, 2001Date of Patent: June 10, 2003Assignee: Kabushiki Kaisha Hayashibara Seibutsu Kagaku KenkyujoInventors: Hiroshi Yamasaki, Koichi Nishi, Toshio Miyake