Abstract: A fluid pressure cylinder. A first stepped section having a greater diameter than a cylinder chamber is formed at one end of a cylinder tube constituting a fluid pressure cylinder. A disc-shaped head cover is inserted into the cylinder chamber. The one end is pressed and plastically deformed by a staking jig to form a deformed section, and the head cover is affixed within the first stepped section by the deformed section. As a result of this configuration, the head cover can be more firmly affixed while the sealing effect between the cylinder tube and the head cover is ensured. This eliminates need for a seal means and an engagement means which is used to affix the head cover, and consequently, the number of parts can be reduced.

Abstract: A logic circuit in a system LSI (Large Scale Integrated Circuit) is provided with a power switch so as to cut off the switch at the time of standby, reducing leakage current. At the same time, an SRAM (Static Random Access Memory) circuit of the system LSI controls a substrate bias to reduce leakage current.

Abstract: A chuck apparatus includes a first rotating shaft provided with a first gripping member, a second rotating shaft provided with a second gripping member, and a power transmission mechanism configured to convert reciprocating movement of a piston unit into rotational movement of the first rotating shaft and the second rotating shaft. The first rotating shaft and the second rotating shaft are arranged side by side in a direction of displacement of the piston unit.

Abstract: A cylinder guide mechanism includes a floating bush, a holding part that holds the floating bush, and a linear guide. When a working fluid is supplied in a tube and a piston rod moves back and forth, the floating bush and a guide member of the linear guide move back and forth in the same direction. At this time, a slider of the linear guide is displaced relative to the guide member by retaining the same position. The slider is connected to the tube via an L-bracket.

Abstract: A logic circuit in a system LSI is provided with a power switch so as to cut off the switch at the time of standby, reducing leakage current. At the same time, an SRAM circuit of the system LSI controls a substrate bias to reduce leakage current.

Abstract: Cell power supply lines are arranged for memory cell columns, and adjust impedances or voltage levels of the cell power supply lines according to the voltage levels of bit lines in the corresponding columns, respectively. In the data write operation, the cell power supply line is forced into a floating state according to the bit line potential on a selected column and has the voltage level changed, and a latching capability of a selected memory cell is reduced to write data fast. Even with a low power supply voltage, a static semiconductor memory device that can stably perform write and read of data is implemented.

Abstract: A logic circuit in a system LSI is provided with a power switch so as to cut off the switch at the time of standby, reducing leakage current. At the same time, an SRAM circuit of the system LSI controls a substrate bias to reduce leakage current.

Abstract: A fluid pressure cylinder. A first stepped section having a greater diameter than a cylinder chamber is formed at one end of a cylinder tube constituting a fluid pressure cylinder. A disc-shaped head cover is inserted into the cylinder chamber. The one end is pressed and plastically deformed by a staking jig to form a deformed section, and the head cover is affixed within the first stepped section by the deformed section. As a result of this configuration, the head cover can be more firmly affixed while the sealing effect between the cylinder tube and the head cover is ensured. This eliminates need for a seal means and an engagement means which is used to affix the head cover, and consequently, the number of parts can be reduced.

Abstract: A chuck apparatus grips a workpiece by a gripping section having a pair of chuck members. The chuck apparatus is equipped with a cover member and pressing members. The cover member includes insertion holes through which fingers of the chuck members are inserted, and seal members that surround the insertion holes and abut against the fingers. The cover member is attached to a body so as to cover base portions of the chuck members, and is elastically deformable so as to follow displacement of the chuck members. The pressing members press the seal members against the fingers.

Abstract: Prior known static random access memory (SRAM) cells are required that a diffusion layer be bent into a key-like shape in order to make electrical contact with a substrate with a P-type well region formed therein, which would result in a decrease in asymmetry leading to occurrence of a problem as to the difficulty in micro-patterning. To avoid this problem, the P-type well region in which an inverter making up an SRAM cell is formed is subdivided into two portions, which are disposed on the opposite sides of an N-type well region NW1 and are formed so that a diffusion layer forming a transistor has no curvature while causing the layout direction to run in a direction parallel to well boundary lines and bit lines. At intermediate locations of an array, regions for use in supplying power to the substrate are formed in parallel to word lines in such a manner that one regions is provided per group of thirty two memory cell rows or sixty four cell rows.

Abstract: Cell power supply lines are arranged for memory cell columns, and adjust impedances or voltage levels of the cell power supply lines according to the voltage levels of bit lines in the corresponding columns, respectively. In the data write operation, the cell power supply line is forced into a floating state according to the bit line potential on a selected column and has the voltage level changed, and a latching capability of a selected memory cell is reduced to write data fast. Even with a low power supply voltage, a static semiconductor memory device that can stably perform write and read of data is implemented.

Abstract: Cell power supply lines are arranged for memory cell columns, and adjust impedances or voltage levels of the cell power supply lines according to the voltage levels of bit lines in the corresponding columns, respectively. In the data write operation, the cell power supply line is forced into a floating state according to the bit line potential on a selected column and has the voltage level changed, and a latching capability of a selected memory cell is reduced to write data fast. Even with a low power supply voltage, a static semiconductor memory device that can stably perform write and read of data is implemented.

Abstract: Prior known static random access memory (SRAM) cells are required that a diffusion layer be bent into a key-like shape in order to make electrical contact with a substrate with a P-type well region formed therein, which would result in a decrease in asymmetry leading to occurrence of a problem as to the difficulty in micro-patterning. To avoid this problem, the P-type well region in which an inverter making up an SRAM cell is formed is subdivided into two portions, which are disposed on the opposite sides of an N-type well region NW1 and are formed so that a diffusion layer forming a transistor has no curvature while causing the layout direction to run in a direction parallel to well boundary lines and bit lines. At intermediate locations of an array, regions for use in supplying power to the substrate are formed in parallel to word lines in such a manner that one regions is provided per group of thirty two memory cell rows or sixty four cell rows.

Abstract: A logic circuit in a system LSI is provided with a power switch so as to cut off the switch at the time of standby, reducing leakage current. At the same time, an SRAM circuit of the system LSI controls a substrate bias to reduce leakage current.

Abstract: A semiconductor device having static memory cells is designed to reduce leakage current and power consumption. The static memory cells are coupled to word lines and bit lines, and the word lines are coupled to word drivers. A first P channel MOS transistor (MOS power switch) has a gate coupled to receive a first control signal, and a second P channel MOS transistor (MOS power switch) has a gate coupled to receive a second control signal different from the first control signal. Source-drain paths of the first and second P channel MOS transistors (MOS power switches) are coupled to respective voltage supply points for different parts of the semiconductor device, such as voltage supply points for the memory cells and the word drivers, or voltage supply points for a logic circuit and the word drivers.

Abstract: Cell power supply lines are arranged for memory cell columns, and adjust impedances or voltage levels of the cell power supply lines according to the voltage levels of bit lines in the corresponding columns, respectively. In the data write operation, the cell power supply line is forced into a floating state according to the bit line potential on a selected column and has the voltage level changed, and a latching capability of a selected memory cell is reduced to write data fast. Even with a low power supply voltage, a static semiconductor memory device that can stably perform write and read of data is implemented.

Abstract: Cell power supply lines are arranged for memory cell columns, and adjust impedances or voltage levels of the cell power supply lines according to the voltage levels of bit lines in the corresponding columns, respectively. In the data write operation, the cell power supply line is forced into a floating state according to the bit line potential on a selected column and has the voltage level changed, and a latching capability of a selected memory cell is reduced to write data fast. Even with a low power supply voltage, a static semiconductor memory device that can stably perform write and read of data is implemented.

Abstract: A logic circuit in a system LSI is provided with a power switch so as to cut off the switch at the time of standby, reducing leakage current. At the same time, an SRAM circuit of the system LSI controls a substrate bias to reduce leakage current.

Abstract: An open end of a cylinder main body is blocked by a cap, which includes a main body portion, and an outer edge portion that bends from the main body portion toward the open end of the cylinder main body, a distal end of the outer edge portion being locked with an inner circumferential wall. When a piston comes into abutment against the main body portion, a space is formed by the outer edge portion, the inner circumferential wall, and the end surface of the piston. A first port is disposed so as to communicate with the space, whereby the space serves as a space into which the pressure fluid is introduced.