Abstract: Integrated circuit capacitors in which the capacitor dielectric is a thin film of BST having a grain size smaller than 200 nanometers formed above a silicon germanium substrate. Typical grain sizes are 40 nm and less. The BST is formed by deposition of a liquid precursor by a spin-on process. The original liquid precursor includes an alkoxycarboxylate dissolved in 2-methoxyethanol and a xylene exchange is performed just prior to spinning. The precursor is dried in air at a temperature of about 400° C. and then furnace annealed in oxygen at a temperature of between 600° C. and 850° C.

Abstract: A manufacturing method of a semiconductor device including a step of forming a via hole in an insulation layer including an organic low dielectric film, such as MSQ, SiC, and SiCN, and then embedding a wiring material in the via hole through a barrier metal. According to this method, a plasma treatment is performed after the via hole is formed and before the barrier metal is deposited, using a He/H2 gas capable of replacing groups (methyl groups) made of organic constituents and covering the surface of the exposed organic low dielectric film (MSQ) with hydrogen, or a He gas capable decomposing the groups (methyl groups) without removing organic low dielectric molecules. As a result, the surface of the low dielectric film (MSQ) is reformed to be hydrophilic and adhesion to the barrier metal is hence improved, thereby making it possible to prevent the occurrence of separation of the barrier metal and scratches.

Abstract: A thin film of precursor for forming a layered superlattice material is applied to an integrated circuit substrate, then a strong oxidizing agent is applied at low temperature in a range of from 100° C. to 300° C. to the precursor thin film, thereby forming a metal oxide thin film. The strong oxidizing agent may be liquid or gaseous. An example of a liquid strong oxidizing agent is hydrogen peroxide. An example of a gaseous strong oxidizing agent is ozone. The metal oxide thin film is crystallized by annealing at elevated temperature in a range of from 500° C. to 700° C., preferably not exceeding 650° C., for a time period in a range of from 30 minutes to two hours. Annealing is conducted in an oxygen-containing atmosphere, preferably including water vapor. Treatment by ultraviolet (UV) radiation may precede annealing. RTP in a range of from 500° C. to 700° C. may precede annealing.

Abstract: Data is read out from a ferroelectric film with its remnant polarization associated with one of two possible logical states of the data and with a bias voltage applied to a control gate electrode over the ferroelectric film. The ferroelectric film creates either up or down remnant polarization. So the down remnant polarization may represent data “1” while the up or almost zero remnant polarization may represent data “0”, for example. By regarding the almost zero remnant polarization state as representing data “0”, a read current value becomes substantially constant in the data “0” state. As a result, the read accuracy improves. Also, if imprinting of one particular logical state (e.g., data “1”) is induced in advance, then the read accuracy further improves.

Abstract: A ferroelectric thin film capacitor has smooth electrodes permitting comparatively stronger polarization, less fatigue, and less imprint, as the ferroelectric capacitor ages. The smooth electrode surfaces are produced by DC reactive sputtering.

Abstract: A nondestructive read-out, nonvolatile ferroelectric field effect transistor (“FET”) memory in an integrated circuit, containing a thin film of polycrystalline crystallographically oriented ferroelectric material. Preferably, the material is polycrystalline c-axis oriented layered superlattice material. More preferably, it is c-axis oriented strontium bismuth tantalate or strontium bismuth tantalum niobate.

Abstract: A ferroelectric FET having an interface insulator layer containing ZrO2. The ferroelectric FET includes a gate oxide layer, the interface insulator layer is located on the gate oxide layer, and ferroelectric layered superlattice material is located on the interface insulator layer, The interface insulator layer has a thickness of from 15 to 25 nanometers.

Abstract: A method for fabricating a capacitor for an integrated circuit, comprising the steps of forming a titanium film for an adhesion layer over a substrate, forming a titanium dioxide film for a diffusion barrier layer by annealing the titanium film after ion-implantation of oxygen ion into a surface region of the titanium film so as to change titanium in the surface region to titanium dioxide, and forming a high dielectric constant capacitor on the titanium dioxide film.

Abstract: An integrated circuit capacitor containing a thin film of dielectric metal oxide is formed above a silicon germanium substrate. A silicon nitride diffusion barrier layer is deposited on a silicon germanium substrate to prevent evaporation of the substrate in subsequent heating steps. A silicon dioxide stress reduction layer is deposited on the diffusion barrier layer. A bottom electrode is formed on the stress reduction layer, then a liquid precursor is spun on the bottom electrode, dried at about 400° C., and annealed at between 600° C. and 850° C. to form a BST capacitor dielectric. A top electrode is deposited on the dielectric and annealed. The integrated circuit may also include a BiCMOS device, a HBT device or a MOSFET.

Abstract: An integrated circuit capacitor containing a thin film delectric metal oxide is formed above a silicon germanium substrate. A silicon nitride diffusion barrier layer is deposited on a silicon germanium substrate to prevent evaporation of the substrate in subsequent heating steps. A silicon dioxide stress reduction layer is deposited on the diffusion barrier layer. A bottom electrode is formed on the stress reduction layer, then a liquid precursor is spun on the bottom electrode, dried at about 400° C., and annealed at between 600° C. and 850° C. to form a BST capacitor dielectric. A top electrode is deposited on the dielectric and annealed. The integrated circuit may also include a BiCMOS device, a HBT device or a MOSFET.

Abstract: Source/drain regions for a field effect transistor are defined in a semiconductor substrate with a channel region interposed therebetween. A first gate electrode is formed over the semiconductor substrate with an insulating film sandwiched therebetween and has a gate length shorter than the length of the channel region. A ferroelectric film is formed to cover the first gate electrode and to have both side portions thereof make contact with the insulating film. A second gate electrode is formed to cover the ferroelectric film.

Abstract: A method of making a top electrode for a thin film capacitor with a multi-layer structure that includes a high dielectric oxide layer, a first conductive layer on the high dielectric oxide layer and having a high formability to a reactive ion etching, and a second conductive layer on the first conductive layer, the second conductive layer having a high formability to the reactive ion etching. The first conductive layer is deposited with a lower deposition rate than the second conductive layer wherein an interface between the first conductive layer and the high dielectric oxide layer is such that a density of a leak current across the interface is suppressed at not higher than 1×10−8 A/cm2 upon applying a voltage of 2V across the dielectric oxide layer after the multi-layer structure has been subjected to a heat treatment at 350° C.

Abstract: A coating of liquid precursor for forming a layered superlattice material is applied to a substrate, the substrate is dried and then pretreated using RTP at 450 ° C. for 5 minutes. Following the RTP, the substrate is annealed in an unreactive gas at a temperature not exceeding 800° C. then annealed in oxygen gas at a temperature not exceeding 800° C. for one hour to form a thin film of layered superlattice material.

Abstract: A semiconductor memory device includes a field-effect transistor with a gate electrode that has been formed over a semiconductor substrate with a ferroelectric layer interposed between the electrode and the substrate. The device includes a first insulating layer, which is insulated against a leakage current more fully than the ferroelectric layer, between the ferroelectric layer and the gate electrode.

Abstract: A liquid precursor for forming a thin film of ferroelectric metal oxide in an integrated circuit contains metal oxides in excess of the stoichiometrically balanced amount. When the precursor comprises strontium, bismuth, tantalum and niobium for forming strontium bismuth tantalum niobate, the precursor contains excess amounts of at least one of tantalum and niobium. Capacitors containing thin films of layered superlattice material made from a precursor containing excess tantalum and niobium show good polarizability and low percentage imprint after 1010 negative polarization switching pulses at 75° C., and after 109 negative polarization switching pulses at 125° C.

Abstract: A method of making a top electrode for a thin film capacitor with a multi-layer structure that includes a high dielectric oxide layer, a first conductive layer on the high dielectric oxide layer and having a high formability to a reactive ion etching, and a second conductive layer on the first conductive layer, the second conductive layer having a high formability to the reactive ion etching. The first conductive layer is deposited with a lower deposition rate than the second conductive layer wherein an interface between the first conductive layer and the high dielectric oxide layer is such that a density of a leak current across the interface is suppressed at not higher than 1×10−8 A/cm2 upon applying a voltage of 2V across the dielectric oxide layer after the multi-layer structure has been subjected to a heat treatment at 350° C.

Abstract: In a semiconductor layer formed on a first insulating film is formed an element isolation groove extending to the first insulating film. Thereafter, a second insulating film is deposited in the element isolation groove by using a vapor deposition method.

Abstract: A method for manufacturing a semiconductor device including the steps of: forming a bottom electrode overlying a semiconductor substrate; forming an insulation film on the bottom electrode; subjecting a surface of the insulation film to a plasma treatment; and forming a silicon glass mask on the insulation film. The plasma treatment forms, on the insulation film, a layer for easily receiving an adsorption layer, thereby the film can be formed uniformly.

Abstract: Integrated circuit capacitors in which the capacitor dielectric is a thin film of BST having a grain size smaller than 200 nanometers formed above a silicon germanium substrate. Typical grain sizes are 40 nm and less. The BST is formed by deposition of a liquid precursor by a spin-on process. The original liquid precursor includes an alkoxycarboxylate dissolved in 2-methoxyethanol and a xylene exchange is performed just prior to spinning. The precursor is dried in air at a temperature of about 400° C. and then furnace annealed in oxygen at a temperature of between 600° C. and 850° C.

Abstract: A top electrode of a thin film capacitor includes a dielectric oxide layer, a first conductive layer on the dielectric oxide layer, and a second conductive layer over the first conductive layer, wherein the first conductive layer processes at least one of a lower oxidizability and a lower diffusability than the second conductive layer.