Patents by Inventor Koji Arita

Koji Arita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6046467
    Abstract: A capacitor 25 is formed on an insulating layer 21a formed on a semiconductor substrate 21. The end portion of a capacitor insulating layer 23 is positioned between the end portion of a bottom electrode 22 and the end portion of a top electrode 24. A passivation layer 26 for covering the capacitor 25 is formed. Interconnections 28 are connected to the bottom electrode 22 through a first hole 27a and to the top electrode 24 through a second hole 27b. In this way, since the end portion of the capacitor insulating layer 23 is out of the end portion of the top electrode 24, the end portion of the capacitor insulating layer 23 injured by etching does not affect the capacitance.
    Type: Grant
    Filed: June 20, 1996
    Date of Patent: April 4, 2000
    Assignee: Matsushita Electronics Corporation
    Inventors: Koji Arita, Akihiro Matsuda, Yoshihisa Nagano, Toru Nasu, Eiji Fujii
  • Patent number: 6046490
    Abstract: A semiconductor device is provided with a multilayered interconnection and a capacitor dielectric element, in which the transistor in the device has a non-degraded characteristics and the degradation of the capacitor dielectric element is suppressed. The semiconductor device has wiring layers connecting to one another through contact holes in insulating layers. One of the insulating layers is formed so as to cover at least a part of the area above the transistor and so as not to cover the area above the capacitor dielectric element. Hydrogen generated by heat-treating the insulating layer is supplied to the transistor to recover the damage in it, while hydrogen is suppressed from arriving at the capacitor element so that the capacitor dielectric element does not degrade.
    Type: Grant
    Filed: August 10, 1998
    Date of Patent: April 4, 2000
    Assignee: Matsushita Electronics Corporation
    Inventors: Koji Arita, Eiji Fujii, Yasuhiro Uemoto, Yoshihisa Nagano, Akihiro Matsuda
  • Patent number: 6017579
    Abstract: A new method (P200) is provided for making magnesium oxide layers (122) in plasma displays (100). A magnesium carboxylate liquid precursor solution is applied to a display panel (102), dried, and annealed to yield a solid magnesium oxide layer (122) having excellent electro-optical performance.
    Type: Grant
    Filed: April 14, 1997
    Date of Patent: January 25, 2000
    Assignees: Symetrix Corporation, Matsushita Electronics Corporation
    Inventors: Gota Kano, Carlos A. Paz De Araujo, Koji Arita, Michael C. Scott, Larry D. McMillan, Shinichiro Hayashi
  • Patent number: 6015987
    Abstract: A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm.sup.3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 10.sup.21 atoms/cm.sup.3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.
    Type: Grant
    Filed: May 4, 1998
    Date of Patent: January 18, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koji Arita, Eiji Fujii, Yasuhiro Shimada, Yasuhiro Uemoto, Toru Nasu, Akihiro Matsuda, Yoshihisa Nagano, Atsuo Inoue, Taketoshi Matsuura, Tatsuo Otsuki
  • Patent number: 5943568
    Abstract: A method of making a semiconductor device include forming: (a) a semiconductor substrate on whose surface an integrated circuit is formed, (b) a first insulating layer on the semiconductor device and having first contact holes which lead to the integrated circuit, (c) a capacitance element on the first insulating layer, (d) a second insulating layer on the first insulating layer to cover the capacitance element, and having second contact holes which lead to an upper and a lower electrodes of the capacitance element respectively, and (e) interconnections which are connected to the integrated circuit and the capacitance element respectively through the first and second contact holes. The hydrogen density of this semiconductor device is 10.sup.11 atoms/cm.sup.2 or less.
    Type: Grant
    Filed: March 5, 1997
    Date of Patent: August 24, 1999
    Assignee: Matsushita Electronics Corporation
    Inventors: Eiji Fujii, Atsuo Inoue, Koji Arita, Toru Nasu, Akihiro Matsuda
  • Patent number: 5932281
    Abstract: A method of forming a Bi-layered ferroelectric thin film on a substrate with good reproducibility, using a mixed composition of a Bi-containing organic compound and a metal polyalkoxide compound by at least one technique selected from the group consisting of molecular deposition such as CVD, and spincoat-sintering.
    Type: Grant
    Filed: May 9, 1997
    Date of Patent: August 3, 1999
    Assignees: Matsushita Electronics Corporation, Kojundo Chemical Laboratory Co., Ltd., Symetrix Corporation
    Inventors: Yukoh Hochido, deceased, Hidekimi Kadokura, Masamichi Matsumoto, Koji Arita, Masamichi Azuma, Tatsuo Otsuki
  • Patent number: 5929475
    Abstract: A method for fabricating a capacitor for an integrated circuit, comprising the steps of forming a titanium film for an adhesion layer over a substrate, forming a titanium dioxide film for a diffusion barrier layer by annealing the titanium film after ion-implantation of oxygen ion into a surface region of the titanium film so as to change titanium in the surface region to titanium dioxide, and forming a high dielectric constant capacitor on the titanium dioxide film.
    Type: Grant
    Filed: December 15, 1995
    Date of Patent: July 27, 1999
    Inventors: Yasuhiro Uemoto, Eigi Fujii, Koji Arita, Yoshihisa Nagano, Yasuhiro Shimada, Masamichi Azuma, Atsuo Inoue, Yasufumi Izutsu
  • Patent number: 5837591
    Abstract: A semiconductor device comprises silicon substrate 1 on which an integrated circuit is formed, first insulating layer 6 formed on silicon substrate 1, a capacitor comprising lower electrode 7 formed on first insulating layer 6, dielectric film 8 having a high dielectric constant and upper electrode 9, a second insulating film 11 having contact holes 13 which lead to lower electrode 7 and upper electrode 9 independently, diffusion barrier layer 17 which touches lower electrode 7 and upper electrode 9 at bottom of contact holes 13, and interconnection layer 15 formed on diffusion barrier layer 17. In diffusion barrier layer 17 at the bottom of contact hole 13, a lamellar region made of granular crystal is formed.
    Type: Grant
    Filed: February 19, 1997
    Date of Patent: November 17, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasuhiro Shimada, Atsuo Inoue, Koji Arita, Toru Nasu, Yoshihisa Nagano, Akihiro Matsuda
  • Patent number: 5780351
    Abstract: A semi conductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm.sup.3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 10.sup.21 atoms/cm.sup.3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.
    Type: Grant
    Filed: April 28, 1997
    Date of Patent: July 14, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koji Arita, Eiji Fujii, Yasuhiro Shimada, Yasuhiro Uemoto, Toru Nasu, Akihiro Matsuda, Yoshihisa Nagano, Atsuo Inoue, Taketoshi Matsuura, Tatsuo Otsuki
  • Patent number: 5660471
    Abstract: A temperature distribution measuring device has a turnable sensor head section 1 in which a plurality of detecting sections are arranged, a shaft 2 to which the sensor head section 1 is mounted so that the array direction of the detecting sections is inclined to the axis of rotation thereof, a rotation driving motor for rotating the shaft 2, control circuit 8 for controlling the direction and speed of rotation of the rotation driving section 3, and an umbrella-shaped chopping member for intermittently blocking incident infrared beams. The device has high spatial resolution and can offer temperature resolution at low cost.
    Type: Grant
    Filed: February 22, 1994
    Date of Patent: August 26, 1997
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Nobuyuki Yoshiike, Koji Arita, Katuya Morinaka, Hiroichi Goto
  • Patent number: 5644158
    Abstract: A semiconductor device comprising: (a) a semiconductor substrate on whose surface an integrated circuit is formed, (b) a first insulating layer formed on the semiconductor device and having first contact holes which lead to the integrated circuit, (c) a capacitance element formed on the first insulating layer, (d) a second insulating layer formed on the first insulating layer to cover the capacitance element, and having second contact holes which lead to an upper and a lower electrodes of the capacitance element respectively, and (e) interconnections which are connected to the integrated circuit and the capacitance element respectively through the first and second contact holes. The hydrogen density of this semiconductor device is 10.sup.11 atoms/cm.sup.2 or less.
    Type: Grant
    Filed: June 20, 1995
    Date of Patent: July 1, 1997
    Assignee: Matsushita Electronics Corporation
    Inventors: Eiji Fujii, Atsuo Inoue, Koji Arita, Toru Nasu, Akihiro Matsuda
  • Patent number: 5627391
    Abstract: A semiconductor device comprises silicon substrate 1 on which an integrated circuit is formed, first insulating layer 6 formed on silicon substrate 1, a capacitor comprising lower electrode 7 formed on first insulating layer 6, dielectric film 8 having a high dielectric constant and upper electrode 9, a second insulating film 11 having contact holes 13 which lead to lower electrode 7 and upper electrode 9 independently, diffusion barrier layer 17 which touches lower electrode 7 and upper electrode 9 at the bottom of contact holes 13, and interconnection layer 15 formed on diffusion barrier layer 17. In diffusion barrier layer 17 at the bottom of contact hole 13, a lamellar region made of granular crystal is formed.
    Type: Grant
    Filed: June 20, 1995
    Date of Patent: May 6, 1997
    Assignee: Matsushita Electronics Corporation
    Inventors: Yasuhiro Shimada, Atsuo Inoue, Koji Arita, Toru Nasu, Yoshihisa Nagano, Akihiro Matsuda
  • Patent number: 5624864
    Abstract: A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm.sup.3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 10.sup.21 atoms/cm.sup.3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.
    Type: Grant
    Filed: August 4, 1994
    Date of Patent: April 29, 1997
    Assignee: Matsushita Electronics Corporation
    Inventors: Koji Arita, Eiji Fujii, Yasuhiro Shimada, Yasuhiro Uemoto, Toru Nasu, Akihiro Matsuda, Yoshihisa Nagano, Atsuo Inoue, Taketoshi Matsuura, Tatsuo Otsuki
  • Patent number: 5591663
    Abstract: A manufacturing method of a semiconductor device comprises the steps:(a) forming a ferroelectric capacitor on a semiconductor substrate on which a MOS transistor is formed, (b) forming an interlayer insulating film which covers the whole semiconductor substrate, (c) forming first contact holes which reach diffusion layers of the MOS transistor, (d) after forming the first contact holes, providing a heat treatment in hydrogen atmosphere, (e) after the heat treatment, forming second contact holes which reach upper and lower electrodes of the ferroelectric capacitor on the interlayer insulating film, and (f) forming metal interconnection. Since the heat treatment in hydrogen atmosphere is provided before forming the second contact holes, a surface state density at interface between the semiconductor and a gate insulating film of the MOS transistor can be lowered without degrading the characteristics of ferroelectric capacitor.
    Type: Grant
    Filed: February 14, 1995
    Date of Patent: January 7, 1997
    Assignee: Matsushita Electonics Corporation
    Inventors: Toru Nasu, Atsuo Inoue, Yoshihisa Nagano, Akihiro Matsuda, Koji Arita
  • Patent number: 5567052
    Abstract: A temperature distribution measurement apparatus has an infrared array sensor that comprises a pyroelectric substrate with infrared ray detecting electrodes, a focusing member comprising an infrared lens for focusing incident infrared rays on the infrared array sensor, a cylindrical chopping member for intermittently shielding incident infrared rays from the plurality of detector elements and a driving member for continuously rotating a rotating member which includes the infrared array sensor. The temperature distribution measurement apparatus combined with computational means and detector means is applied to determine number, position, and movements of persons in a space.
    Type: Grant
    Filed: January 13, 1995
    Date of Patent: October 22, 1996
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Nobuyuki Yoshiike, Koji Arita, Katsuya Morinaka
  • Patent number: 5528038
    Abstract: A temperature distribution measurement apparatus has an infrared array sensor that includes a pyroelectric substrate with infrared array receiving electrodes and electrodes for compensation formed on its front side and opposing electrodes formed on its backside. Also included is an infrared lens to focus incident infrared lights on the array sensor, a chopper to cut off the incident infrared rays intermittently and a rotating part carrying and rotating parts of the apparatus. The detector elements of the infrared array sensor are laid out vertically and parallel with one another. A horizontal temperature distribution is measured by a lateral scanning with the rotating part rotating horizontally while a vertical temperature distribution is measured by driving the chopper in front of the infrared sensor. Thus, a two dimensional temperature distribution of an empty space is measured.
    Type: Grant
    Filed: April 22, 1994
    Date of Patent: June 18, 1996
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Nobuyuki Yoshiike, Koji Arita, Susumu Kobayashi
  • Patent number: 5438849
    Abstract: An air conditioner or heat pump containing a working fluid comprising tetrafluoroethane and at least two fluorinated hydrocarbons having a boiling point of not higher than -40.degree. C. under atmospheric pressure selected from the group consisting of methane derivatives and ethane derivatives which consist of one or two carbon atoms, hydrogen atoms and fluorine atoms, which has very small influence on the ozone layer in the stratosphere and is suitable as a substitute working fluid for chlorodifluoromethane.
    Type: Grant
    Filed: September 15, 1994
    Date of Patent: August 8, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yuji Yoshida, Koji Arita, Masami Funakura
  • Patent number: 5433879
    Abstract: A working fluid comprising difluoroethane and at least two fluorinated hydrocarbons having a boiling point of not higher than -40.degree. C. under atmospheric pressure selected from the group consisting of methane derivatives and ethane derivatives which consist of one or two carbon atoms, hydrogen atoms and fluorine atoms, which has very small influence on the ozone layer in the stratosphere and is suitable as a substitute working fluid for chlorodifluoromethane.
    Type: Grant
    Filed: September 23, 1993
    Date of Patent: July 18, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yuji Yoshida, Koji Arita, Masami Funakura
  • Patent number: 5370811
    Abstract: A working fluid comprising tetrafluoroethane and at least two fluorinated hydrocarbons having a boiling point of not higher than -40.degree. C. under atmospheric pressure selected from the group consisting of methane derivatives and ethane derivatives which consist of one or two carbon atoms, hydrogen atoms and fluorine atoms, which has very small influence on the ozone layer in the stratosphere and is suitable as a substitute working fluid for chlorodifluoromethane.
    Type: Grant
    Filed: February 11, 1992
    Date of Patent: December 6, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yuji Yoshida, Koji Arita, Masami Funakura
  • Patent number: 5304319
    Abstract: A working fluid comprising tetrafluoroethane, difluoroethane and at least one fluorinated hydrocarbon having a boiling point of not higher than -40.degree. C. under atmospheric pressure selected from the group consisting of methane derivatives and ethane derivatives which consist of one or two carbon atoms, hydrogen atoms and fluorine atoms, which has very small influence on the ozone layer in the stratosphere and is suitable as a substitute working fluid for chlorodifluoromethane.
    Type: Grant
    Filed: February 24, 1992
    Date of Patent: April 19, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yuji Yoshida, Koji Arita, Masami Funakura