Patents by Inventor Koji Asakawa

Koji Asakawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9536898
    Abstract: A nonvolatile semiconductor memory device of an embodiment includes: a semiconductor layer; a tunnel insulating film that is formed on the semiconductor layer and includes a first organic molecular film including first organic molecules each having an alkyl molecular chain as the main chain; a charge storage layer formed on the tunnel insulating film, the charge storage layer being made of an inorganic material; a block insulating film formed on the charge storage layer; and a control gate electrode formed on the block insulating film.
    Type: Grant
    Filed: April 28, 2016
    Date of Patent: January 3, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Misako Morota, Hideyuki Nishizawa, Masaya Terai, Shigeki Hattori, Koji Asakawa
  • Patent number: 9515195
    Abstract: An organic molecular memory of an embodiment includes a first conductive layer, a second conductive layer, and an organic molecular layer interposed between the first conductive layer and the second conductive layer, the organic molecular layer including variable-resistance molecular chains or charge-storage molecular chains, the variable-resistance molecular chains or the charge-storage molecular chains having electron-withdrawing substituents.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: December 6, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki Nishizawa, Shigeki Hattori, Masaya Terai, Satoshi Mikoshiba, Koji Asakawa, Tsukasa Tada
  • Publication number: 20160284560
    Abstract: A pattern forming method in an embodiment includes forming, on or above a substrate, a block copolymer layer containing a first polymer and a second polymer having lower surface energy than the first polymer, heat treating the block copolymer layer to separate the block copolymer layer into a first phase containing the first polymer and a second phase containing the second polymer, and using an atomic layer deposition process, selectively forming a metal layer on the first phase and selectively removing the second phase.
    Type: Application
    Filed: March 9, 2016
    Publication date: September 29, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Atsushi HIENO, Koji Asakawa
  • Publication number: 20160284868
    Abstract: A semiconductor memory device in an embodiment includes a semiconductor layer, a control gate electrode, an organic molecular layer provided between the semiconductor layer and the control gate electrode, and a first insulating layer provided between the organic molecular layer and the semiconductor layer, the first insulating layer having a first layer containing alkyl chains and a second layer containing siloxane, the second layer being provided between the first layer and the organic molecular layer.
    Type: Application
    Filed: March 9, 2016
    Publication date: September 29, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masaya TERAI, Shigeki HATTORI, Hideyuki NISHIZAWA, Koji ASAKAWA
  • Publication number: 20160284869
    Abstract: A semiconductor memory device according to an embodiment includes a semiconductor layer, a control gate electrode, and an organic molecular layer provided between the semiconductor layer and the control gate electrode, and the organic molecular layer having an organic molecule that includes a molecular structure described by a molecular formula (1):
    Type: Application
    Filed: March 9, 2016
    Publication date: September 29, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: SHIGEKI HATTORI, MASAYA TERAI, HIDEYUKI NISHIZAWA, KOJI ASAKAWA
  • Patent number: 9450065
    Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a first stacked structure body, a first semiconductor layer, a first organic film, a first semiconductor-side insulating film, and a first electrode-side insulating film. The first stacked structure body includes a plurality of first electrode films stacked along a first direction and a first inter-electrode insulating film provided between the first electrode films. The first semiconductor layer is opposed to side faces of the first electrode films. The first organic film is provided between the side faces of the first electrode films and the first semiconductor layer and containing an organic compound. The first semiconductor-side insulating film is provided between the first organic film and the first semiconductor layer. The first electrode-side insulating film provided between the first organic film and the side faces of the first electrode films.
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: September 20, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shigeki Hattori, Reika Ichihara, Masaya Terai, Hideyuki Nishizawa, Tsukasa Tada, Koji Asakawa, Hiroyuki Fuke, Satoshi Mikoshiba, Yoshiaki Fukuzumi, Hideaki Aochi
  • Patent number: 9444012
    Abstract: A semiconductor light emitting device includes a structural body, a first electrode layer, and a second electrode layer. The structural body includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, and a light emitting layer between the first and second semiconductor layers. The first electrode layer includes a metal portion, plural first opening portions, and at least one second opening portion. The metal portion has a thickness of not less than 10 nanometers and not more than 200 nanometers along a direction from the first semiconductor layer toward the second semiconductor layer. The plural first opening portions each have a circle equivalent diameter of not less than 10 nanometers and not more than 1 micrometer. The at least one second opening portion has a circle equivalent diameter of more than 1 micrometer and not more than 30 micrometers.
    Type: Grant
    Filed: March 1, 2011
    Date of Patent: September 13, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koji Asakawa, Akira Fujimoto, Ryota Kitagawa, Takanobu Kamakura, Shinji Nunotani, Eishi Tsutsumi, Masaaki Ogawa
  • Patent number: 9437779
    Abstract: According to one embodiment, a semiconductor light emitting device includes a structure, a first electrode layer, and a second electrode layer. The structure includes a first semiconductor layer, a second semiconductor layer and a light emitting layer provided between the first semiconductor layer and the second semiconductor layer. The first electrode layer is provided on the first semiconductor layer side of the structure. The first electrode layer is made of metal and contains a portion contacting the first semiconductor layer. The second electrode layer is provided on the second semiconductor layer side of the structure. The second electrode layer has a metal portion with a thickness of not less than 10 nanometers and not more than 50 nanometers, and a plurality of openings piercing the metal portion, each of the openings having an equivalent circle diameter of not less than 10 nanometers and not more than 5 micrometers.
    Type: Grant
    Filed: June 17, 2015
    Date of Patent: September 6, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Koji Asakawa, Akira Fujimoto, Ryota Kitagawa, Kumi Masunaga, Takanobu Kamakura, Shinji Nunotani
  • Publication number: 20160240556
    Abstract: A nonvolatile semiconductor memory device of an embodiment includes: a semiconductor layer; a tunnel insulating film that is formed on the semiconductor layer and includes a first organic molecular film including first organic molecules each having an alkyl molecular chain as the main chain; a charge storage layer formed on the tunnel insulating film, the charge storage layer being made of an inorganic material; a block insulating film formed on the charge storage layer; and a control gate electrode formed on the block insulating film.
    Type: Application
    Filed: April 28, 2016
    Publication date: August 18, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Misako Morota, Hideyuki Nishizawa, Masaya Terai, Shigeki Hattori, Koji Asakawa
  • Patent number: 9412944
    Abstract: An organic molecular memory in an embodiment includes a first electrode having a first work function; a second electrode having a second work function; and an organic molecular layer provided between the first electrode and the second electrode, the organic molecular layer containing a first organic molecule chemically bonded to the first electrode, the first organic molecule having a resistance-change type molecular chain, and the first organic molecule having a first energy level higher than the first work function, and a second organic molecule chemically bonded to the second electrode and the second organic molecule having a second energy level higher than the second work function and lower than the first energy level.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: August 9, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki Nishizawa, Yusuke Tanaka, Koji Asakawa, Yutaka Majima
  • Patent number: 9412943
    Abstract: An organic molecular memory in an embodiment includes a first conductive layer; a second conductive layer; and an organic molecular layer provided between the first conductive layer and the second conductive layer, the organic molecular layer including an organic molecule having an oligophenylene ethynylene backbone, the oligophenylene ethynylene backbone including three or more benzene rings, and the oligophenylene ethynylene backbone including two fluorine atoms added in ortho positions or meta positions of one of the benzene rings other than benzene rings at both ends.
    Type: Grant
    Filed: September 1, 2015
    Date of Patent: August 9, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koji Asakawa, Yutaka Majima, Hideyuki Nishizawa, Yusuke Tanaka, Shigeki Hattori
  • Publication number: 20160195657
    Abstract: While gold wire grids have been used to polarize infrared wavelengths for over a hundred years, they are not appropriate for shorter wavelengths due to their large period. With embodiments of the present invention, grids with periods a few tens of nanometers can be fabricated. Among other things, such grids can be used to polarize visible and even ultraviolet light. As a result, such wire grid polarizers have a wide variety of applications and uses, such as, e.g., in the fabrication of semiconductors, nanolithography, and more.
    Type: Application
    Filed: December 23, 2015
    Publication date: July 7, 2016
    Applicants: KABUSHIKI KAISHA TOSHIBA, Princeton University
    Inventors: Koji Asakawa, Vincent Pelletier, Mingshaw Wu, Douglas Adamson, Richard Register, Paul Chaikin
  • Patent number: 9378962
    Abstract: A nonvolatile semiconductor storage device includes a semiconductor layer, a first insulating film formed on the semiconductor layer, a charge storage layer formed on the first insulating film and having fine metal grains, a second insulating film formed on the charge storage layer, and a gate electrode formed on the second insulating film. During a write operation, a differential voltage is applied across the gate electrode and the semiconductor layer to place the gate electrode at a lower voltage than the semiconductor layer and cause a positive electric charge to be stored in the charge storage layer.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: June 28, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shigeki Hattori, Masakazu Yamagiwa, Masaya Terai, Hideyuki Nishizawa, Koji Asakawa, Yoshiaki Fukuzumi
  • Publication number: 20160164015
    Abstract: An organic molecular memory in an embodiment includes a first conducive layer, a second conductive layer, and an organic molecular layer provided between the first conductive layer and the second conductive layer, the organic molecular layer having an organic molecule, the organic molecule having a linker group bonded to the first conductive layer, a ? conjugated chain bonded to the linker group, and a phenyl group bonded to the ? conjugated chain opposite to the linker group and facing the second conductive layer, the ? conjugated chain including electron-accepting groups or electron-donating groups arranged in line asymmetry with respect to a bonding direction of the ? conjugate chain, the phenyl group having substituents R0, R1, R2, R3, and R4 as shown in the following formula, the substituent R0 being an electron-accepting group or an electron-donating group.
    Type: Application
    Filed: January 5, 2016
    Publication date: June 9, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yusuke Tanaka, Hideyuki Nishizawa, Shigeki Hattori, Koji Asakawa
  • Patent number: 9356111
    Abstract: A nonvolatile semiconductor memory device of an embodiment includes: a semiconductor layer; a tunnel insulating film that is formed on the semiconductor layer and includes a first organic molecular film including first organic molecules each having an alkyl molecular chain as the main chain; a charge storage layer formed on the tunnel insulating film, the charge storage layer being made of an inorganic material; a block insulating film formed on the charge storage layer; and a control gate electrode formed on the block insulating film.
    Type: Grant
    Filed: October 20, 2014
    Date of Patent: May 31, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Misako Morota, Hideyuki Nishizawa, Masaya Terai, Shigeki Hattori, Koji Asakawa
  • Patent number: 9331248
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type and a light emitting layer provided between the first semiconductor layer and the second semiconductor layer. The device also includes a first electrode layer having electrical continuity with the first semiconductor layer and a second electrode layer provided on the second semiconductor layer, the second electrode layer including a metal portion having a thickness not less than 10 nanometers and not more than 100 nanometers along a direction from the first semiconductor layer to the second semiconductor layer.
    Type: Grant
    Filed: November 18, 2014
    Date of Patent: May 3, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kumi Masunaga, Ryota Kitagawa, Akira Fujimoto, Koji Asakawa, Takanobu Kamakura, Shinji Nunotani
  • Patent number: 9324914
    Abstract: A semiconductor light-emitting device capable of keeping high luminance intensity even if electric power increases, and suitable for lighting instruments such as lights and lamps. The semiconductor device includes a metal electrode layer provided with openings, and is so large in size that the electrode layer has, for example, an area of 1 mm2 or more. The openings have a mean diameter of 10 nm to 2 ?m, and penetrate through the metal electrode layer. The metal electrode layer can be produced by use of self-assembling of block copolymer or by nano-imprinting techniques.
    Type: Grant
    Filed: February 25, 2010
    Date of Patent: April 26, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akira Fujimoto, Ryota Kitagawa, Koji Asakawa
  • Publication number: 20160111791
    Abstract: A pattern antenna, with desired antenna characteristics, that is formed in a small area is provided. The pattern antenna includes a substrate, a ground portion formed on a first surface of the substrate, an antenna element portion, a short-circuiting portion, and a connecting portion. The antenna element portion is a conductor pattern including a conductor pattern in which a plurality of bent portions are formed. The conductor pattern is formed on the first surface of the substrate and, and is electrically connected to the grand portion. The short-circuiting portion includes a conductor pattern formed in a second surface, which is a different surface from the first surface. The conductor pattern is formed so as to at least partially overlap with the conductor pattern of the antenna element portion as viewed in planar view. The connecting portion is configured to electrically connect the conductor pattern of the antenna element portion to the conductor pattern of the short-circuiting portion.
    Type: Application
    Filed: December 30, 2015
    Publication date: April 21, 2016
    Applicant: MegaChips Corporation
    Inventor: Koji ASAKAWA
  • Patent number: 9318661
    Abstract: A semiconductor light emitting device includes a first semiconductor layer of a first conductivity type, a first electrode layer, a light emitting layer, a second semiconductor layer, a third semiconductor layer and a second electrode layer. The first electrode layer includes a metal portion having a plurality of opening portions. The opening portions penetrate the metal portion and have an equivalent circle diameter of a shape of the opening portions. The light emitting layer is between the first semiconductor layer and the first electrode layer. The second semiconductor layer of a second conductivity type is between the light emitting layer and the first electrode layer. The third semiconductor layer of a second conductivity type is between the second semiconductor layer and the first electrode layer. The second electrode layer is connected to the first semiconductor layer.
    Type: Grant
    Filed: March 1, 2011
    Date of Patent: April 19, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kumi Masunaga, Ryota Kitagawa, Eishi Tsutsumi, Akira Fujimoto, Koji Asakawa, Takanobu Kamakura, Shinji Nunotani
  • Patent number: 9312407
    Abstract: The present invention provides a metal electrode transparent to light. The metal electrode comprises a transparent substrate and a metal electrode layer composed of a metal part and plural openings. The metal electrode layer continues without breaks, and 90% or more of the metal part continues linearly without breaks by the openings in a straight length of not more than ? of the visible wavelength to use in 380 nm to 780 nm. The openings have an average diameter in the range of not less than 10 nm and not more than ? of the wavelength of incident light, and the pitches between the centers of the openings are not less than the average diameter and not more than ½ of the wavelength of incident light. The metal electrode layer has a thickness in the range of not less than 10 nm and not more than 200 nm.
    Type: Grant
    Filed: November 6, 2012
    Date of Patent: April 12, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Eishi Tsutsumi, Akira Fujimoto, Koji Asakawa