Patents by Inventor Koji Asakawa

Koji Asakawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160087206
    Abstract: A method for manufacturing a memory device of an embodiment includes: forming on a substrate a block copolymer layer which contains a first polymer and a second polymer having lower surface energy than that of the first polymer; performing thermal treatment on the block copolymer layer, to separate the block copolymer layer such that a first phase containing the first polymer and extending in the first direction and a second phase containing the second polymer and extending in the first direction are alternately arrayed; selectively forming on the first phase a first metal wiring layer extending in the first direction; forming on the first metal wiring layer a memory layer where resistance changes by application of a voltage; and forming on the memory layer a second metal wiring layer which extends in a second direction intersecting in the first direction.
    Type: Application
    Filed: September 1, 2015
    Publication date: March 24, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Atsushi HIENO, Koji ASAKAWA
  • Publication number: 20160087203
    Abstract: An organic molecular memory in an embodiment includes a first electrode having a first work function; a second electrode having a second work function; and an organic molecular layer provided between the first electrode and the second electrode, the organic molecular layer containing a first organic molecule chemically bonded to the first electrode, the first organic molecule having a resistance-change type molecular chain, and the first organic molecule having a first energy level higher than the first work function, and a second organic molecule chemically bonded to the second electrode and the second organic molecule having a second energy level higher than the second work function and lower than the first energy level.
    Type: Application
    Filed: September 2, 2015
    Publication date: March 24, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki NISHIZAWA, Yusuke TANAKA, Koji ASAKAWA, Yutaka MAJIMA
  • Publication number: 20160087202
    Abstract: An organic molecular memory in an embodiment includes a first conductive layer; a second conductive layer; and an organic molecular layer provided between the first conductive layer and the second conductive layer, the organic molecular layer including an organic molecule having an oligophenylene ethynylene backbone, the oligophenylene ethynylene backbone including three or more benzene rings, and the oligophenylene ethynylene backbone including two fluorine atoms added in ortho positions or meta positions of one of the benzene rings other than benzene rings at both ends.
    Type: Application
    Filed: September 1, 2015
    Publication date: March 24, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Koji ASAKAWA, Yutaka Majima, Hideyuki Nishizawa, Yusuke Tanaka, Shigeki Hattori
  • Publication number: 20160087067
    Abstract: A nonvolatile semiconductor memory device according to an embodiment includes: a semiconductor layer; a control gate electrode; and an organic molecular layer, which is provided between the semiconductor layer and the control gate electrode, and has organic molecules including a molecular structure described by a molecular formula (1).
    Type: Application
    Filed: September 1, 2015
    Publication date: March 24, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shigeki HATTORI, Tsukasa TADA, Masaya TERAI, Hideyuki NISHIZAWA, Koji ASAKAWA, Yoshiaki FUKUZUMI
  • Patent number: 9291908
    Abstract: According to one embodiment, there is provided a method of forming a pattern, including forming a thermally crosslinkable molecule layer including a thermally crosslinkable molecule on a substrate, forming a photosensitive composition layer including a photosensitive composition on the thermally crosslinkable molecule layer, chemically binding the thermally crosslinkable molecule to the photosensitive composition by heating, selectively irradiating the photosensitive composition layer with energy rays, forming a block copolymer layer including a block copolymer on the photosensitive composition layer, and forming a microphase-separated structure in the block copolymer layer.
    Type: Grant
    Filed: June 1, 2015
    Date of Patent: March 22, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Atsushi Hieno, Shigeki Hattori, Hiroko Nakamura, Satoshi Mikoshiba, Koji Asakawa, Masahiro Kanno, Yuriko Seino, Tsukasa Azuma
  • Publication number: 20160079387
    Abstract: Disclosed herein is a nonvolatile semiconductor memory device containing a semiconductor layer, a block insulating layer, an organic molecular layer which is formed between the semiconductor layer and the block insulating layer, and a control gate electrode formed on the block insulating layer. The organic molecular layer contains first organic molecules and second organic molecules, such that the first organic molecule has a first alkyl chain or a first alkyl halide chain on the semiconductor layer side and a charge trapping unit on the block insulating layer side, and the second organic molecule has a second alkyl chain or a second alkyl halide chain on the semiconductor layer side and a hydroxy group, an ether group, a carboxyl group or an ester group on the block insulating layer side.
    Type: Application
    Filed: November 20, 2015
    Publication date: March 17, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masaya TERAI, Shigeki HATTORI, Takatoshi WATANABE, Masakazu YAMAGIWA, Wangying LIN, Koji ASAKAWA
  • Patent number: 9276216
    Abstract: An organic molecular device of an embodiment includes a first and a second conductive layers and an organic molecular layer having an organic molecule provided between the first and the second conductive layer. The organic molecule includes a one-dimensional or quasi one-dimensional ?-conjugated system chain having either a first aromatic ring or a second aromatic ring. The first aromatic ring has one or more substituents that are an electron withdrawing group, each substituent of the first aromatic ring is independently selected from the group consisting of the electron withdrawing group and hydrogen, the second aromatic ring has one or more substituents that are an electron releasing group, and each substituent of the second aromatic ring is independently selected from the group consisting of the electron releasing group and hydrogen. The first aromatic ring or the second aromatic ring exist in an unbalanced manner in the ?-conjugated system chain.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: March 1, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki Nishizawa, Shigeki Hattori, Yusuke Tanaka, Koji Asakawa
  • Patent number: 9263687
    Abstract: An organic molecular memory in an embodiment includes a first conducive layer, a second conductive layer, and an organic molecular layer provided between the first conductive layer and the second conductive layer, the organic molecular layer having an organic molecule, the organic molecule having a linker group bonded to the first conductive layer, a ? conjugated chain bonded to the linker group, and a phenyl group bonded to the ? conjugated chain opposite to the linker group and facing the second conductive layer, the ? conjugated chain including electron-accepting groups or electron-donating groups arranged in line asymmetry with respect to a bonding direction of the ? conjugated chain, the phenyl group having substituents R0, R1, R2, R3, and R4 as shown in the following formula, the substituent R0 being an electron-accepting group or an electron-donating group.
    Type: Grant
    Filed: August 11, 2014
    Date of Patent: February 16, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yusuke Tanaka, Hideyuki Nishizawa, Shigeki Hattori, Koji Asakawa
  • Patent number: 9245969
    Abstract: A nonvolatile semiconductor memory device according to an embodiment includes: a semiconductor layer; a block insulating film; an organic molecular layer, which is formed between the semiconductor layer and the block insulating film, and provided with a first organic molecular film on the semiconductor layer side containing first organic molecules and a second organic molecular film on the block insulating film side containing second organic molecules, and in which the first organic molecule has a charge storing unit and the second organic molecule is an amphiphilic organic molecule; and a control gate electrode formed on the block insulating film.
    Type: Grant
    Filed: August 7, 2015
    Date of Patent: January 26, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeki Hattori, Masaya Terai, Hideyuki Nishizawa, Koji Asakawa, Yoshiaki Fukuzumi
  • Publication number: 20160000202
    Abstract: A hair removal tool is equipped with: a drive unit for driving a blade; a load detection unit for detecting the size of the load on the drive unit; and a control unit for changing the drive mode of the drive unit between a first drive mode for driving the drive unit at a first drive speed, a second drive mode for driving the drive unit at a second drive speed which is faster than the first drive speed, and a transition mode for driving the drive unit at a transition speed which is faster than the second drive speed. A first interval is set as the interval from when the drive mode is changed from the first drive mode to the transition mode until when the drive mode is changed from the transition mode to the second drive mode. A second interval is set as the interval from when the drive mode is changed from the transition mode to the second drive mode until when the drive mode is changed from the second drive mode to the first drive mode. The first interval is shorter than the second interval.
    Type: Application
    Filed: January 23, 2014
    Publication date: January 7, 2016
    Inventors: Takafumi OHBA, Koji ASAKAWA, Masanobu YAMASAKI, Yoichi TAKAOKA
  • Patent number: 9231417
    Abstract: The charging current value in the first trickle charge after the rapid charge is differentiated from the charging current value in the second and subsequent trickle charge. Thus, for example, in the first trickle charge, charging can be performed with the charging current value required to simultaneously activate and charge an inactive battery. In the second and subsequent trickle charge, charging can be performed with the charging current value required to compensate for self-discharge of a rechargeable battery. By charging the battery with the charging current value required to compensate for self-discharge of the battery in the second and subsequent trickle charge, power consumption required to charge the battery can be reduced, compared to the case where the trickle charge is continued with a constant charging current value required to simultaneously activate and charge the inactive battery, as the conventional device.
    Type: Grant
    Filed: June 12, 2012
    Date of Patent: January 5, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Kazunori Watanabe, Koji Asakawa
  • Patent number: 9231132
    Abstract: A solar cell having on a light incident surface side an electrode with both low resistivity and high transparency to promote efficient excitation of carriers using inexpensive materials. The solar cell includes a photoelectric conversion layer, a first electrode layer arranged on the light incident surface side, and a second electrode layer arranged opposed to the first electrode layer. The first electrode layer has a thickness in the range of 10 to 200 nm, and plural penetrating openings, each of which occupies an area in the range of 80 nm2 to 0.8 ?m2, and has an aperture ratio in the range 10 to 66%. The first electrode layer can be produced by etching using an etching mask in the form of a single particle layer of fine particles, or of a dot pattern formed by self-assembly of a block copolymer, or of a stamper.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: January 5, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kumi Masunaga, Akira Fujimoto, Tsutomu Nakanishi, Eishi Tsutsumi, Ryota Kitagawa, Koji Asakawa, Hideyuki Nishizawa
  • Patent number: 9231114
    Abstract: A nonvolatile semiconductor memory device according to an embodiment includes: a semiconductor layer; a block insulating layer; an organic molecular layer, which is formed between the semiconductor layer and the block insulating layer, and contains first organic molecules and second organic molecules, and in which the first organic molecule has a first alkyl chain or a first alkyl halide chain on the semiconductor layer side and a charge trapping unit on the block insulating layer side, and the second organic molecule has a second alkyl chain or a second alkyl halide chain on the semiconductor layer side and a hydroxy group, an ether group, a carboxyl group or an ester group on the block insulating layer side; and a control gate electrode formed on the block insulating layer.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: January 5, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masaya Terai, Shigeki Hattori, Takatoshi Watanabe, Masakazu Yamagiwa, Wangying Lin, Koji Asakawa
  • Patent number: 9207531
    Abstract: According to one embodiment, a pattern including first and second block phases is formed by self-assembling a block copolymer onto a film to be processed. The entire block copolymer present in a first region is removed under a first condition by carrying out energy beam irradiation and development, thereby leaving a pattern including the first and second block phases in a region other than the first region. The first block phase present in a second region is selectively removed under a second condition by carrying out energy beam irradiation and development, thereby leaving a pattern including the first and second block phases in an overlap region between a region other than the first region and a region other than the second region, and leaving a pattern of second block phase in the second region excluding the overlap region. The film is etched with the left patterns as masks.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: December 8, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroko Nakamura, Koji Asakawa, Shigeki Hattori, Satoshi Tanaka, Toshiya Kotani
  • Patent number: 9209263
    Abstract: A nonvolatile semiconductor memory device includes a semiconductor layer, a control gate electrode, and an organic molecular layer provided between the semiconductor layer and the control gate electrode and having an organic molecule including a porphyrin structure.
    Type: Grant
    Filed: March 16, 2015
    Date of Patent: December 8, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeki Hattori, Masaya Terai, Hideyuki Nishizawa, Koji Asakawa, Yoshiaki Fukuzumi
  • Publication number: 20150349081
    Abstract: A nonvolatile semiconductor memory device according to an embodiment includes: a semiconductor layer; a block insulating film; an organic molecular layer, which is formed between the semiconductor layer and the block insulating film, and provided with a first organic molecular film on the semiconductor layer side containing first organic molecules and a second organic molecular film on the block insulating film side containing second organic molecules, and in which the first organic molecule has a charge storing unit and the second organic molecule is an amphiphilic organic molecule; and a control gate electrode formed on the block insulating film.
    Type: Application
    Filed: August 7, 2015
    Publication date: December 3, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shigeki Hattori, Masaya Terai, Hideyuki Nishizawa, Koji Asakawa, Yoshiaki Fukuzumi
  • Patent number: 9177818
    Abstract: According to one embodiment, a pattern formation method includes: forming a block copolymer layer containing a polystyrene derivative and an acrylic having 6 or more carbon atoms on a side chain in an opening of a resist layer provided on an underlayer and having the opening; forming a first layer containing the polystyrene derivative and a second layer containing the acrylic in the opening by phase-separating the block copolymer layer; and removing the second layer.
    Type: Grant
    Filed: October 29, 2013
    Date of Patent: November 3, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsushi Hieno, Hiroko Nakamura, Koji Asakawa
  • Publication number: 20150311393
    Abstract: According to one embodiment, a semiconductor light emitting device includes a structure, a first electrode layer, and a second electrode layer. The structure includes a first semiconductor layer, a second semiconductor layer and a light emitting layer provided between the first semiconductor layer and the second semiconductor layer. The first electrode layer is provided on the first semiconductor layer side of the structure. The first electrode layer is made of metal and contains a portion contacting the first semiconductor layer. The second electrode layer is provided on the second semiconductor layer side of the structure. The second electrode layer has a metal portion with a thickness of not less than 10 nanometers and not more than 50 nanometers, and a plurality of openings piercing the metal portion, each of the openings having an equivalent circle diameter of not less than 10 nanometers and not more than 5 micrometers.
    Type: Application
    Filed: June 17, 2015
    Publication date: October 29, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Koji ASAKAWA, Akira FUJIMOTO, Ryota KITAGAWA, Kumi MASUNAGA, Takanobu KAMAKURA, Shinji NUNOTANI
  • Patent number: 9159880
    Abstract: According to one embodiment, a semiconductor light emitting device includes a structure, a first electrode layer, and a second electrode layer. The structure includes a first semiconductor layer, a second semiconductor layer and a light emitting layer provided between the first semiconductor layer and the second semiconductor layer. The first electrode layer is provided on the first semiconductor layer side of the structure. The first electrode layer is made of metal and contains a portion contacting the first semiconductor layer. The second electrode layer is provided on the second semiconductor layer side of the structure. The second electrode layer has a metal portion with a thickness of not less than 10 nanometers and not more than 50 nanometers, and a plurality of openings piercing the metal portion, each of the openings having an equivalent circle diameter of not less than 10 nanometers and not more than 5 micrometers.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: October 13, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koji Asakawa, Akira Fujimoto, Ryota Kitagawa, Kumi Masunaga, Takanobu Kamakura, Shinji Nunotani
  • Patent number: 9152053
    Abstract: According to one embodiment, a method of forming a pattern includes forming a monolayer on a substrate, selectively exposing the monolayer to an energy beam and selectively modifying exposed portions thereof to form patterns of exposed and unexposed portions, forming a block copolymer layer includes first and second block chains on the monolayer, and causing the block copolymer layer to be phase-separated to form patterns of the first and second block chains of the block copolymer layer based on the patterns of the exposed and unexposed portions of the monolayer.
    Type: Grant
    Filed: March 26, 2012
    Date of Patent: October 6, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shigeki Hattori, Ryota Kitagawa, Koji Asakawa