Patents by Inventor Koji Matsui

Koji Matsui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020042164
    Abstract: An electronic device assembly for dense mounting of electronic devices and method of connecting the electronic devices are disclosed. Conductive portions implemented by metal bumps and sealing portions implemented by adhesive seal resin are connected by thermocompress ion at the same time between two electronic devices. This may be repeated between three or more electronic device.
    Type: Application
    Filed: November 29, 2001
    Publication date: April 11, 2002
    Applicant: NEC CORPORATION
    Inventors: Takuo Funaya, Tadanori Shimoto, Naoji Senba, Koji Matsui
  • Publication number: 20020030577
    Abstract: A thin-film resistor that enables a pattern to be simply formed by means of wet etching, that has an excellent resistance temperature characteristic, and that can be easily manufactured, and a method for manufacturing this thin-film resistor, as well as a wiring substrate with this thin-film resistor formed therein. A thin resistor film according to this invention has a structure in which crystal grains deposit in the matrix of amorphous titanium nitride. The thin resistor film is formed on a substrate. The crystal grains includes at least one of crystal titanium nitride and crystal titanium. The thin resistor film can be manufactured using a simple process and can provide a wide range of resistance values with a small tolerance and a temperature coefficient of resistance close to zero.
    Type: Application
    Filed: September 12, 2001
    Publication date: March 14, 2002
    Inventors: Akinobu Shibuya, Koji Matsui
  • Publication number: 20020024138
    Abstract: A wiring board for high dense mounting comprises at least one layer of interlayer insulator and at least one layer of conductive wiring pattern formed on a base material. The interlayer insulator comprises a polybenzoxazole film. An adhesive layer comprising at least one selected from the group consisting of Ti, Ti-containing compounds and Ni is formed between the polybenzoxazole film and the conductive wiring pattern. The wiring board has a high heat resistance, low dielectric constant, low water absorption degree, low thermal expansion coefficient, and high adhesion between conductors and insulators. The wiring board is also excellent in film strength and shear extensibility, capable of enduring a stress in mounting of a semiconductor device, excellent in reliability, and optimal for high speed and high dense mounting.
    Type: Application
    Filed: August 7, 2001
    Publication date: February 28, 2002
    Applicant: NEC Corporation
    Inventors: Tadanori Shimoto, Koji Matsui, Katsumi Kikuchi
  • Publication number: 20020020836
    Abstract: There is provided a thin film capacitor including (a) a lower electrode, (b) an insulating layer formed burying the lower electrode therein and formed with a via-hole reaching the lower electrode, (c) a dielectric layer formed on an inner sidewall of the via-hole and covering an exposed surface of the lower electrode therewith, and (d) an upper electrode surrounded by the dielectric layer. In accordance with the thin film capacitor, the upper electrode is formed to be buried in the via-hole formed above the lower electrode. Hence, it is possible to prevent short-circuit between the upper and lower electrodes, and degradation of the dielectric layer during fabrication of a thin film capacitor, both of which enhances reliability of a capacitor. In addition, a multi-layered wiring structure could be readily fabricated on the thin film capacitor.
    Type: Application
    Filed: April 20, 2001
    Publication date: February 21, 2002
    Applicant: NEC Corporation
    Inventors: Katsumi Kikuchi, Tadanori Shimoto, Koji Matsui, Akinobu Shibuya
  • Publication number: 20020001937
    Abstract: A semiconductor package board for mounting thereon a semiconductor chip includes a metal base having an opening for receiving therein the semiconductor chip and a multilayer wiring film layered onto the metal base. The semiconductor chip is flip-chip bonded onto the metal pads disposed on the multilayer wiring film within the opening. The surface of the metal base is flush with the top surface of the semiconductor chip received in the opening. The resultant semiconductor device has a larger number of external pins and a smaller deformation without using a stiffener.
    Type: Application
    Filed: June 29, 2001
    Publication date: January 3, 2002
    Applicant: NEC CORPORATION
    Inventors: Katsumi Kikuchi, Tadanori Shimoto, Koji Matsui, Kazuhiro Baba
  • Patent number: 6333136
    Abstract: The present invention provides a carrier film in which a cover resist layer made of epoxy acrylate resin including a fluorene skeleton is formed on a heat-resistant resin film including a conductive wiring pattern. The carrier film has heat resistance, moisture resistance, and close contact property, as well as chemical resistance in a plating process or the like, and does not warp because contraction in resin hardening is small.
    Type: Grant
    Filed: September 14, 2000
    Date of Patent: December 25, 2001
    Assignee: NEC Corporation
    Inventors: Tadanori Shimoto, Koji Matsui
  • Patent number: 6331811
    Abstract: A thin-film resistor that enables a pattern to be simply formed by means of wet etching, that has an excellent resistance temperature characteristic, and that can be easily manufactured, and a method for manufacturing this thin-film resistor, as well as a wiring substrate with this thin-film resistor formed therein. A thin resistor film according to this invention has a structure in which crystal grains deposit in the matrix of amorphous titanium nitride. The thin resistor film is formed on a substrate. The crystal grains includes at least one of crystal titanium nitride and crystal titanium. The thin resistor film can be manufactured using a simple process and can provide a wide range of resistance values with a small tolerance and a temperature coefficient of resistance close to zero.
    Type: Grant
    Filed: June 7, 1999
    Date of Patent: December 18, 2001
    Assignee: NEC Corporation
    Inventors: Akinobu Shibuya, Koji Matsui
  • Publication number: 20010019301
    Abstract: A thin-film resistor that enables a pattern to be simply formed by means of wet etching, that has an excellent resistance temperature characteristic, and that can be easily manufactured, and a method for manufacturing this thin-film resistor, as well as a wiring substrate with this thin-film resistor formed therein. A thin resistor film according to this invention has a structure in which crystal grains deposit in the matrix of amorphous titanium nitride. The thin resistor film is formed on a substrate. The crystal grains includes at least one of crystal titanium nitride and crystal titanium. The thin resistor film can be manufactured using a simple process and can provide a wide range of resistance values with a small tolerance and a temperature coefficient of resistance close to zero.
    Type: Application
    Filed: June 7, 1999
    Publication date: September 6, 2001
    Inventors: AKINOBU SHIBUYA, KOJI MATSUI
  • Patent number: 6278153
    Abstract: There is provided a thin film capacitor including (a) a lower electrode, (b) an insulating layer formed burying the lower electrode therein and formed with a via-hole reaching the lower electrode, (c) a dielectric layer formed on an inner sidewall of the via-hole and covering an exposed surface of the lower electrode therewith, and (d) an upper electrode surrounded by the dielectric layer. In accordance with the thin film capacitor, the upper electrode is formed to be buried in the via-hole formed above the lower electrode. Hence, it is possible to prevent short-circuit between the upper and lower electrodes, and degradation of the dielectric layer during fabrication of a thin film capacitor, both of which enhances reliability of a capacitor. In addition, a multi-layered wiring structure could be readily fabricated on the thin film capacitor.
    Type: Grant
    Filed: October 19, 1999
    Date of Patent: August 21, 2001
    Assignee: NEC Corporation
    Inventors: Katsumi Kikuchi, Tadanori Shimoto, Koji Matsui, Akinobu Shibuya
  • Publication number: 20010011111
    Abstract: A resin matrix with resistances to alkali and acid includes at least any one of insulative organic particles and insulative composite particles having an organic component and an inorganic component with the total amount of these particles being in the range of 5-50% by volume, wherein the insulative organic particles and the organic component of the insulative composite particles are allowed to be corroded by either alkali or acid, and wherein not less than 90% by volume of the insulative organic particles and insulative component particles have a particle diameter in the range of 1-20 micrometers.
    Type: Application
    Filed: March 23, 2001
    Publication date: August 2, 2001
    Applicant: NEC Corporation
    Inventors: Yoshitsugu Funada, Koji Matsui
  • Publication number: 20010003656
    Abstract: An electronic device assembly for dense mounting of electronic devices and method of connecting the electronic devices are disclosed. Conductive portions implemented by metal bumps and sealing portions implemented by adhesive seal resin are connected by thermocompression at the same time between two electronic devices. This may be repeated between three or more electronic device.
    Type: Application
    Filed: December 7, 2000
    Publication date: June 14, 2001
    Inventors: Takuo Funaya, Tadanori Shimoto, Naoji Senba, Koji Matsui
  • Patent number: 6232398
    Abstract: A resin matrix with resistances to alkali and acid such as a fluorene-containing epoxy acrylate and/or a benzocyclobutene resin includes at least any one of insulative organic particles and insulative composite particles having an organic component and an inorganic component with the total amount of these particles being in the range of 5-50% by volume, wherein the insulative organic particles and the organic component of the insulative composite particles are allowed to be corroded by either alkali or acid, and wherein not less than 90% by volume of the insulative organic particles and insulative composite particles have a particle diameter in the range of 1-20 micrometers.
    Type: Grant
    Filed: December 5, 1997
    Date of Patent: May 15, 2001
    Assignee: NEC Corporation
    Inventors: Yoshitsugu Funada, Koji Matsui
  • Patent number: 6204565
    Abstract: A semiconductor carrier is provided with a through hole bump. The bump is formed by coating a photosensitive adhesive consisting of an epoxy acrylate having a fluorene skeleton or polybenzoxazole over a support substrate having a conductive interconnection pattern, exposing and developing the adhesive for forming a through hole therein, and plating for filling a metal within the through hole. The photosensitive adhesive is preferably heated at 80-160° C. prior to the plating process if it comprises the epoxy acrylate having a fluorene skeleton and at 80-250° C. if it comprises the polybenzoxazole.
    Type: Grant
    Filed: June 10, 1999
    Date of Patent: March 20, 2001
    Assignee: NEC Corporation
    Inventors: Tadanori Shimoto, Koji Matsui
  • Patent number: 6156414
    Abstract: The present invention provides a carrier film in which a cover resist layer made of epoxy acrylate resin including a fluorene skeleton is formed on a heat-resistant resin film including a conductive wiring pattern. The carrier film has heat resistance, moisture resistance, and close contact property, as well as chemical resistance in a plating process or the like, and does not warp because contraction in resin hardening is small.
    Type: Grant
    Filed: August 26, 1998
    Date of Patent: December 5, 2000
    Assignee: NEC Corporation
    Inventors: Tadanori Shimoto, Koji Matsui
  • Patent number: 6150074
    Abstract: There is provided a method of forming an electrically conductive wiring pattern, including the steps of patterning a resist on a substrate so that the resist has at least one recess where an electrically conductive wiring is to be formed, the substrate appearing in the recess, the resist being composed of silicon dioxide particles having a diameter of 5 .mu.m or smaller and epoxy acrylate having a fluorene skeleton, etching the resist by plasma-ashing so that the silicon dioxide particles appear on a surface of the resist, forming a metal film over both the resist and the substrate appearing in the recess, and removing the metal film formed on the resist by removing the silicon dioxide particles appearing on a surface of the resist.
    Type: Grant
    Filed: March 2, 1998
    Date of Patent: November 21, 2000
    Assignee: NEC Corporation
    Inventors: Tadanori Shimoto, Koji Matsui
  • Patent number: 6087285
    Abstract: A novel zirconia sintered body is provided which contains Y.sub.2 O.sub.3 in a solid solution state, and has tetragonal crystal grains oriented at an orientation degree of not higher than 45%. A process for producing the zirconia sintered body is also provided. This zirconium sintered body deteriorates less, and excellent in stability of surface smoothness, and can be produced by a simple process.
    Type: Grant
    Filed: October 8, 1998
    Date of Patent: July 11, 2000
    Assignee: Tosoh Corporation
    Inventors: Nobukatsu Oomichi, Koji Matsui, Akemi Kato, Michiharu Oogai
  • Patent number: 6042682
    Abstract: A supporting substrate for mounting a semiconductor bare chip thereon has a surface provided with electrode pads thereon and bumps on the electrode pads. A sealing resin film is selectively formed on the surface of the supporting substrate, except over the bumps, and further the sealing resin film has at least a thermosetting property. The electrode pads of the above supporting substrate and the bumps of the semiconductor bare chip are bonded by a thermo-compression bonding method whereby the sealing between the supporting substrate and the semiconductor bare chip is simultaneously conducted.
    Type: Grant
    Filed: May 26, 1998
    Date of Patent: March 28, 2000
    Assignee: NEC Corporation
    Inventors: Takuo Funaya, Koji Matsui
  • Patent number: 6030914
    Abstract: A zirconia fine powder consisting of primary particles having a BET specific surface area of from 40 to 200 m.sup.2 /g and a mean particle size of at most 0.1 .mu.m as measured by an electron microscope, wherein the ratio of the mean particle size as measured by an electron microscope to a mean particle size calculated from the BET specific surface area, is at least 0.9.
    Type: Grant
    Filed: November 10, 1997
    Date of Patent: February 29, 2000
    Assignee: Tosoh Corporation
    Inventor: Koji Matsui
  • Patent number: 5972739
    Abstract: A resin-encapsulated semiconductor device includes a semiconductor chip consisting of a semiconductor element having metal bumps and metal leads electrically connected to the metal bumps and having a surface-treated layer obtained by a surface treatment, and a resin film stacked on the outer side of the semiconductor chip and tightly adhered to the semiconductor chip by a heat treatment and pressurization treatment.
    Type: Grant
    Filed: March 13, 1998
    Date of Patent: October 26, 1999
    Assignee: NEC Corporation
    Inventors: Yoshitsugu Funada, Koji Matsui
  • Patent number: 5926595
    Abstract: A novel optical fiber connector part is provided which comprises a ferrule having a capillary hole for holding an optical fiber, the ferrule being formed from a zirconia-alumina composite oxide containing yttria at a content ranging from 2 to 4 mol % in zirconia. In the optical fiber connector part, a sleeve for connecting and holding the ferrule may be formed from zirconia and/or a zirconia-alumina composite oxide. A process for producing the optical fiber connector part is provided wherein the granular zirconia-alumina composed of a particulate zirconia-alumina mixture having an average particle diameter of not more than 1 .mu.m is used as raw material. The granular zirconia-alumina preferably contains alumina at a content ranging from 0.1% to 50% by weight. The process comprises spray-drying a slurry containing a particulate zirconia-alumina mixture having an average particle diameter of not more than 1 .mu.m.
    Type: Grant
    Filed: November 19, 1997
    Date of Patent: July 20, 1999
    Assignee: Tosoh Corporation
    Inventors: Koji Matsui, Kuniyoshi Ueda, Toshihiko Arakawa, Michiharu Ogawa