Patents by Inventor Koji Matsui

Koji Matsui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5889233
    Abstract: A multilayer wiring structure having a flame-retardant property corresponding to the V-0 class in the UL 94 standard is provided without degrading the inherent properties of a benzocyclobutene resin. The multilayer wiring structure contains a lower-level wiring layer formed on a base material, a lower-level interlayer insulating layer formed to cover the lower-level wiring layer, and an upper-level wiring layer formed on the interlayer insulating layer, an upper-level interlayer insulating layer formed to cover the upper-level wiring layer, and a protection layer formed to cover the upper-level interlayer insulating layer. Each of the lower- and upper-level interlayer insulating layers is made of a benzocyclobutene resin. The protection layer has a flame-retardant or non-flammable property corresponding to the V-0 class in the UL 94 standard. The protection layer may be made of a flame-retardant material such as a fluororesin, a polyimide resin or an epoxy resin.
    Type: Grant
    Filed: August 14, 1996
    Date of Patent: March 30, 1999
    Assignee: NEC Corporation
    Inventors: Tadanori Shimoto, Koji Matsui
  • Patent number: 5830563
    Abstract: This invention relates to an interconnection structure comprising one or more insulating films and one or more layers of conductor electrode patterns, wherein at least one of the insulating films consists of a fluorene skeleton-containing epoxy acrylate resin, and to a method of making a multilayer interconnection structure including the steps of roughening the surface of an insulating resin layer and forming a conductor thereon by electroless plating, wherein the average roughness (Ra), maximum roughness (Ry) and conductor thickness (T) of the roughened surface of the insulating resin layer satisfy the following relations:0.2.ltoreq.Ra.ltoreq.0.6 (unit: .mu.m) (1)0.02.ltoreq.Ra/T.ltoreq.0.2 (2)0.05.ltoreq.Ry/T.ltoreq.0.
    Type: Grant
    Filed: November 20, 1996
    Date of Patent: November 3, 1998
    Assignee: NEC Corporation
    Inventors: Tadanori Shimoto, Yoshitsugu Funada, Koji Matsui, Yuzo Shimada, Kazuaki Utsumi
  • Patent number: 5712506
    Abstract: In a semiconductor device having a passivation layer, the passivation layer is made of benzocyclobutene polymer and silicon power.
    Type: Grant
    Filed: October 26, 1995
    Date of Patent: January 27, 1998
    Assignee: NEC Corporation
    Inventors: Tadanori Shimoto, Koji Matsui
  • Patent number: 5681648
    Abstract: The present invention provides a novel printed wiring board which has an insulating substrate. The printed wiring board also has a metal compound layer formed on a surface of the insulating substrate, wherein the metal compound layer is made of a metal compound having a sufficient insulating property and showing a reduction to a metal. The metal compound layer has a surface formed thereon with a metal wiring pattern which is formed by selective reduction of the above metal compound of the metal compound layer. The printed wiring board also has a palladium-displacement plating layer formed on the metal wiring pattern. The printed wiring board also has an electroless plating layer.
    Type: Grant
    Filed: January 30, 1996
    Date of Patent: October 28, 1997
    Assignee: NEC Corporation
    Inventors: Yoshitsugu Funada, Koji Matsui
  • Patent number: 5545281
    Abstract: An integrated circuit connecting method that includes connecting electrode pads on an integrated circuit device to electrode terminals on a base with metal bumps interposed, the electrode terminals being formed in registry with the electrode pads.
    Type: Grant
    Filed: March 25, 1994
    Date of Patent: August 13, 1996
    Assignees: NEC Corporation, Tokyo Ohka Kogyo Co., Ltd.
    Inventors: Koji Matsui, Mitsuru Kimura, Kazuaki Utsumi, Eiichi Ogawa, Hiroshi Komano, Toshimi Aoyama
  • Patent number: 5483101
    Abstract: A semiconductor package applicable to integrated circuits and other semiconductor devices of the kind needing high integration and high speed operation. The package has a printed circuit board implemented by a glass cloth impregnated with epoxy, bismaleimide-triazine (BT) or similar resin, a power source layer provided in the circuit board in a plate structure, a ground layer formed on the surface of the circuit board in a plate structure, and a thin film laminate wiring formed on the ground layer in a plate structure and consisting of copper and benzocyclobutene. The package desirably shields leakage currents and matches a characteristic impedance with accuracy, thereby noticeably reducing noise and enhancing high speed signal transmission.
    Type: Grant
    Filed: December 5, 1994
    Date of Patent: January 9, 1996
    Assignee: NEC Corporation
    Inventors: Tadanori Shimoto, Koji Matsui
  • Patent number: 5384952
    Abstract: A method of connecting an integrated circuit chip to a wiring substrate having a wiring pattern formed thereon. The method is intended to make a connection between fine connecting portions on the substrate and connecting pads on the chip easy and reliable. The connecting method includes connecting a plurality of connecting portions formed on a major surface of a wiring substrate to a plurality of connecting pads formed on a major surface of an integrated circuit chip through metal bumps and adhering portions of the major surface of the wiring substrate which have no connecting portions to portions of the major surface of the integrated circuit chip which have no connecting pads by means of a photothermosetting resin film selectively opened at the connecting portions.
    Type: Grant
    Filed: December 26, 1991
    Date of Patent: January 31, 1995
    Assignee: NEC Corporation
    Inventor: Koji Matsui
  • Patent number: 5372872
    Abstract: A multilayer printed circuit board reducing cross-talk noise between signal interconnection layers and between through-holes for connecting the signal interconnection layers is disclosed. The multilayer printed circuit board has printed substrates each formed thereon an interconnection layer, and prepreg sandwiched therebetween. The prepreg comprises an reinforcement lattice cloth formed of rovings of a electroconductive material maintained at a ground potential and a dielectric resin impregnated thereinto and forming a dielectric solid layer having through-holes penetrating therethrough. The electroconductive reinforcement lattice cloth functions as a ground layer between signal interconnection layers and between through-holes . The rovings may be of a metal or a semiconductive material such as carbon fiber. The multilayer printed circuit board is superior in heat resistance, dimensional stability and mechanical strength.
    Type: Grant
    Filed: November 29, 1993
    Date of Patent: December 13, 1994
    Assignee: NEC Corporation
    Inventors: Yoshitsugu Funada, Koji Matsui
  • Patent number: 5318651
    Abstract: A method of bonding first and second circuit boards includes applying a light-sensitive adhesive over the first electrodes on a first circuit board and the areas where the first electrodes are not formed, and drying the applied adhesive to form a light-sensitive adhesive layer having the light-sensitive adhesive layer exposed selectively to active rays of light and performing development to remove only the light-sensitive adhesive layer on the first electrodes, and then performing a heat treatment to impart bonding quality to the light-sensitive adhesive layer remaining between adjacent first electrodes, placing the first and second circuit boards one on top of the other and thermocompressing the two circuit boards to have the first electrodes connected electrically to the second electrodes to form a single circuit board; and performing a heat treatment and/or exposure to active rays of light on the formed single circuit board.
    Type: Grant
    Filed: November 19, 1992
    Date of Patent: June 7, 1994
    Assignees: Nec Corporation, Tokyo Ohka Kogyo Co., Ltd.
    Inventors: Koji Matsui, Mitsuru Kimura, Kazuaki Utsumi, Eiichi Ogawa, Hiroshi Komano, Toshimi Aoyama
  • Patent number: 5302456
    Abstract: An anisotropic conductive material includes micro-capsules dispersed in a bonding resin. The micro-capsules contains, as a filler material, a conductor and a polymerization initiator, a curing agent or a curing promotor. A wall member encapsulating the filler material is formed of a thermoplastic or thermosetting insulative resin. Therefore, if the micro-capsules in the anisotropic conductive material are broken or destroyed by pressure or both of pressure and heat, electrical connection can be established between electrode pads and electrode terminals of a wiring substrate through the conductors contained in the micro-capsules. Simultaneously, the polymerization initiator, the curing agent or the curing promotor flows out, so that the insulative bonding resin is solidified. Thus, the anisotropic conductive material has a high connection reliability, a good reproducibility, an excellent packaging workability, and excellent shelf stability.
    Type: Grant
    Filed: May 7, 1992
    Date of Patent: April 12, 1994
    Assignee: NEC Corporation
    Inventor: Koji Matsui
  • Patent number: 5287208
    Abstract: To improve yield in the liquid crystal display device manufacturing process, at least either of an interconnection protective film for protecting the conductive interconnection formed on the substrate to electrically connect the transparent electrode film in the liquid crystal cells to the liquid crystal cell driving semiconductor chip and a liquid crystal molecule aligning film formed within the liquid crystal cells are made of benzocyclobutene resin. The benzocyclobutene resin is polyorganosiloxane crosslinked bisbenzocyclobutene.
    Type: Grant
    Filed: February 21, 1992
    Date of Patent: February 15, 1994
    Assignee: NEC Corporation
    Inventors: Tadanori Shimoto, Koji Matsui
  • Patent number: 5000679
    Abstract: A burner for directly flaming steel making materials to accomplish reduction without oxidation, wherein the burner comprises a plurality of combusion air outlets spaced circumferentially of the inner wall of a tubular burner tile, and fuel gas outlets disposed centrally of the burner tile, and wherein the combustion air outlets and fuel gas outlets are formed and disposed with specified jetting angles and distances to produce burning without oxidation.
    Type: Grant
    Filed: February 27, 1989
    Date of Patent: March 19, 1991
    Assignee: Nippon Kokan Kabushiki Kaisha
    Inventors: Shuzo Fukuda, Masahiro Abe, Shiro Fukunaka, Michio Nakayama, Koichiro Arima, Shunichi Sugiyama, Koji Matsui
  • Patent number: 4993939
    Abstract: A burner for directly flaming steel making materials to accomplish reduction without oxidation, wherein the burner comprises a plurality of combustion air outlets spaced circumferentially of the inner wall of a tubular burner tile, and fuel gas outlets disposed centrally of the burner tile, and wherein the combustion air outlets and fuel gas outlets are formed and disposed with specified jetting angles and distances to produce buring without oxidation.
    Type: Grant
    Filed: February 27, 1989
    Date of Patent: February 19, 1991
    Assignee: Nippon Kokan Kabushiki Kaisha
    Inventors: Shuzo Fukuda, Masahiro Abe, Shiro Fukunaka, Michio Nakayama, Koichiro Arima, Shunichi Sugiyama, Koji Matsui
  • Patent number: 4971553
    Abstract: A burner for directly flaming steel making materials to accomplish reduction without oxidation, wherein the burner comprises a plurality of combustion air outlets spaced circumferentially of the inner wall of a tubular burner tile, and fuel gas outlets disposed centrally of the burner tile, and wherein the combustion air outlets and fuel gas outlets are formed and disposed with specified jetting angles and distances to produce burning without oxidation.
    Type: Grant
    Filed: February 27, 1989
    Date of Patent: November 20, 1990
    Assignee: Nippon Kokan Kabushiki Kaisha
    Inventors: Shuzo Fukuda, Masahiro Abe, Shiro Fukunaka, Michio Nakayama, Koichiro Arima, Shunichi Sugiyama, Koji Matsui
  • Patent number: 4971552
    Abstract: A burner for directly flaming steel making materials to accomplish reduction without oxidation, wherein the burner comprises a plurality of combustion air outlets spaced circumferentially of the inner wall of a tubular burner tile, and fuel gas outlets disposed centrally of the burner tile, and wherein the combustion air outlets and fuel gas outlets are formed and disposed with specified jetting angles and distances to produce burning without oxidation.
    Type: Grant
    Filed: February 27, 1989
    Date of Patent: November 20, 1990
    Assignee: Nippon Kokan Kabushiki Kaisha
    Inventors: Shuzo Fukuda, Masahiro Abe, Shiro Fukunaka, Michio Nakayama, Koichiro Arima, Shunichi Sugiyama, Koji Matsui
  • Patent number: 4971551
    Abstract: A burner for directly flaming steel making materials to accomplish reduction without oxidation, wherein the burner comprises a plurality of combustion air outlets spaced circumferentially of the inner wall of a tubular burner tile, and fuel gas outlets disposed centrally of the burner tile, and wherein the combustion air outlets and fuel gas outlets are formed and disposed with specified jetting angles and distances to produce burning without oxidation.
    Type: Grant
    Filed: February 27, 1989
    Date of Patent: November 20, 1990
    Assignee: Nippon Kokan Kabushiki Kaisha
    Inventors: Shuzo Fukuda, Masahiro Abe, Shiro Fukunaka, Michio Nakayama, Koichiro Arima, Shunichi Sugiyama, Koji Matsui
  • Patent number: 4969815
    Abstract: A burner for directly flaming steel making materials to accomplish reduction without oxidation, wherein the burner comprises a plurality of combustion air outlets spaced circumferentially of the inner wall of a tubular burner tile, and fuel gas outlets disposed centrally of the burner tile, and wherein the combustion air outlets and fuel gas outlets are formed and disposed with specified jetting angles and distances to produce burning without oxidation.
    Type: Grant
    Filed: February 27, 1989
    Date of Patent: November 13, 1990
    Assignee: Nippon Kokan Kabushiki Kaisha
    Inventors: Shuzo Fukuda, Masahiro Abe, Shiro Fukunaka, Michio Nakayama, Koichiro Arima, Shunichi Sugiyama, Koji Matsui
  • Patent number: 4614043
    Abstract: A measuring apparatus for determining dimensional data for use in designing a coupler which is manufactured to be fitted between the free ends of already assembled pipes in a pipe system is disclosed. A first joint on which a first arm is slidably supported is pivotally connected to one end of a rod adapted for gauging the distance between the points of bend in the coupler to be manufactured. A first joint on which a second arm is slidably supported is itself slidably mounted on the rod for movement therealong. With this arrangement, measurement of the angle defined by relative rotation of the rod about its axis to the arms is limited to one point, that is, at either of the joints. In addition, this apparatus permits easy installation on the site of measurement. The relative movement between the rod and the second arm and that between each arm and its associated attachment plate for engaging to the respective free end, are automatically measured by an electrical detection device.
    Type: Grant
    Filed: May 17, 1985
    Date of Patent: September 30, 1986
    Assignee: Osaka Shipbuilding Co., Ltd.
    Inventors: Ryuzo Nagano, Shinobu Arai, Koji Matsui
  • Patent number: 4475973
    Abstract: A method for easily providing a spiral type-fluid separation module by horizontally rotating a mandrel around its axis from which one or more layer arrangements consisting of a plurality of layer elements hang downward, and winding the layer arrangements about the mandrel without occurance of non-uniform shifting and wrinkles in the layer elements, while applying tension to at least one layer element by means of a tension system.
    Type: Grant
    Filed: September 15, 1982
    Date of Patent: October 9, 1984
    Assignee: Nitto Electric Industrial Company, Ltd.
    Inventors: Toshiaki Tanaka, Ichiro Kawata, Keisuke Nakagome, Koji Matsui