Patents by Inventor Koji Soejima
Koji Soejima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12054910Abstract: A work vehicle includes a vehicle body frame, an engine hood, a first extendable member, and a second extendable member. The vehicle body frame is configured to support an engine. The engine hood has a cover frame coupled to the vehicle body frame so as to allow opening and closing, and an engine cover attached to the cover frame. The first extendable member is coupled to the vehicle body frame and the cover frame. The first extendable member is disposed at one end side relative to a center in a vehicle width direction of the work vehicle. The second extendable member is coupled to the vehicle body frame and the cover frame. The second extendable member is disposed at an other end side relative to the center in the vehicle width direction of the work vehicle.Type: GrantFiled: March 24, 2020Date of Patent: August 6, 2024Assignee: KOMATSU LTD.Inventor: Koji Soejima
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Publication number: 20220098824Abstract: A work vehicle includes a vehicle body frame, an engine hood, a first extendable member, and a second extendable member. The vehicle body frame is configured to support an engine. The engine hood has a cover frame coupled to the vehicle body frame so as to allow opening and closing, and an engine cover attached to the cover frame. The first extendable member is coupled to the vehicle body frame and the cover frame. The first extendable member is disposed at one end side relative to a center in a vehicle width direction of the work vehicle. The second extendable member is coupled to the vehicle body frame and the cover frame. The second extendable member is disposed at an other end side relative to the center in the vehicle width direction of the work vehicle.Type: ApplicationFiled: March 24, 2020Publication date: March 31, 2022Inventor: Koji SOEJIMA
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Patent number: 10879227Abstract: In a conventional electronic device and a method of manufacturing the same, reduction in cost of the electronic device is hindered because resin used in an interconnect layer on the solder ball side is limited. The electronic device includes an interconnect layer (a first interconnect layer) and an interconnect layer (a second interconnect layer). The second interconnect layer is formed on the undersurface of the first interconnect layer. The second interconnect layer is larger in area seen from the top than the first interconnect layer and is extended to the outside from the first interconnect layer.Type: GrantFiled: December 10, 2019Date of Patent: December 29, 2020Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Yoichiro Kurita, Masaya Kawano, Koji Soejima
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Publication number: 20200118994Abstract: In a conventional electronic device and a method of manufacturing the same, reduction in cost of the electronic device is hindered because resin used in an interconnect layer on the solder ball side is limited. The electronic device includes an interconnect layer (a first interconnect layer) and an interconnect layer (a second interconnect layer). The second interconnect layer is formed on the undersurface of the first interconnect layer. The second interconnect layer is larger in area seen from the top than the first interconnect layer and is extended to the outside from the first interconnect layer.Type: ApplicationFiled: December 10, 2019Publication date: April 16, 2020Inventors: Yoichiro KURITA, Masaya KAWANO, Koji SOEJIMA
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Patent number: 10580763Abstract: In a conventional electronic device and a method of manufacturing the same, reduction in cost of the electronic device is hindered because resin used in an interconnect layer on the solder ball side is limited. The electronic device includes an interconnect layer (a first interconnect layer) and an interconnect layer (a second interconnect layer). The second interconnect layer is formed on the undersurface of the first interconnect layer. The second interconnect layer is larger in area seen from the top than the first interconnect layer and is extended to the outside from the first interconnect layer.Type: GrantFiled: January 3, 2019Date of Patent: March 3, 2020Assignee: Renesas Electronics CorporationInventors: Yoichiro Kurita, Masaya Kawano, Koji Soejima
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Publication number: 20190139953Abstract: In a conventional electronic device and a method of manufacturing the same, reduction in cost of the electronic device is hindered because resin used in an interconnect layer on the solder ball side is limited. The electronic device includes an interconnect layer (a first interconnect layer) and an interconnect layer (a second interconnect layer). The second interconnect layer is formed on the undersurface of the first interconnect layer. The second interconnect layer is larger in area seen from the top than the first interconnect layer and is extended to the outside from the first interconnect layer.Type: ApplicationFiled: January 3, 2019Publication date: May 9, 2019Inventors: Yoichiro KURITA, Masaya KAWANO, Koji SOEJIMA
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Patent number: 10224318Abstract: In a conventional electronic device and a method of manufacturing the same, reduction in cost of the electronic device is hindered because resin used in an interconnect layer on the solder ball side is limited. The electronic device includes an interconnect layer (a first interconnect layer) and an interconnect layer (a second interconnect layer). The second interconnect layer is formed on the undersurface of the first interconnect layer. The second interconnect layer is larger in area seen from the top than the first interconnect layer and is extended to the outside from the first interconnect layer.Type: GrantFiled: September 25, 2017Date of Patent: March 5, 2019Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Yoichiro Kurita, Masaya Kawano, Koji Soejima
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Publication number: 20180019237Abstract: In a conventional electronic device and a method of manufacturing the same, reduction in cost of the electronic device is hindered because resin used in an interconnect layer on the solder ball side is limited. The electronic device includes an interconnect layer (a first interconnect layer) and an interconnect layer (a second interconnect layer). The second interconnect layer is formed on the undersurface of the first interconnect layer. The second interconnect layer is larger in area seen from the top than the first interconnect layer and is extended to the outside from the first interconnect layer.Type: ApplicationFiled: September 25, 2017Publication date: January 18, 2018Inventors: Yoichiro KURITA, Masaya KAWANO, Koji SOEJIMA
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Patent number: 9863122Abstract: A cooling device includes: an introduction pipe configured to introduce a charge air supercharged by a supercharger; a first aftercooler connected to the introduction pipe and configured to cool the charge air; a branch pipe branched from the introduction pipe; a second aftercooler connected to the branch pipe and configured to cool the charge air; and a cooling fan configured to supply a cooling wind to the first aftercooler and the second aftercooler, in which the first aftercooler and the second aftercooler are disposed to be shifted from each other in a rotation axis direction of the cooling fan.Type: GrantFiled: March 31, 2016Date of Patent: January 9, 2018Assignee: Komatsu Ltd.Inventors: Koji Soejima, Yushi Tanaka, Yuuki Ishikawa
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Patent number: 9847325Abstract: In a conventional electronic device and a method of manufacturing the same, reduction in cost of the electronic device is hindered because resin used in an interconnect layer on the solder ball side is limited. The electronic device includes an interconnect layer (a first interconnect layer) and an interconnect layer (a second interconnect layer). The second interconnect layer is formed on the undersurface of the first interconnect layer. The second interconnect layer is larger in area seen from the top than the first interconnect layer and is extended to the outside from the first interconnect layer.Type: GrantFiled: November 17, 2016Date of Patent: December 19, 2017Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Yoichiro Kurita, Masaya Kawano, Koji Soejima
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Publication number: 20170284058Abstract: A cooling device includes: an introduction pipe configured to introduce a charge air supercharged by a supercharger; a first aftercooler connected to the introduction pipe and configured to cool the charge air; a branch pipe branched from the introduction pipe; a second aftercooler connected to the branch pipe and configured to cool the charge air; and a cooling fan configured to supply a cooling wind to the first aftercooler and the second aftercooler, in which the first aftercooler and the second aftercooler are disposed to be shifted from each other in a rotation axis direction of the cooling fan.Type: ApplicationFiled: March 31, 2016Publication date: October 5, 2017Inventors: Koji Soejima, Yushi Tanaka, Yuuki Ishikawa
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Publication number: 20170236810Abstract: In a conventional electronic device and a method of manufacturing the same, reduction in cost of the electronic device is hindered because resin used in an interconnect layer on the solder ball side is limited. The electronic device includes an interconnect layer (a first interconnect layer) and an interconnect layer (a second interconnect layer). The second interconnect layer is formed on the undersurface of the first interconnect layer. The second interconnect layer is larger in area seen from the top than the first interconnect layer and is extended to the outside from the first interconnect layer.Type: ApplicationFiled: November 17, 2016Publication date: August 17, 2017Inventors: Yoichiro KURITA, Masaya KAWANO, Koji SOEJIMA
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Patent number: 9524953Abstract: In a conventional electronic device and a method of manufacturing the same, reduction in cost of the electronic device is hindered because resin used in an interconnect layer on the solder ball side is limited. The electronic device includes an interconnect layer (a first interconnect layer) and an interconnect layer (a second interconnect layer). The second interconnect layer is formed on the undersurface of the first interconnect layer. The second interconnect layer is larger in area seen from the top than the first interconnect layer and is extended to the outside from the first interconnect layer.Type: GrantFiled: June 24, 2016Date of Patent: December 20, 2016Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Yoichiro Kurita, Masaya Kawano, Koji Soejima
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Publication number: 20160307875Abstract: In a conventional electronic device and a method of manufacturing the same, reduction in cost of the electronic device is hindered because resin used in an interconnect layer on the solder ball side is limited. The electronic device includes an interconnect layer (a first interconnect layer) and an interconnect layer (a second interconnect layer). The second interconnect layer is formed on the undersurface of the first interconnect layer. The second interconnect layer is larger in area seen from the top than the first interconnect layer and is extended to the outside from the first interconnect layer.Type: ApplicationFiled: June 24, 2016Publication date: October 20, 2016Inventors: Yoichiro KURITA, Masaya KAWANO, Koji SOEJIMA
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Patent number: 9406602Abstract: In a conventional electronic device and a method of manufacturing the same, reduction in cost of the electronic device is hindered because resin used in an interconnect layer on the solder ball side is limited. The electronic device includes an interconnect layer (a first interconnect layer) and an interconnect layer (a second interconnect layer). The second interconnect layer is formed on the undersurface of the first interconnect layer. The second interconnect layer is larger in area seen from the top than the first interconnect layer and is extended to the outside from the first interconnect layer.Type: GrantFiled: January 27, 2015Date of Patent: August 2, 2016Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Yoichiro Kurita, Masaya Kawano, Koji Soejima
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Publication number: 20150137348Abstract: In a conventional electronic device and a method of manufacturing the same, reduction in cost of the electronic device is hindered because resin used in an interconnect layer on the solder ball side is limited. The electronic device includes an interconnect layer (a first interconnect layer) and an interconnect layer (a second interconnect layer). The second interconnect layer is formed on the undersurface of the first interconnect layer. The second interconnect layer is larger in area seen from the top than the first interconnect layer and is extended to the outside from the first interconnect layer.Type: ApplicationFiled: January 27, 2015Publication date: May 21, 2015Inventors: Yoichiro KURITA, Masaya KAWANO, Koji SOEJIMA
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Patent number: 8975750Abstract: In a conventional electronic device and a method of manufacturing the same, reduction in cost of the electronic device is hindered because resin used in an interconnect layer on the solder ball side is limited. The electronic device includes an interconnect layer (a first interconnect layer) and an interconnect layer (a second interconnect layer). The second interconnect layer is formed on the undersurface of the first interconnect layer. The second interconnect layer is larger in area seen from the top than the first interconnect layer and is extended to the outside from the first interconnect layer.Type: GrantFiled: August 8, 2014Date of Patent: March 10, 2015Assignee: Renesas Electronics CorporationInventors: Yoichiro Kurita, Masaya Kawano, Koji Soejima
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Publication number: 20140346681Abstract: In a conventional electronic device and a method of manufacturing the same, reduction in cost of the electronic device is hindered because resin used in an interconnect layer on the solder ball side is limited. The electronic device includes an interconnect layer (a first interconnect layer) and an interconnect layer (a second interconnect layer). The second interconnect layer is formed on the undersurface of the first interconnect layer. The second interconnect layer is larger in area seen from the top than the first interconnect layer and is extended to the outside from the first interconnect layer.Type: ApplicationFiled: August 8, 2014Publication date: November 27, 2014Inventors: Yoichiro KURITA, Masaya KAWANO, Koji SOEJIMA
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Patent number: 8823174Abstract: In a conventional electronic device and a method of manufacturing the same, reduction in cost of the electronic device is hindered because resin used in an interconnect layer on the solder ball side is limited. The electronic device includes an interconnect layer (a first interconnect layer) and an interconnect layer (a second interconnect layer). The second interconnect layer is formed on the undersurface of the first interconnect layer. The second interconnect layer is larger in area seen from the top than the first interconnect layer and is extended to the outside from the first interconnect layer.Type: GrantFiled: December 17, 2013Date of Patent: September 2, 2014Assignee: Renesas Electronics CorporationInventors: Yoichiro Kurita, Masaya Kawano, Koji Soejima
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Publication number: 20140103524Abstract: In a conventional electronic device and a method of manufacturing the same, reduction in cost of the electronic device is hindered because resin used in an interconnect layer on the solder ball side is limited. The electronic device includes an interconnect layer (a first interconnect layer) and an interconnect layer (a second interconnect layer). The second interconnect layer is formed on the undersurface of the first interconnect layer. The second interconnect layer is larger in area seen from the top than the first interconnect layer and is extended to the outside from the first interconnect layer.Type: ApplicationFiled: December 17, 2013Publication date: April 17, 2014Applicant: Renesas Electronics CorporationInventors: Yoichiro KURITA, Masaya KAWANO, Koji SOEJIMA