Patents by Inventor Kosei Noda
Kosei Noda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190221670Abstract: To provide a highly reliable semiconductor device that is suitable for miniaturization and higher density. A semiconductor device includes a first electrode including a protruding portion, a first insulator over the protruding portion, a second insulator covering the first electrode and the first insulator, and a second electrode over the second insulator. The second electrode includes a first region which overlaps with the first electrode with the first insulator and the second insulator provided therebetween and a second region which overlaps with the first electrode with the second insulator provided therebetween. The peripheral portion of the second electrode is provided in the first region.Type: ApplicationFiled: March 28, 2019Publication date: July 18, 2019Inventor: Kosei Noda
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Patent number: 10319744Abstract: An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×1019 atoms/cm3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained.Type: GrantFiled: September 18, 2018Date of Patent: June 11, 2019Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Atsushi Hirose, Masashi Tsubuku, Kosei Noda
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Patent number: 10319955Abstract: A power storage device with high capacity per unit volume, a flexible power storage device with a novel structure, a repeatedly bendable power storage device, a highly reliable power storage device, or a long-life power storage device is provided. The power storage device includes an inner structure and an exterior body surrounding the inner structure. The inner structure includes a positive electrode and a negative electrode. The exterior body includes a first film containing titanium and one or more elements selected from niobium, tantalum, vanadium, zirconium, and hafnium. It is preferable that the first film further contain one or more elements selected from molybdenum, chromium, and aluminum.Type: GrantFiled: June 8, 2016Date of Patent: June 11, 2019Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Kosei Noda
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Patent number: 10310348Abstract: A liquid crystal display device includes: a driver circuit portion; a pixel portion; a signal generation circuit for generating a control signal for driving the driver circuit portion and an image signal which is supplied to the pixel portion; a memory circuit; a comparison circuit for detecting a difference of image signals for a series of frame periods among image signals stored for respective frame periods in the memory circuit; a selection circuit which selects and outputs the image signals for the series of frame periods when the difference is detected in the comparison circuit; and a display control circuit which supplies the control signal and the image signals output from the selection circuit, to the driver circuit portion when the difference is detected in the comparison circuit, and stops supplying the control signal to the driver circuit portion when the difference is not detected in the comparison circuit.Type: GrantFiled: August 23, 2018Date of Patent: June 4, 2019Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Hiroyuki Miyake, Masashi Tsubuku, Kosei Noda
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Publication number: 20190115455Abstract: A semiconductor device is manufactured using a transistor in which an oxide semiconductor is included in a channel region and variation in electric characteristics due to a short-channel effect is less likely to be caused. The semiconductor device includes an oxide semiconductor film having a pair of oxynitride semiconductor regions including nitrogen and an oxide semiconductor region sandwiched between the pair of oxynitride semiconductor regions, a gate insulating film, and a gate electrode provided over the oxide semiconductor region with the gate insulating film positioned therebetween. Here, the pair of oxynitride semiconductor regions serves as a source region and a drain region of the transistor, and the oxide semiconductor region serves as the channel region of the transistor.Type: ApplicationFiled: December 4, 2018Publication date: April 18, 2019Inventors: Yuta ENDO, Toshinari SASAKI, Kosei NODA
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Patent number: 10249765Abstract: To provide a highly reliable semiconductor device that is suitable for miniaturization and higher density. A semiconductor device includes a first electrode including a protruding portion, a first insulator over the protruding portion, a second insulator covering the first electrode and the first insulator, and a second electrode over the second insulator. The second electrode includes a first region which overlaps with the first electrode with the first insulator and the second insulator provided therebetween and a second region which overlaps with the first electrode with the second insulator provided therebetween. The peripheral portion of the second electrode is provided in the first region.Type: GrantFiled: November 16, 2015Date of Patent: April 2, 2019Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Kosei Noda
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Publication number: 20190088785Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel formation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor. With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.Type: ApplicationFiled: September 5, 2018Publication date: March 21, 2019Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Hiroyuki MIYAKE, Kei TAKAHASHI, Kouhei TOYOTAKA, Masashi TSUBUKU, Kosei NODA, Hideaki KUWABARA
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Patent number: 10229936Abstract: An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.Type: GrantFiled: October 6, 2017Date of Patent: March 12, 2019Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hiroki Ohara, Toshinari Sasaki, Kosei Noda, Hideaki Kuwabara
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Patent number: 10211344Abstract: A logic circuit includes a thin film transistor having a channel formation region formed using an oxide semiconductor, and a capacitor having terminals one of which is brought into a floating state by turning off the thin film transistor. The oxide semiconductor has a hydrogen concentration of 5×1019 (atoms/cm3) or less and thus substantially serves as an insulator in a state where an electric field is not generated. Therefore, off-state current of a thin film transistor can be reduced, leading to suppressing the leakage of electric charge stored in a capacitor, through the thin film transistor. Accordingly, a malfunction of the logic circuit can be prevented. Further, the excessive amount of current which flows in the logic circuit can be reduced through the reduction of off-state current of the thin film transistor, resulting in low power consumption of the logic circuit.Type: GrantFiled: March 18, 2013Date of Patent: February 19, 2019Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Masashi Tsubuku, Kosei Noda
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Publication number: 20190035819Abstract: An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×1019 atoms/cm3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained.Type: ApplicationFiled: September 18, 2018Publication date: January 31, 2019Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Atsushi HIROSE, Masashi TSUBUKU, Kosei NODA
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Patent number: 10192997Abstract: A highly reliable semiconductor device having stable electric characteristics is provided by suppressing, in a transistor including an oxide semiconductor film, diffusion of indium into an insulating film in contact with the oxide semiconductor film and improving the characteristics of the interface between the oxide semiconductor film and the insulating film. In an oxide semiconductor film containing indium, the indium concentration at a surface is decreased, thereby preventing diffusion of indium into an insulating film on and in contact with the oxide semiconductor film. By decreasing the indium concentration at the surface of the oxide semiconductor film, a layer which does not substantially contain indium can be formed at the surface. By using this layer as part of the insulating film, the characteristics of the interface between the oxide semiconductor film and the insulating film in contact with the oxide semiconductor film are improved.Type: GrantFiled: January 25, 2018Date of Patent: January 29, 2019Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kosei Noda, Noriyoshi Suzuki
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Patent number: 10186603Abstract: It is an object to provide a semiconductor device including an oxide semiconductor, which has stable electric characteristics and high reliability. An oxide semiconductor film serving as a channel formation region of a transistor is formed by a sputtering method at a temperature higher than 200° C., so that the number of water molecules eliminated from the oxide semiconductor film can be 0.5/nm3 or less according to thermal desorption spectroscopy. A substance including a hydrogen atom such as hydrogen, water, a hydroxyl group, or hydride which causes variation in the electric characteristics of a transistor including an oxide semiconductor is prevented from entering the oxide semiconductor film, whereby the oxide semiconductor film can be highly purified and made to be an electrically i-type (intrinsic) semiconductor.Type: GrantFiled: August 9, 2016Date of Patent: January 22, 2019Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toshinari Sasaki, Kosei Noda
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Patent number: 10170598Abstract: An object is to provide a semiconductor device including an oxynitride semiconductor whose carrier density is controlled. By introducing controlled nitrogen into an oxide semiconductor layer, a transistor in which an oxynitride semiconductor having desired carrier density and on characteristics is used for a channel can be manufactured. Further, with the use of the oxynitride semiconductor, even when a low resistance layer or the like is not provided between an oxynitride semiconductor layer and a source electrode and between the oxynitride semiconductor layer and a drain electrode, favorable contact characteristics can be exhibited.Type: GrantFiled: March 1, 2016Date of Patent: January 1, 2019Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yuta Endo, Toshinari Sasaki, Kosei Noda
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Publication number: 20180364510Abstract: A liquid crystal display device includes: a driver circuit portion; a pixel portion; a signal generation circuit for generating a control signal for driving the driver circuit portion and an image signal which is supplied to the pixel portion; a memory circuit; a comparison circuit for detecting a difference of image signals for a series of frame periods among image signals stored for respective frame periods in the memory circuit; a selection circuit which selects and outputs the image signals for the series of frame periods when the difference is detected in the comparison circuit; and a display control circuit which supplies the control signal and the image signals output from the selection circuit, to the driver circuit portion when the difference is detected in the comparison circuit, and stops supplying the control signal to the driver circuit portion when the difference is not detected in the comparison circuit.Type: ApplicationFiled: August 23, 2018Publication date: December 20, 2018Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Hiroyuki MIYAKE, Masashi TSUBUKU, Kosei NODA
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Patent number: 10153360Abstract: A semiconductor device is manufactured using a transistor in which an oxide semiconductor is included in a channel region and variation in electric characteristics due to a short-channel effect is less likely to be caused. The semiconductor device includes an oxide semiconductor film having a pair of oxynitride semiconductor regions including nitrogen and an oxide semiconductor region sandwiched between the pair of oxynitride semiconductor regions, a gate insulating film, and a gate electrode provided over the oxide semiconductor region with the gate insulating film positioned therebetween. Here, the pair of oxynitride semiconductor regions serves as a source region and a drain region of the transistor, and the oxide semiconductor region serves as the channel region of the transistor.Type: GrantFiled: May 2, 2017Date of Patent: December 11, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yuta Endo, Toshinari Sasaki, Kosei Noda
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Patent number: 10115743Abstract: An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×1019 atoms/cm3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained.Type: GrantFiled: July 18, 2017Date of Patent: October 30, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Atsushi Hirose, Masashi Tsubuku, Kosei Noda
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Publication number: 20180301476Abstract: To reduce a leakage current of a transistor so that malfunction of a logic circuit can be suppressed. The logic circuit includes a transistor which includes an oxide semiconductor layer having a function of a channel formation layer and in which an off current is 1×10?13A or less per micrometer in channel width. A first signal, a second signal, and a third signal that is a clock signal are input as input signals. A fourth signal and a fifth signal whose voltage states are set in accordance with the first to third signals which have been input are output as output signals.Type: ApplicationFiled: June 14, 2018Publication date: October 18, 2018Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Masashi TSUBUKU, Kosei NODA
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Patent number: 10103275Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit included in an LSI, a CPU, or a memory is manufactured using the transistor which is formed using an oxide semiconductor which is an intrinsic or substantially intrinsic semiconductor obtained by removal of impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than a silicon semiconductor, and is formed over a semiconductor substrate. With the transistor which is formed over the semiconductor substrate and includes the highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device whose power consumption due to leakage current is low can be realized.Type: GrantFiled: May 31, 2017Date of Patent: October 16, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Hiroyuki Miyake, Kei Takahashi, Kouhei Toyotaka, Masashi Tsubuku, Kosei Noda, Hideaki Kuwabara
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Patent number: 10084048Abstract: A semiconductor device with favorable electrical characteristics is provided. Alternatively, a semiconductor device with a high on-state current is provided. Alternatively, a semiconductor device that is suitable for miniaturization is provided. A semiconductor device includes an oxide semiconductor, an insulating film, a gate insulating film, and a gate electrode. The oxide semiconductor includes a first portion and a second portion over the first portion. The insulating film includes a region in contact with a side surface of the first portion. The gate electrode includes a region that covers the second portion with the gate insulating film provided therebetween.Type: GrantFiled: May 5, 2015Date of Patent: September 25, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Kosei Noda
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Patent number: 10079312Abstract: A metal element of a metal film is introduced into the oxide semiconductor film by performing heat treatment in the state where the oxide semiconductor film is in contact with the metal film, so that a low-resistance region having resistance lower than that of a channel formation region is formed. A region of the metal film, which is in contact with the oxide semiconductor film, becomes a metal oxide insulating film by the heat treatment. After that, an unnecessary metal film is removed. Thus, the metal oxide insulating film can be formed over the low-resistance region.Type: GrantFiled: April 25, 2017Date of Patent: September 18, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yukie Suzuki, Kosei Noda, Yoshiaki Oikawa