Patents by Inventor Kotaro Mizuno

Kotaro Mizuno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220139630
    Abstract: A ceramic electronic device includes a multilayer chip in which a plurality of dielectric layers of which a main component is ceramic and a plurality of internal electrode layers are stacked. The plurality of internal electrode layers include Ni, Sn and Au.
    Type: Application
    Filed: July 9, 2021
    Publication date: May 5, 2022
    Inventors: Kazuki YAMADA, Kotaro MIZUNO, Yoichi KATO, Hidetoshi MASUDA
  • Patent number: 11239031
    Abstract: A multilayer ceramic capacitor includes: a multilayer structure in which each of dielectric layers and each of internal electrode layers are alternately stacked, a main component of the dielectric layers being ceramic, wherein: the multilayer structure comprises surface portions and a center portion in a stacking direction of the dielectric layers and the internal electrode layers, the surface portions having a first thickness from a surface of the multilayer structure, the center portion being next to the surface portion in the stacking direction and having a second thickness; and an average length of crystal grains of a main component metal of the internal electrode layers of the surface portions is 0.8 times or less than an average length of crystal grains of a main component metal of the internal electrode layers of the center portion.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: February 1, 2022
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Kotaro Mizuno
  • Publication number: 20210233711
    Abstract: A multilayer ceramic capacitor includes an element body of roughly rectangular solid shape which is constituted by dielectric layers alternately stacked with internal electrode layers having different polarities, with a pair of cover layers formed on it to cover the top and bottom faces in the direction of lamination of the foregoing, and which has a pair of principal faces, a pair of end faces, and a pair of side faces, wherein external electrodes are formed on the pair of end faces and at least one of the pair of principal faces of the element body, and Tt representing the thickness of the external electrode and Tc representing the thickness of the cover layer satisfy the relationship of 1/30?Tt/Tc?4/5, and the thickness of the cover layers, or Tc, is 10 ?m or more but 30 ?m or less.
    Type: Application
    Filed: April 9, 2021
    Publication date: July 29, 2021
    Inventors: Shohei KITAMURA, Yukihiro KONISHI, Kotaro MIZUNO, Yoichi KATO, Yusuke KOWASE, Toru MAKINO, Yoshinori TANAKA
  • Publication number: 20210202986
    Abstract: An all solid battery includes a multilayer chip in which each of a plurality of solid electrolyte layers including solid electrolyte and each of a plurality of internal electrodes including an electrode active material are alternately stacked, the multilayer chip having a rectangular parallelepiped shape, the plurality of internal electrodes being alternately exposed to two side faces of the multilayer chip other than two end faces of a stacking direction of the multilayer chip, and a pair of external electrodes that contacts the two side faces. At least one of the pair of external electrodes includes an electrode active material of which a pole is a same as that of an electrode active material of the internal electrode which contacts the one of the pair of external electrodes.
    Type: Application
    Filed: December 2, 2020
    Publication date: July 1, 2021
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Daigo ITO, Kotaro MIZUNO
  • Publication number: 20210203005
    Abstract: An all solid battery includes a multilayer chip in which each of a plurality of solid electrolyte layers including solid electrolyte and each of a plurality of internal electrodes including an electrode active material are alternately stacked, the multilayer chip having a rectangular parallelepiped shape, the plurality of internal electrodes being alternately exposed to two side faces of the multilayer chip other than two end faces of a stacking direction of the multilayer chip, and a pair of external electrodes that contacts the two side faces and include solid electrolyte.
    Type: Application
    Filed: December 1, 2020
    Publication date: July 1, 2021
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Daigo ITO, Kotaro MIZUNO
  • Publication number: 20210203004
    Abstract: An all solid battery includes a solid electrolyte layer, a first electrode structure that has a structure in which a first electric collector layer of which a main component is a conductive material is sandwiched by two first electrode layers including an active material, and a second electrode structure that has a structure in which a second electric collector layer of which a main component is a conductive material is sandwiched by two second electrode layers including an active material. Roughness of interfaces between the first electric collector layer and the two first electrode layers and/or roughness of interfaces between the second electric collector layer and the two second electrode layers is larger than roughness of interfaces between the solid electrolyte layer, and the first electrode layer and the second electrode layer sandwiching the solid electrolyte layer.
    Type: Application
    Filed: November 19, 2020
    Publication date: July 1, 2021
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Chie KAWAMURA, Kotaro MIZUNO
  • Patent number: 11049652
    Abstract: A multi-layer ceramic capacitor includes: a ceramic body including a multi-layer chip and a side margin, the multi-layer chip including a capacitance forming unit including internal electrodes laminated in a first direction, positions of end portions of the internal electrodes in a second direction orthogonal to the first direction being aligned with one another within a range of 0.5 ?m, and a cover covering the capacitance forming unit in the first direction, the side margin covering the multi-layer chip in the second direction, the ceramic body having a main surface facing in the first direction, a side surface facing in the second direction, an end surface facing in a third direction orthogonal to the above directions, and a corner portion connecting those surfaces; and an external electrode covering the end surface and the corner portion, the corner portion having a surface roughness of 30 nm or more.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: June 29, 2021
    Assignee: Taiyo Yuden Co., Ltd.
    Inventor: Kotaro Mizuno
  • Patent number: 11017949
    Abstract: A multi-layer ceramic capacitor according to an embodiment of the present invention includes a multi-layer, side margins and offset sections. The multi-layer includes internal electrodes and dielectric layers alternately laminated. The side margins are configured of a dielectric and disposed to cover side faces of the multi-layer. The offset sections are made with amorphous areas or gap areas. The offset sections are formed between the internal electrodes and the side margins such that ends at side faces of the internal electrodes are offset from the side faces to an inward direction of the multi-layer.
    Type: Grant
    Filed: May 27, 2016
    Date of Patent: May 25, 2021
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Yoichi Kato, Kotaro Mizuno, Yukihiro Konishi, Yasunari Kato, Yosuke Sato, Hidenori Wakayanagi, Joji Kobayashi, Toshimitsu Kogure
  • Patent number: 11004607
    Abstract: A method for manufacturing a multilayer ceramic capacitor includes: producing a plurality of dielectric green sheets; producing therefrom a plurality of internal electrode-printed green sheets; producing therefrom a plurality of individually cut unsintered laminates by stacking some of the plurality of dielectric green sheets, as cover layers, and the plurality of internal electrode-printed green sheets together; producing therefrom element body precursors by applying a ceramic paste to side faces of the unsintered laminates for forming side margins thereon, wherein an application thickness of the ceramic paste is adjusted in a manner such that a thickness of the side margins is greater than a thickness of the cover layers in the final product; producing therefrom element bodies by sintering; and forming external electrodes on at least one of principal faces and on both end faces of the element bodies.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: May 11, 2021
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Shohei Kitamura, Yukihiro Konishi, Kotaro Mizuno, Yoichi Kato, Yusuke Kowase, Toru Makino, Yoshinori Tanaka
  • Patent number: 10971307
    Abstract: A multi-layer ceramic capacitor includes a multi-layer unit, a side margin, and a bonding unit. The multi-layer unit includes ceramic layers that are laminated in a first direction, and internal electrodes that are disposed between the ceramic layers and include a base metal material as a main component. The side margin includes ceramics as a main component and covers the multi-layer unit from a second direction orthogonal to the first direction. The bonding unit is disposed between the multi-layer unit and the side margin, the bonding unit having a maximum dimension in the first direction and being made of an oxide including the base metal material, the maximum dimension being equal to or larger than 50% of an average dimension of the ceramic layers in the first direction.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: April 6, 2021
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Kotaro Mizuno
  • Patent number: 10903008
    Abstract: A multi-layer ceramic electronic component includes a multi-layer unit and a side margin. The multi-layer unit includes a capacitance forming unit, a cover, and a side surface. The capacitance forming unit includes ceramic layers that are laminated in a first direction and contain boron, and internal electrodes disposed between the ceramic layers. The cover covers the capacitance forming unit in the first direction. The side surface faces in a second direction orthogonal to the first direction. The side margin covers the side surface in the second direction and has a lower boron concentration than a boron concentration of the ceramic layers.
    Type: Grant
    Filed: February 7, 2019
    Date of Patent: January 26, 2021
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Daisuke Sakate, Kotaro Mizuno
  • Publication number: 20200403274
    Abstract: An all solid battery includes: a solid electrolyte layer of which a main component is oxide-based solid electrolyte; a first electrode layer that is provided on a first main face of the solid electrolyte layer and includes an active material; and a second electrode layer that is provided on a second main face of the solid electrolyte layer and includes an active material, wherein at least one of the first electrode layer and the second electrode layer includes an aggregate of carbon particles and a cavity, wherein the aggregate demarcates at least a part of the cavity.
    Type: Application
    Filed: June 11, 2020
    Publication date: December 24, 2020
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Sachie TOMIZAWA, Daigo ITO, Chie KAWAMURA, Kotaro MIZUNO
  • Publication number: 20200365328
    Abstract: A multi-layer ceramic electronic component includes: a ceramic body including a multi-layer unit having a side surface facing in a direction of a first axis and including internal electrodes laminated in a direction of a second axis orthogonal to the first axis and having end portions on the side surface, and a side margin including a first inner layer adjacent to the side surface and including a first region containing a glass component, a first outer layer outside of the first inner layer, and a ridge positioned at an end portion of the first outer layer in the direction of the second axis and including a second region containing a glass component at a lower concentration than a concentration of the glass component of the first region, the side margin having a dimension of 13 ?m or less in the direction of the first axis; and an external electrode.
    Type: Application
    Filed: May 1, 2020
    Publication date: November 19, 2020
    Inventor: Kotaro MIZUNO
  • Publication number: 20200335280
    Abstract: A ceramic electronic device includes: a multilayer chip having a structure in which each of dielectric layers and each of internal electrode layers are alternately stacked; and external electrodes provided on end faces of the multilayer chip, wherein a main component of the external electrodes is a first metal, wherein the internal electrode layers include the first metal and a second metal of which a melting point is higher than that of the first metal, wherein a diffusion coefficient of the first metal with respect to the second metal is larger than that of the second metal with respect to the first metal, wherein a number of a cavity in a range of 10 numbers of the internal electrode layers that are next to each other and are connected to a same external electrode of the first external electrode and the second external electrode is 1 or less.
    Type: Application
    Filed: April 17, 2020
    Publication date: October 22, 2020
    Inventors: Takehiro TANAKA, Kotaro MIZUNO, Yusuke KOWASE
  • Patent number: 10770231
    Abstract: In an embodiment, a multilayer ceramic capacitor 10 includes external electrodes 12 on both of first-direction ends of a capacitor body 11. Also, groups of metal grains 13 are provided on one third-direction face and another third-direction face of the capacitor body 11. Both of the first-direction ends of the groups of metal grains 13 provided on the other third-direction face of the capacitor body 11 are covered by second parts 12c of the respective external electrodes 12, while both of the first-direction ends of the groups of metal grains 13 provided on the one third-direction face of the capacitor body 11 are covered by first parts 12b of the respective external electrodes 12. The multilayer ceramic electronic component can offer excellent heat dissipation property.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: September 8, 2020
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Shohei Kitamura, Toru Makino, Kotaro Mizuno
  • Patent number: 10734160
    Abstract: In an embodiment, a multilayer ceramic capacitor 10 has a capacitor body 11 having a first face f1 and a second face f2 in a length direction, a third face f3 and a fourth face f4 in a width direction, a fifth face f5 and a sixth face f6 in a height direction, and a first tapering face f5a between face f1 and face f5 and a second tapering face f5b between face f2 and face 5f; a first external electrode 12 that has a first part 12a along face f1, a second part 12b along face f5, and continuously a third part 12c along face f5a; and a second external electrode 13 that has a first part 13a along face f2, a second part 13b along face f5, and continuously a third part 13c along face f5b.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: August 4, 2020
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Kotaro Mizuno
  • Publication number: 20200111617
    Abstract: A multi-layer ceramic capacitor includes a multi-layer unit and a side margin. The multi-layer unit includes a capacitance forming unit and a cover. The capacitance forming unit includes ceramic layers laminated in a first direction and internal electrodes disposed between the ceramic layers and mainly containing nickel. The cover covers the capacitance forming unit from the first direction. The side margin covers the multi-layer unit from a second direction orthogonal to the first direction. The internal electrodes each include an oxidized area adjacent to the side margin and intensively including a metal element that forms an oxide together with nickel. The capacitance forming unit includes a first portion adjacent to the cover and a second portion adjacent to the first portion in the first direction and including the oxidized area having a smaller dimension in the second direction than that of the oxidized area of the first portion.
    Type: Application
    Filed: December 6, 2019
    Publication date: April 9, 2020
    Inventor: Kotaro MIZUNO
  • Patent number: 10535470
    Abstract: A multi-layer ceramic capacitor includes a multi-layer unit and a side margin. The multi-layer unit includes a capacitance forming unit and a cover. The capacitance forming unit includes ceramic layers laminated in a first direction and internal electrodes disposed between the ceramic layers and mainly containing nickel. The cover covers the capacitance forming unit from the first direction. The side margin covers the multi-layer unit from a second direction orthogonal to the first direction. The internal electrodes each include an oxidized area adjacent to the side margin and intensively including a metal element that forms an oxide together with nickel. The capacitance forming unit includes a first portion adjacent to the cover and a second portion adjacent to the first portion in the first direction and including the oxidized area having a smaller dimension in the second direction than that of the oxidized area of the first portion.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: January 14, 2020
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Kotaro Mizuno
  • Patent number: 10522293
    Abstract: A multi-layer ceramic capacitor includes a multi-layer unit, a side margin, and a bonding unit. The multi-layer unit includes ceramic layers laminated in a first direction, and internal electrodes disposed between the ceramic layers and mainly containing nickel. The side margin covers the multi-layer unit from a second direction orthogonal to the first direction. The bonding unit is disposed between the multi-layer unit and the side margin and has a higher concentration of magnesium than the ceramic layers and the side margin.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: December 31, 2019
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Daisuke Sakate, Kotaro Mizuno
  • Patent number: 10515764
    Abstract: A multilayer ceramic capacitor includes an element body of roughly rectangular solid shape which is constituted by dielectric layers alternately stacked with internal electrode layers having different polarities and which has a pair of principle faces, a pair of end faces, and a pair of side faces, wherein the multilayer ceramic capacitor is such that: external electrodes are formed on the pair of end faces and one principle face of the element body; and on a cross section taken in parallel with one end face of the multilayer ceramic capacitor near the end face, the ratio of area A constituted by the internal electrode layers connected to the external electrode on this end face side and the dielectric layers present between the internal electrode layers, and area B covering the part of the section excluding the external electrodes, A/B, is 0.92 or more.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: December 24, 2019
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Kotaro Mizuno, Yukihiro Konishi, Shohei Kitamura, Yoichi Kato, Yusuke Kowase, Toru Makino, Yoshinori Tanaka