Abstract: A transistor is formed on a semiconductor substrate, and thereafter a first insulating film is formed. Subsequently, a ferroelectric capacitor is formed on the first insulating film, and then a second insulating film is formed on the ferroelectric capacitor. Thereafter, the upper surface of the second insulating film is planarized. Subsequently, a contact hole which reaches one of impurity regions of the transistor is formed, and thus a plug is formed by embedding a conductor in the contact hole. Thereafter, a hydrogen barrier layer is formed of aluminum oxide or the like. Then, a third insulating film is formed on the hydrogen barrier layer. Subsequently, contact holes which are connected to the ferroelectric capacitor and the plug are formed. Thereafter, a conductor is embedded in the contact holes, and thus interconnections are formed.

Abstract: A transistor is formed on a semiconductor substrate, and thereafter a first insulating film is formed. Subsequently, a ferroelectric capacitor is formed on the first insulating film, and then a second insulating film is formed on the ferroelectric capacitor. Thereafter, the upper surface of the second insulating film is planarized. Subsequently, a contact hole which reaches one of impurity regions of the transistor is formed, and thus a plug is formed by embedding a conductor in the contact hole. Thereafter, a hydrogen barrier layer is formed of aluminum oxide or the like. Then, a third insulating film is formed on the hydrogen barrier layer. Subsequently, contact holes which are connected to the ferroelectric capacitor and the plug are formed. Thereafter, a conductor is embedded in the contact holes, and thus interconnections are formed.

Abstract: A silicide film is formed between a ferroelectric capacitor structure, which is formed by sandwiching a ferroelectric film between a lower electrode and an upper electrode, and a conductive plug (the conductive material constituting the plug is tungsten (W) for example). Here, an example is shown in which a base film of the conductive plug is the silicide film.

Abstract: Stable contact hole forming is attained even when an aluminum oxide film is present between layers provided with contact holes. The process comprises the steps of forming a first element layer on a semiconductor substrate; forming a first interlayer insulating film on the first element layer; forming a second element layer on the first interlayer insulating film; forming a second interlayer insulating film on the second element layer; forming a hole resist pattern on the second interlayer insulating film; conducting a first etching for forming of holes by etching the second interlayer insulating film; and conducting a second etching for extending of holes to the first element layer by etching the first interlayer insulating film.

Abstract: A method of manufacturing a semiconductor device has forming a ferroelectric film over a substrate, placing the substrate having the ferroelectric film in a chamber substantially held in vacuum, introducing oxygen and an inert gas into the chamber, annealing the ferroelectric film in the chamber, and containing oxygen and the inert gas while the chamber is maintained sealed.

Abstract: A ferroelectric capacitor comprising a transistor layer superimposed on a semiconductor substrate, a ferroelectric capacitor layer provided superior to the transistor layer, a wiring layer provided superior to the ferroelectric capacitor layer, and a passivation film. Further, at least one layer of barrier film capable of inhibiting penetration of moisture and hydrogen into the underlayer is provided between the ferroelectric capacitor layer and the passivation film, and the passivation film is characterized by containing a novolac resin.

Abstract: A semiconductor device that includes a metal wiring formed on the insulating film and having a main wiring portion laminated with a plurality of metal films and a metal protection film formed at least on the upper surfaces of the main wiring portion and made of a precious metal material.

Abstract: Provided is a ferroelectric memory including a silicon substrate, a transistor formed on the silicon substrate, and a ferroelectric capacitor formed above the transistor. The ferroelectric capacitor includes a lower electrode, a ferroelectric film formed on the lower electrode, an upper electrode formed on the ferroelectric film, and a metal film formed on the upper electrode.

Abstract: After the formation of a first interlayer insulating, an etching stopper film made of SiON is formed thereon. Subsequently, a contact hole extending from the upper surface of the etching stopper film and reaching a high concentration impurity region is formed, and a first plug is formed by filling W into the contact hole. Next, a ferroelectric capacitor, a second interlayer insulating film, and the like are formed. Thereafter, a contact hole extending from the upper surface of the interlayer insulating film and reaching the first plug is formed. Then, the contact hole is filled with W to form a second plug. With this, even when misalignment occurs, the interlayer insulating film is prevented from being etched.

Abstract: After the formation of a first interlayer insulating, an etching stopper film made of SiON is formed thereon. Subsequently, a contact hole extending from the upper surface of the etching stopper film and reaching a high concentration impurity region is formed, and a first plug is formed by filling W into the contact hole. Next, a ferroelectric capacitor, a second interlayer insulating film, and the like are formed. Thereafter, a contact hole extending from the upper surface of the interlayer insulating film and reaching the first plug is formed. Then, the contact hole is filled with W to form a second plug. With this, even when misalignment occurs, the interlayer insulating film is prevented from being etched.

Abstract: A semiconductor device is provided having a pad with an improved moisture blocking ability. The semiconductor device has: a circuit portion including a plurality of semiconductor elements formed on a semiconductor substrate; lamination of insulator covering the circuit portion, including a passivation film as an uppermost layer having openings; ferro-electric capacitors formed in the lamination of insulator; wiring structure formed in the lamination of insulator and connected to the semiconductor elements and the ferro-electric capacitors; pad electrodes connected to the wiring structure, formed in the lamination of insulator and exposed in the openings of the passivation film; a conductive pad protection film, including a Pd film, covering each pad electrode via the opening of the passivation film, and extending on the passivation film; and stud bump or bonding wire connected to the pad electrode via the conductive pad protection film.

Abstract: A ferroelectric capacitor provided with a ferroelectric film (10a) is formed above a semiconductor substrate, and thereafter a wiring (17) directly connected to electrodes (9a, 11a) of a ferroelectric capacitor is formed. Then, a silicon oxide film (18) covering the wiring (17) is formed. As the silicon oxide film (18), a film which has processability higher than that of an aluminum oxide film is formed. Besides, a degree of damage that occurs in the ferroelectric capacitor when the insulating film is formed is equal to or less than that when an aluminum oxide film is formed.

Abstract: According to the method for manufacturing a semiconductor device, a surface of a lower insulating film (55) is planarized by CMP or the like, and an upper insulating film (56) and a protective metal film (59) are formed on the lower insulating film (55). Accordingly, the upper insulating film (56) and the protective metal film (59) are formed in such a manner they have an excellent coverage and the water/hydrogen blocking capability of the upper insulating film (56) and the protective metal film (59) is maximized.

Abstract: A semiconductor device is provided having a pad with an improved moisture blocking ability. The semiconductor device has: a circuit portion including a plurality of semiconductor elements formed on a semiconductor substrate; lamination of insulator covering the circuit portion, including a passivation film as an uppermost layer having openings; ferro-electric capacitors formed in the lamination of insulator; wiring structure formed in the lamination of insulator and connected to the semiconductor elements and the ferro-electric capacitors; pad electrodes connected to the wiring structure, formed in the lamination of insulator and exposed in the openings of the passivation film; a conductive pad protection film, including a Pd film, covering each pad electrode via the opening of the passivation film, and extending on the passivation film; and stud bump or bonding wire connected to the pad electrode via the conductive pad protection film.

Abstract: A semiconductor device manufacturing method, includes the steps of forming an insulating film over a semiconductor substrate, thinning selectively a thick portion, whose film thickness is thicker than a reference value, of the insulating film, forming contact holes in a thinned portion of the insulating film 25, and forming conductive plugs in the contact holes.

Abstract: Provided is a semiconductor device that includes: a base insulating film 25 formed above a silicon substrate 10; a ferroelectric capacitor Q formed on the base insulating film 25; multiple interlayer insulating films 35, 48, and 62, and metal interconnections 45, 58, and 72 which are alternately formed on and above the capacitor Q; and conductive plugs 57 which are respectively formed inside holes 54a provided in the interlayer insulating films 48 and are electrically connected to the metal interconnections 45. In the semiconductor device, a first capacitor protection insulating film 50 is formed on an upper surface of the interlayer insulating film 48 by sequentially stacking a first insulating metal oxide film 50a, an intermediate insulating film 50b having a relative dielectric constant lower than that of the interlayer insulating film 48, and a second insulating metal oxide film 50c; and the holes 54a are also formed in the first capacitor protection insulating film 50.

Abstract: After a ferroelectric capacitor (1) is formed and before a wiring (15) to be a pad is formed, an alumina film (11) is formed as a diffusion suppressing film suppressing diffusion of hydrogen and moisture. Subsequently, the wiring (15) is formed and an SOG film (16) is formed thereon. Then, a silicon nitride film (17) is formed on the SOG film (16).

Abstract: A protective film (56) having a water/hydrogen blocking function is formed so as to cover the periphery of a pad electrode (54a) while being electrically isolated from the pad electrode. A material selected in the embodiment for composing the protective film is a highly moisture-proof material having a water/hydrogen blocking function considerably superior to that of the insulating material, such as palladium (Pd) or palladium-containing material, and iridium (Ir) or iridium oxide (IrOx: typically x=2) or an iridium- or iridium oxide-containing material. An FeRAM capable of reliably preventing water/hydrogen from entering inside, and of maintaining high performance of the ferroelectric capacitor structure (30) may be realized only by a simple configuration.

Abstract: A semiconductor device has: a circuit portion having semiconductor elements formed on a semiconductor substrate; insulating lamination formed above the semiconductor substrate and covering the circuit portion; a multilevel wiring structure formed in the insulating lamination and including wiring patterns and via conductors; and a pad electrode structure formed above the semiconductor substrate and connected to the multilevel wiring structure. The pad electrode structure includes pad wiring patterns and pad via conductors interconnecting the pad wiring patterns, the uppermost pad wiring pattern includes a pad pattern and a sealing pattern surrounding the pad pattern in a loop shape. Another pad wiring pattern has continuous extended pad pattern of a size overlapping the sealing pattern. The pad via conductors include a plurality of columnar via conductors disposed in register with the pad pattern and a loop-shaped wall portion disposed in register with the sealing pattern.

Abstract: A method of manufacturing a semiconductor device has forming a ferroelectric film over a substrate, placing the substrate having the ferroelectric film in a chamber substantially held in vacuum, introducing oxygen and an inert gas into the chamber, annealing the ferroelectric film in the chamber, and containing oxygen and the inert gas while the chamber is maintained sealed.