Patents by Inventor Kouichi Nagai

Kouichi Nagai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080197502
    Abstract: A semiconductor device that includes a metal wiring formed on the insulating film and having a main wiring portion laminated with a plurality of metal films and a metal protection film formed at least on the upper surfaces of the main wiring portion and made of a precious metal material.
    Type: Application
    Filed: February 21, 2008
    Publication date: August 21, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Hideaki KIKUCHI, Kouichi NAGAI, Jirou MIURA
  • Publication number: 20080197353
    Abstract: A semiconductor device that comprises a conductive pad that is provided on the insulating film and that is obtained by forming a main conductive film and a surface conductive film harder than the main conductive film in that order.
    Type: Application
    Filed: February 21, 2008
    Publication date: August 21, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Yasufumi TAKAHASHI, Kouichi NAGAI
  • Publication number: 20080199976
    Abstract: A semiconductor device manufacturing method has a step forming a transistor layer portion on a semiconductor substrate, and a step forming a ferroelectric capacitor portion including a lower electrode, a ferroelectric substance and an upper electrode above the transistor layer portion, wherein the step forming the ferroelectric capacitor portion includes adjusting an area of the upper electrode on the basis of manufacturing parameters of the ferroelectric capacitor portion.
    Type: Application
    Filed: February 21, 2008
    Publication date: August 21, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Takahiro YAMAGATA, Kouichi NAGAI, Junichi WATANABE
  • Publication number: 20080191253
    Abstract: There is provided a method for manufacturing a semiconductor device, including, forming a first insulating film on a semiconductor substrate, forming a capacitor on the first insulating film, forming a second insulating film covering the capacitor, forming a metal wiring on the second insulating film, forming a first capacitor protective insulating film covering the metal wiring and the second insulating film, forming an insulating sidewall on a side of the metal wiring, forming a third insulating film on the insulating sidewall, forming a hole by etching the third insulating film under a condition that an etching rate of the insulating sidewall would be lower than that of the third insulating film, and forming a conductive plug inside the hole.
    Type: Application
    Filed: March 31, 2008
    Publication date: August 14, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Hideaki KIKUCHI, Kouichi NAGAI
  • Publication number: 20080186183
    Abstract: An item management system includes an IC tag, a plurality of IC readers operable to electronically detect the IC tag, and a monitor and control unit configured to detect successive positions of the IC tag by use of the plurality of IC readers in response to movement of the IC tag, to make a determination as to whether a travel route indicated by the detected successive positions is a normal route, and to activate alarm when the determination indicates an abnormal route.
    Type: Application
    Filed: April 3, 2008
    Publication date: August 7, 2008
    Inventors: Kouichi Nagai, Kou Nakamura
  • Publication number: 20080142864
    Abstract: According to the method for manufacturing a semiconductor device, a surface of a lower insulating film (55) is planarized by CMP or the like, and an upper insulating film (56) and a protective metal film (59) are formed on the lower insulating film (55). Accordingly, the upper insulating film (56) and the protective metal film (59) are formed in such a manner they have an excellent coverage and the water/hydrogen blocking capability of the upper insulating film (56) and the protective metal film (59) is maximized.
    Type: Application
    Filed: January 7, 2008
    Publication date: June 19, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Makoto TAKAHASHI, Kouichi NAGAI
  • Publication number: 20080128858
    Abstract: When adopting a stack-type capacitor structure for a ferroelectric capacitor structure (30), an interlayer insulating film (27) is formed between a lower electrode (39) (or a barrier conductive film) and a conductive plug (22) to eliminate an impact of orientation/level difference on a surface of the conductive plug (22) onto the ferroelectric film (40). Differently from a conductive film like the lower electrode (39) or the barrier conductive film, the interlayer insulating film (27) can be formed without inheriting the orientation/level difference from its lower layers by planarizing the surface thereof.
    Type: Application
    Filed: December 7, 2007
    Publication date: June 5, 2008
    Applicant: FUJITSU LIMITED
    Inventor: Kouichi NAGAI
  • Publication number: 20080099855
    Abstract: A protective film (56) having a water/hydrogen blocking function is formed so as to cover the periphery of a pad electrode (54a) while being electrically isolated from the pad electrode. A material selected in the embodiment for composing the protective film is a highly moisture-proof material having a water/hydrogen blocking function considerably superior to that of the insulating material, such as palladium (Pd) or palladium-containing material, and iridium (Ir) or iridium oxide (IrOx: typically x=2) or an iridium- or iridium oxide-containing material. An FeRAM capable of reliably preventing water/hydrogen from entering inside, and of maintaining high performance of the ferroelectric capacitor structure (30) may be realized only by a simple configuration.
    Type: Application
    Filed: January 3, 2008
    Publication date: May 1, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Kouichi NAGAI, Katsuhiro SATO, Kaoru SUGAWARA, Makoto TAKAHASHI, Masahito KUDOU, Kazuhiro ASAI, Yukimasa MIYAZAKI, Kaoru SAIGOH
  • Publication number: 20080087928
    Abstract: The semiconductor device according to the present invention comprises a plurality of actually operative capacitors 36a formed, arranged in an actually operative capacitor part 26 over a semiconductor substrate 10 and each including a lower electrode 30, a ferroelectric film 32 and an upper electrode 34; a plurality of dummy capacitors 36b formed, arranged in a dummy capacitor part 28 provided outside of the actually operative capacitor part 26 over the semiconductor substrate 10 and each including the lower electrode 30, the ferroelectric film 32 and the upper electrode 34; a plurality of interconnections 40 respectively formed on said plurality of the actually operative capacitors 36a and respectively connected to the upper electrodes 34 of said plurality of the actually operative capacitors 36a; and the interconnections 40 respectively formed on said plurality of the dummy capacitors 36b, the ratio of the pitch of the dummy capacitors 36b to the pitch of the actually operative capacitors 36a being in the ra
    Type: Application
    Filed: December 12, 2007
    Publication date: April 17, 2008
    Applicant: FUJITSU LIMITED
    Inventor: Kouichi NAGAI
  • Publication number: 20080088322
    Abstract: A semiconductor device having sufficient sensitivity, strength, and the like and a method for fabricating such a semiconductor device. In a method for fabricating a semiconductor device which detects the shape of a skin surface by detecting capacitance formed between the skin surface and a conductive film between which a passivation film including a silicon nitride film and a polyimide film is, the polyimide film with a thickness of not less than 400 nm nor more than 700 nm is formed at a curing temperature higher than or equal to 350° C. and lower than or equal to 380° C. as a top layer of the semiconductor device. When the polyimide film is cured, nitrogen gas or the like is made to flow in at a flow rate of 110 liters/minute or more. By adopting this method, a very thin passivation film is formed on a semiconductor device and a semiconductor device having sufficient sensitivity, strength, and the like can be fabricated.
    Type: Application
    Filed: September 28, 2007
    Publication date: April 17, 2008
    Applicant: FUJITSU LIMITED
    Inventor: Kouichi Nagai
  • Publication number: 20080081381
    Abstract: A semiconductor device fabrication method that improves the efficiency of semiconductor device production. A plurality of wafer substrates are set and a process for fabricating semiconductor devices each having a ferroelectric capacitor is begun. After ferroelectric layers are formed over the plurality of wafer substrates, the ferroelectric layers formed are damaged. The plurality of wafer substrates are then rearranged and treatment is performed. In each step in which the ferroelectric layers formed may be damaged, the plurality of wafer substrates are rearranged and treatment is performed. As a result, retention characteristic variations among wafer substrates in the same lot are reduced and the productivity of semiconductor devices is improved.
    Type: Application
    Filed: October 2, 2007
    Publication date: April 3, 2008
    Applicant: FUJITSU LIMITED
    Inventor: Kouichi Nagai
  • Publication number: 20080042226
    Abstract: According to the present embodiment, a surface-shape sensor is provided. The surface-shape sensor includes a silicon substrate, an interlayer insulating film formed over the silicon substrate, a first moisture-barrier insulating film formed on the interlayer insulating film, a detection-electrode film formed on the first moisture-barrier insulating film, a second moisture-barrier insulating film formed on the detection-electrode film and a protection insulating film formed on the second moisture-barrier insulating film and provided with a window on the detection electrode film.
    Type: Application
    Filed: August 14, 2007
    Publication date: February 21, 2008
    Applicant: FUJITSU LIMITED
    Inventor: Kouichi NAGAI
  • Publication number: 20080036485
    Abstract: The present invention provides a semiconductor wafer characterized by including: a silicon substrate which includes chip regions and scribe regions; multiple-layered films formed on the silicon substrate; and a reference mark formed in at least one film constituting the multiple-layered films. In addition, the semiconductor wafer is also characterized in that the reference mark is located at least one of the vertices of a virtual rectangle covering the plurality of chip regions, and in that the reference mark is longer than one side of each of the chip regions.
    Type: Application
    Filed: July 27, 2007
    Publication date: February 14, 2008
    Applicant: FUJITSU LIMITED
    Inventor: Kouichi NAGAI
  • Publication number: 20080017999
    Abstract: A semiconductor device including a semiconductor device, an integrated circuit chip, a sealing resin encapsulating the integrated circuit chip and an insulating waterproof film covering at least a portion of a surface of said sealing resin and preventing penetration of moisture into the sealing resin.
    Type: Application
    Filed: September 20, 2007
    Publication date: January 24, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Hideaki Kikuchi, Kouichi Nagai
  • Publication number: 20080006867
    Abstract: A ferroelectric capacitor provided with a ferroelectric film (10a) is formed above a semiconductor substrate, and thereafter a wiring (17) directly connected to electrodes (9a, 11a) of a ferroelectric capacitor is formed. Then, a silicon oxide film (18) covering the wiring (17) is formed. As the silicon oxide film (18), a film which has processability higher than that of an aluminum oxide film is formed. Besides, a degree of damage which occurs in the ferroelectric capacitor when the insulating film is formed is equal to or less than that when an aluminum oxide film is formed.
    Type: Application
    Filed: September 4, 2007
    Publication date: January 10, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Hideaki Kikuchi, Kouichi Nagai
  • Publication number: 20080006914
    Abstract: It is an aspect of the embodiments discussed herein to provide a semiconductor device including: a substrate; a base on the substrate; an integrated circuit chip on the base; and a ball grid array type package material made of a resin and encapsulating the integrated circuit chip.
    Type: Application
    Filed: September 18, 2007
    Publication date: January 10, 2008
    Applicant: FUJITSU LIMITED
    Inventor: Kouichi NAGAI
  • Publication number: 20080001147
    Abstract: In a circuit area wherein a semiconductor integrated circuit is to be formed, an isolation insulating film is formed on a surface of a semiconductor substrate (11), and, at the same time, five isolation insulating films (12m) extending in one specific direction are formed within a monitor area (1) at a fixed spacing. Then, a gate insulation film and a gate electrode are formed within the circuit area on the semiconductor substrate (11), and, at the same time, five gate insulation films (13m) and five gate electrodes (14m) extending in the same direction as the isolation insulating films (12m) are formed within the monitor area (1) at the same spacing as that of the isolation insulating films (12m).
    Type: Application
    Filed: September 14, 2007
    Publication date: January 3, 2008
    Applicant: FUJITSU LIMITED
    Inventor: Kouichi NAGAI
  • Publication number: 20080001291
    Abstract: A transistor is formed on a semiconductor substrate, and thereafter a first insulating film is formed. Subsequently, a ferroelectric capacitor is formed on the first insulating film, and then a second insulating film is formed on the ferroelectric capacitor. Thereafter, the upper surface of the second insulating film is planarized. Subsequently, a contact hole which reaches one of impurity regions of the transistor is formed, and thus a plug is formed by embedding a conductor in the contact hole. Thereafter, a hydrogen barrier layer is formed of aluminum oxide or the like. Then, a third insulating film is formed on the hydrogen barrier layer. Subsequently, contact holes which are connected to the ferroelectric capacitor and the plug are formed. Thereafter, a conductor is embedded in the contact holes, and thus interconnections are formed.
    Type: Application
    Filed: November 16, 2006
    Publication date: January 3, 2008
    Applicant: FUJITSU LIMITED
    Inventor: Kouichi Nagai
  • Patent number: 7288799
    Abstract: A semiconductor device includes a semiconductor substrate, a circuit part formed on and above the semiconductor substrate, a passivation film covering the circuit part, an electrode pad provided outside the circuit part in such a manner that the electrode pad is exposed from the passivation film, and a guard ring pattern provided between the electrode pad and the circuit part such that the guard ring pattern surrounds the circuit part substantially. The guard ring pattern extends from a surface of the semiconductor substrate to the passivation film.
    Type: Grant
    Filed: April 30, 2004
    Date of Patent: October 30, 2007
    Assignee: Fujitsu Limited
    Inventors: Kaoru Saigoh, Kouichi Nagai
  • Publication number: 20070108489
    Abstract: The semiconductor device according to the present invention comprises: a ferroelectric capacitor 42 formed above a semiconductor substrate 10 and including a lower electrode 36, a ferroelectric film 38 formed on the lower electrode 36 and an upper electrode 40 formed on the ferroelectric film 38; a silicon oxide film 60 formed above the semiconductor substrate 10 and the ferroelectric capacitor 42 and having the surface planarized; a flat barrier film 62 formed on the silicon oxide film 60 with a silicon oxide film 61 formed therebetween, for preventing the diffusion of hydrogen or water; a silicon oxide film 64 formed above the barrier film 62 and having the surface planarized; and a flat barrier film 78 formed on the silicon oxide film 74 with a silicon oxide film 76 formed therebetween, for preventing the diffusion of hydrogen or water.
    Type: Application
    Filed: December 29, 2006
    Publication date: May 17, 2007
    Applicant: FUJITSU LIMITED
    Inventor: Kouichi Nagai