Abstract: A transmitter circuit includes a driver circuit including a non-inverting output terminal and an inverting output terminal for outputting a signal current, which has a loop direction that changes based upon an input signal, to the non-inverting output terminal and the inverting output terminal and an output-waveform control circuit for detecting a waveform edge of the input signal and responding by increasing the signal current temporarily. The output-waveform control circuit includes a first inverter circuit receiving a non-inverted input signal, a first capacitor including one end connected to an output terminal of the first inverter circuit and another end connected to the inverting output terminal, a second inverter circuit receiving an inverted input signal, and a second capacitor including one end connected to an output terminal of the second inverter circuit and another end connected to the non-inverting output terminal.

Abstract: A display driver for evenly display the screen driven by a plurality of driver circuits is provided. The display apparatus includes a display panel driven by data lines and driver units. Each of the data lines is driven by the corresponding driver unit. Each of the driver units has a resistance division unit for generating grayscale voltages, an operational amplifier unit for supplying voltages to the terminals of the resistance division unit in response to a bias control signal. The corresponding terminals of the resistance division unit of the plurality of driver circuits are commonly connected. The bias control signal is supplied when each of the driver circuit drives the corresponding data line.

Abstract: Provided is a display panel driver with an improved driving characteristic by use of an amplifier output having excellent symmetry of an output characteristic. The display panel driver according to the present invention includes a first input differential stage circuit, a first output stage circuit, a second output stage circuit, and a first switch circuit. The first input differential stage circuit outputs two first input stage output signals according to one of a positive voltage and a negative voltage. The first switch circuit selects one of the first and second output stage circuits, and connects the selected circuit to the first input differential stage circuit. The output stage circuit connected to the first input differential stage circuit outputs a single-ended signal based on the two first input stage output signals from the first input differential stage circuit.

Abstract: A grayscale voltage generating circuit includes a first constant-voltage source for generating a high potential; a second constant-voltage source for generating a low potential; ? resistor connected between outputs of the first and second constant-voltage sources; a difference voltage detecting circuit for detecting a difference voltage across the ? resistor; and a voltage-to-current converting circuit for converting the difference voltage to a current by a resistor and outputting the current as a source current and a sink current. The source current output and sink current output of the voltage-to-current converting circuit are connected to the high and low potential sides, respectively, of the ? resistor.

Abstract: An output circuit includes an analog amplifier circuit including a differential amplifier stage configured to receive an input voltage, and first to nth output systems (n is a natural number more than 1); first to nth output nodes; an output pad; and first to nth electrostatic protection resistances. An ith output system (i is a natural number between 2 and n) of the first to nth output systems includes an ith PMOS transistor having a drain connected with the ith output node of the first to nth output nodes and a gate connected with a first output of the differential amplifier stage; and an ith NMOS transistor having a drain connected with the ith output node and a gate connected with a second output of the differential amplifier stage. The first to nth electrostatic protection resistances are respectively connected between the first to nth output nodes and the output pad.

Abstract: An operational amplifier includes an input stage amplifier that receives an input signal, an output stage amplifier that amplifies a signal output from the input stage amplifier and outputs the signal, a capacitor that is connected between an input node and an output node of the output stage amplifier, and a charge and discharge control circuit that controls a charge and discharge current of the capacitor.

Abstract: An output circuit includes a first output transistor disposed between a higher-potential power supply terminal and an external output terminal, a current flowing from the source of the first output transistor to the drain thereof being controlled on the basis of an external input signal; a second output transistor disposed between a lower-potential power supply terminal and the external output terminal, a current flowing from the source of the second output transistor to the drain thereof being controlled on the basis of an external input signal; and a clamping transistor having a first terminal and a control terminal, the first terminal and the control terminal being coupled to the gate of the first output transistor, and a second terminal coupled to the drain of the first output transistor.

Abstract: A liquid crystal display (LCD) driver integrated circuit (IC) includes a grayscale voltage generating circuit generating grayscale voltages from a set of supply reference voltages. A converting section having connection terminals drives each of data lines of an LCD display panel through one of the connection terminals based on one of the grayscale voltages. The grayscale voltage generating circuit includes a resistance circuit having resistances connected in series and voltage buffers connected to the resistance circuit to bias the resistance circuit. When two of the LCD driver ICs are used, non-inversion input terminals of pairs of the voltage buffers in a first of the two LCD driver ICs and a corresponding voltage buffer in the second LCD driver IC are commonly connected to the reference voltage generating circuit, and connection terminals in the first LCD driver IC are connected to connection terminals in the second LCD driver IC.

Abstract: A capacitive load driving circuit includes a gate driver, and a source driver. The gate driver drives a plurality of capacitive loads arranged in a matrix form in a row direction. The source driver drives the plurality of capacitive loads in a column direction. The source driver includes a plurality of output circuits configured to be arranged in a row direction. Each of the plurality of output circuits changes a slew rate based on a column position of a capacitive load of the plurality of capacitive loads driven by the gate driver.

Abstract: A liquid crystal display apparatus includes a liquid crystal display panel having a data line and a source driver for supplying a data signal to the data line based on a polarity signal. A polarity of the data signal is determined based on the polarity signal. The source driver includes an offset cancel control circuit for generating an offset cancel control signal and an output amplifier used to generate the data signal. The output amplifier is constructed so as to invert a polarity of an offset voltage based on the offset cancel control signal. The offset cancel control signal is generated based on the polarity signal.

Abstract: To provide a temperature detection circuit and a semiconductor device capable of accurately detecting temperatures. A temperature detection circuit 10 includes a group of diodes 11 connected in series, a constant current source I1 connected to the group of diodes 11, a BGR circuit 13, an amplifier 14 for amplifying the BGR voltage, an adder 12 for subtracting a comparison voltage VD generated by the group of diodes 11 from a reference voltage serving as an output of the amplifier 14, a voltage current converter 15 for converting the output voltage of the adder 12 into the current, and a resistor R2 for converting its output current into the voltage. The reference voltage VA2 is a BGR voltage VBGR amplified by the same voltage as the comparison voltage VD at a predetermined temperature T1.

Abstract: A source driver which can control the spatial cycle of inverting the polarity of offset voltage in response to the spatial cycle of inverting the polarity of data signal. The liquid crystal display device according to the present invention has an LCD panel, having data lines, and source drivers for supplying data signal to the data lines. The source driver includes an offset cancel control circuit for generating an offset cancel control signal and an amplifier used for generating the data signal, which is configured so as to invert the polarity of the offset voltage in response to the offset cancel control signal OCC. The offset cancel controller circuit receives the pattern select signal PSEL specifying the cycle of inverting the polarity of the offset voltage of the amplifier to generate the offset cancel control signal in response to the pattern select signal PSEL.

Abstract: A display device is provided with a plurality of differential amplifiers associated with a plurality of data lines within a display panel. Each of the plurality of differential amplifiers includes: an output stage circuit including a first transistor having a source connected to the positive power supply and a second transistor having a source connected to the negative power supply, an output terminal connected to drains of the first and second transistors; and a bias control circuit provided between the adder circuit and the output stage circuit to achieve bias control of gates of the first and second transistors. During the switching period, the output stage circuit provides short-circuiting between the gate and source of each of the first and second transistors, and the bias control circuit cuts off a current path between the gates of the first and second transistors during the switching period.

Abstract: An operational amplifier is provided with: a high-side output transistor connected between an output terminal and a positive power supply line; a low-side output transistor connected between the output terminal and a negative power supply line; a first capacitor element connected between a first node and the output terminal; a second capacitor element connected between a second node and the output terminal; a first PMOS transistor having a source connected to the gate of the high-side output transistor and a drain connected to the gate of the low-side output transistor; a first NMOS transistor having a source connected to the gate of the low-side output transistor and a drain connected to the gate of the high-side output transistor; a second PMOS transistor having a source connected to the first node and a drain connected to the gate of the high-side output transistor; and a second NMOS transistor having a source connected to the second node and a drain connected to the gate of the low-side output transistor.

Abstract: A data driver used for driving a display panel is provided with a grayscale voltage generator circuit generating a plurality of grayscale voltages; and a drive circuitry selecting a selected grayscale voltage from the plurality of grayscale voltages in response to input display data, and outputting a data signal having a voltage level corresponding to the selected grayscale voltage to the display panel. The grayscale voltage generator circuit comprises an amplifier generating a voltage bias; and a voltage generator circuit generating the plurality of grayscale voltages from the voltage bias. The amplifier is designed so that a polarity of an offset voltage of the amplifier is reversible.

Abstract: It was difficult to design an operational amplifier which can cancel an offset to drive a liquid crystal display. An operational amplifier includes: a first differential pair having a first transistor and a second transistor of a first conduction type; a second differential pair having a third transistor and a fourth transistor of a second conduction type; a first floating current source; a second floating current source; and an output stage having a fifth transistor and a sixth transistor, in which, when an input signal is applied to the first and third transistor, an electric current which flows into the fifth transistor and the sixth transistor is set by the first floating current source, and when the input signal is applied to the second and fourth transistor, an electric current which flows into the fifth transistor and the sixth transistor is set by the second floating current source.

Abstract: A differential amplifier circuit receives a pair of input signals to develop an output signal. First and second MOS transistors have commonly-connected gates and sources. A third MOS transistor has a drain connected to the commonly-connected gates, and a source connected to the first MOS transistor's drain. The third MOS transistor's gate is connected to a constant voltage source. A constant current source is connected to the third MOS transistor's drain. A first terminal, connected to the first MOS transistor's drain and to the third MOS transistor's source, provides an input current. A second terminal, connected to the first and second MOS transistors' commonly-connected sources, provides a common reference. A third terminal, connected to the second MOS transistor's drain, provides an output current.

Abstract: In an operational amplifier includes: a control unit switches an operation mode between first and second operation modes. A first differential stage circuit section differentially-amplifies a first input signal supplied through a first input node in the first operation mode, and a second input signal supplied through the first input node in the second operation mode, similar to a second differential stage circuit section. A first output drive stage circuit section is configured to amplify the first input signal differentially-amplified by the first or second input differential stage circuit section to output as a first drive voltage, similar to a second output drive stage circuit section.

Abstract: An operational amplifier is provide with: a first MOS transistor pair connected to a non-inverting input terminal and an inverting input terminal; an intermediate stage connected to the first MOS transistor pair connected to the first MOS transistor pair; a first output transistor having a drain connected to an output terminal; and a first source follower. The first source follower is inserted between a gate of the first output transistor and a first output node of the intermediate stage.

Abstract: A differential amplifier circuit includes: an input terminal and an inversion input terminal; a PMOS transistor pair connected with the non-inversion input terminal and the inversion input terminal; and an output circuit section. The PMOS transistor pair includes first and second PMOS transistors, and the NMOS transistor pair includes first and second non-doped type NMOS transistors as a depletion type of NMOS transistors in which a channel region is formed in a P-type substrate without a P well. The output circuit section includes a first current mirror of a folded cascode type connected with the first and second non-doped type NMOS transistors, and outputs an output voltage in response to a current from the first current mirror.