Patents by Inventor Kuan-Chieh Huang

Kuan-Chieh Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180374998
    Abstract: A light emitting device includes a light emitting unit, a light transmissive layer and an encapsulant. The light emitting unit includes a substrate, an epitaxial structure layer disposed on the substrate, and a first electrode and a second electrode disposed on the same side of the epitaxial structure layer, respectively. The light emitting unit is disposed on the light transmissive layer and at least a part of the first electrode and a part of the second electrode are exposed by the light transmissive layer. The encapsulant encapsulates the light emitting unit and at least exposes a part of the first electrode and a part of the second electrode. Each of the first electrode and the second electrode extends outward from the epitaxial structure layer, and covers at least a part of an upper surface of the encapsulant, respectively.
    Type: Application
    Filed: August 13, 2018
    Publication date: December 27, 2018
    Applicant: Genesis Photonics Inc.
    Inventors: Shao-Ying Ting, Kuan-Chieh Huang, Jing-En Huang, Yu-Feng Lin, Yi-Ru Huang
  • Patent number: 10164145
    Abstract: A method for manufacturing a light emitting unit is provided. A semiconductor structure including a plurality of light emitting dice separated from each other is provided. A molding compound is formed to encapsulate the light emitting dice. Each of the light emitting dice includes a light emitting element, a first electrode and a second electrode. A patterned metal layer is formed on the first electrodes and the second electrodes of the light emitting dice. A substrate is provided, where the molding compound is located between the substrate and the light emitting elements of the light emitting dice. A cutting process is performed to cut the semiconductor structure, the patterned metal layer, the molding compound and the substrate so as to define a light emitting unit with a series connection loop, a parallel connection loop or a series-parallel connection loop.
    Type: Grant
    Filed: January 1, 2018
    Date of Patent: December 25, 2018
    Assignee: Genesis Photonics Inc.
    Inventors: Shao-Ying Ting, Kuan-Chieh Huang, Jing-En Huang, Yi-Ru Huang, Sie-Jhan Wu, Long-Lin Ke
  • Patent number: 10163758
    Abstract: Present disclosure provides a semiconductor structure, including a semiconductor substrate having an active side, an interconnect layer over the active side of the semiconductor substrate, and a through substrate via (TSV) extending from the semiconductor substrate to the first metal layer. The interconnect layer includes a first metal layer closest to the active side of the semiconductor substrate, a thickness of the first metal layer is lower than 1 micrometer, and a dimension of a continuous metal feature of the first metal layer is less than 2 micrometer from a top view perspective. The continuous metal feature is cut off by a first dielectric feature. Present disclosure also provides a method for manufacturing the semiconductor structure described herein.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: December 25, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Ching-Chun Wang, Kuan-Chieh Huang, Hsing-Chih Lin, Yi-Shin Chu
  • Patent number: 10157895
    Abstract: A three-dimensional (3D) integrated circuit (IC) die is provided. In some embodiments, a first IC die comprises a first semiconductor substrate, a first interconnect structure over the first semiconductor substrate, and a first hybrid bond (HB) structure over the first interconnect structure. The first HB structure comprises a HB link layer and a HB contact layer extending from the HB link layer to the first interconnect structure. A second IC die is over the first IC die, and comprises a second semiconductor substrate, a second HB structure, and a second interconnect structure between the second semiconductor substrate and the second HB structure. The second HB structure contacts the first HB structure. A seal-ring structure is in the first and second IC dies. Further, the seal-ring structure extends from the first semiconductor substrate to the second semiconductor substrate, and is defined in part by the HB contact layer.
    Type: Grant
    Filed: April 17, 2018
    Date of Patent: December 18, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Shin Chu, Kuan-Chieh Huang, Pao-Tung Chen, Shuang-Ji Tsai, Yi-Hao Chen, Feng-Kuei Chang
  • Publication number: 20180337310
    Abstract: A light emitting diode including a first-type semiconductor layer, an emitting layer, a second-type semiconductor layer, a first electrode, a second electrode, and a Bragg reflector structure. The emitting layer is configured to emit a light beam and is located between the first-type semiconductor layer and the second-type semiconductor layer. The light beam has a peak wavelength in a light emitting wavelength range. The first-type semiconductor layer, the emitting layer, and the second-type semiconductor layer are located on a same side of the Bragg reflector structure. A reflectance of the Bragg reflector structure is greater than or equal to 95% in a reflective wavelength range at least covering 0.8X nm to 1.8X nm, and X is the peak wavelength of the light emitting wavelength range.
    Type: Application
    Filed: July 30, 2018
    Publication date: November 22, 2018
    Applicant: Genesis Photonics Inc.
    Inventors: Yi-Ru Huang, Tung-Lin Chuang, Yan-Ting Lan, Sheng-Tsung Hsu, Chih-Ming Shen, Jing-En Huang, Teng-Hsien Lai, Hung-Chuan Mai, Kuan-Chieh Huang, Shao-Ying Ting
  • Publication number: 20180261727
    Abstract: The invention provides an LED including a first-type semiconductor layer, an emitting layer, a second-type semiconductor layer, a first electrode, a second electrode, a Bragg reflector structure, a conductive layer and insulation patterns. The first electrode and the second electrode are located on the same side of the Bragg reflector structure. The conductive layer is disposed between the Bragg reflector structure and the second-type semiconductor layer. The insulation patterns are disposed between the conductive layer and the second-type semiconductor layer. Each insulating layer has a first surface facing toward the second-type semiconductor layer, a second surface facing away from the second-type semiconductor layer, and an inclined surface. The inclined surface connects the first surface and the second surface and is inclined with respect to the first surface and the second surface.
    Type: Application
    Filed: May 16, 2018
    Publication date: September 13, 2018
    Applicant: Genesis Photonics Inc.
    Inventors: Yi-Ru Huang, Tung-Lin Chuang, Yan-Ting Lan, Sheng-Tsung Hsu, Chih-Ming Shen, Jing-En Huang, Teng-Hsien Lai, Hung-Chuan Mai, Kuan-Chieh Huang, Shao-Ying Ting, Cheng-Pin Chen, Wei-Chen Chien, Chih-Chin Cheng, Chih-Hung Tseng
  • Publication number: 20180261729
    Abstract: Provided is a light emitting diode (LED) mounted on a carrier substrate and including a semiconductor epitaxial structure and at least one electrode pad structure. The semiconductor epitaxial structure is electrically connected to the carrier substrate. The electrode pad structure includes a eutectic layer, a barrier layer and a ductility layer. The eutectic layer is adapted for eutectic bonding to the carrier substrate. The barrier layer is between the eutectic layer and the semiconductor epitaxial structure. The barrier layer blocks the diffusion of the material of the eutectic layer in the eutectic bonding process. The ductility layer is between the eutectic layer and the semiconductor epitaxial structure. The ductility layer reduces the stress on the LED produced by thermal expansion and contraction of the substrate during the eutectic bonding process, so as to prevent the electrode pad structure from cracking, and maintain the quality of the LED.
    Type: Application
    Filed: May 9, 2018
    Publication date: September 13, 2018
    Applicant: Genesis Photonics Inc.
    Inventors: Yi-Ru Huang, Tung-Lin Chuang, Chih-Ming Shen, Sheng-Tsung Hsu, Kuan-Chieh Huang, Jing-En Huang, Shao-Ying Ting
  • Publication number: 20180233490
    Abstract: A three-dimensional (3D) integrated circuit (IC) die is provided. In some embodiments, a first IC die comprises a first semiconductor substrate, a first interconnect structure over the first semiconductor substrate, and a first hybrid bond (HB) structure over the first interconnect structure. The first HB structure comprises a HB link layer and a HB contact layer extending from the HB link layer to the first interconnect structure. A second IC die is over the first IC die, and comprises a second semiconductor substrate, a second HB structure, and a second interconnect structure between the second semiconductor substrate and the second HB structure. The second HB structure contacts the first HB structure. A seal-ring structure is in the first and second IC dies. Further, the seal-ring structure extends from the first semiconductor substrate to the second semiconductor substrate, and is defined in part by the HB contact layer.
    Type: Application
    Filed: April 17, 2018
    Publication date: August 16, 2018
    Inventors: Yi-Shin Chu, Kuan-Chieh Huang, Pao-Tung Chen, Shuang-Ji Tsai, Yi-Hao Chen, Feng-Kuei Chang
  • Patent number: 10050183
    Abstract: A light emitting device includes a light emitting unit, a light transmissive layer and an encapsulant. The light emitting unit includes a substrate, an epitaxial structure layer disposed on the substrate, and a first electrode and a second electrode disposed on the same side of the epitaxial structure layer, respectively. The light emitting unit is disposed on the light transmissive layer and at least a part of the first electrode and a part of the second electrode are exposed by the light transmissive layer. The encapsulant encapsulates the light emitting unit and at least exposes a part of the first electrode and a part of the second electrode. Each of the first electrode and the second electrode extends outward from the epitaxial structure layer, and covers at least a part of an upper surface of the encapsulant, respectively.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: August 14, 2018
    Assignee: Genesis Photonics Inc.
    Inventors: Shao-Ying Ting, Kuan-Chieh Huang, Jing-En Huang, Yu-Feng Lin, Yi-Ru Huang
  • Patent number: 10038121
    Abstract: A light emitting diode including a first-type semiconductor layer, an emitting layer, a second-type semiconductor layer, a first electrode, a second electrode, and a Bragg reflector structure. The emitting layer is configured to emit a light beam and is located between the first-type semiconductor layer and the second-type semiconductor layer. The light beam has a peak wavelength in a light emitting wavelength range. The first-type semiconductor layer, the emitting layer, and the second-type semiconductor layer are located on a same side of the Bragg reflector structure. A reflectance of the Bragg reflector structure is greater than or equal to 95% in a reflective wavelength range at least covering 0.8X nm to 1.8X nm, and X is the peak wavelength of the light emitting wavelength range.
    Type: Grant
    Filed: February 17, 2016
    Date of Patent: July 31, 2018
    Assignee: Genesis Photonics Inc.
    Inventors: Yi-Ru Huang, Tung-Lin Chuang, Yan-Ting Lan, Sheng-Tsung Hsu, Chih-Ming Shen, Jing-En Huang, Teng-Hsien Lai, Hung-Chuan Mai, Kuan-Chieh Huang, Shao-Ying Ting
  • Publication number: 20180190887
    Abstract: A light emitting device structure includes a light emitting device, a molding compound, a transparent substrate and a reflective layer. The light emitting device has an upper surface and a lower surface opposite to each other, a side surface connecting the upper and lower surfaces, and a first pad and a second pad located on the lower surface and separated from each other. The molding compound at least encapsulates the upper surface and the side surface, and exposes the first pad and the second pad. The transparent substrate is disposed above the upper surface of the light emitting device, and the molding compound is located between the transparent substrate and the light emitting device. The reflective layer directly covers the side surface of the light emitting device, wherein the molding compound encapsulates the reflective layer and exposes a bottom surface of the reflective layer.
    Type: Application
    Filed: February 28, 2018
    Publication date: July 5, 2018
    Applicant: Genesis Photonics Inc.
    Inventors: Shao-Ying Ting, Kuan-Chieh Huang, Jing-En Huang, Yi-Ru Huang
  • Publication number: 20180182742
    Abstract: The disclosure relates to a high-voltage light-emitting diode (HV LED) and a manufacturing method thereof. A plurality of LED dies connected in series, in parallel, or in series and parallel are formed on a substrate. A side surface of the first semiconductor layer of part of the LED dies is aligned with a side surface of the substrate, such that no space for exposing the substrate is reserved between the LED dies and the edges of the substrate, the ratio of the substrate being covered by the LED dies is increased, that is, light-emitting area per unit area is increased, and the efficiency of light extraction of HV LED is improved.
    Type: Application
    Filed: February 23, 2018
    Publication date: June 28, 2018
    Inventors: Tsung-Syun Huang, Chih-Chung Kuo, Yi-Ru Huang, Chih-Ming Shen, Kuan-Chieh Huang, Jing-En Huang
  • Publication number: 20180151545
    Abstract: A light-emitting device and a light-emitting module using the same are provided. The light-emitting device includes a substrate module and a light-emitting component. The substrate module includes a substrate, a first conductive layer, an insulation layer and a second conductive layer. The substrate has an upper surface. The insulation layer is formed on the upper surface of the substrate, separates the substrate and the first conductive layer and has an opening. The second conductive layer connects to the upper surface of the substrate and is separated from the first conductive layer. The light-emitting component is disposed on the substrate module and electrically connected to the first conductive layer and the second conductive layer.
    Type: Application
    Filed: January 24, 2018
    Publication date: May 31, 2018
    Inventors: Yi-Ru Huang, Shao-Ying Ting, Kuan-Chieh Huang, Jing-En Huang
  • Patent number: 9972603
    Abstract: A three-dimensional (3D) integrated circuit (IC) die is provided. In some embodiments, a first IC die comprises a first semiconductor substrate, a first interconnect structure over the first semiconductor substrate, and a first hybrid bond (HB) structure over the first interconnect structure. The first HB structure comprises a HB link layer and a HB contact layer extending from the HB link layer to the first interconnect structure. A second IC die is over the first IC die, and comprises a second semiconductor substrate, a second HB structure, and a second interconnect structure between the second semiconductor substrate and the second HB structure. The second HB structure contacts the first HB structure. A seal-ring structure is in the first and second IC dies. Further, the seal-ring structure extends from the first semiconductor substrate to the second semiconductor substrate, and is defined in part by the HB contact layer.
    Type: Grant
    Filed: December 19, 2016
    Date of Patent: May 15, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Shin Chu, Kuan-Chieh Huang, Pao-Tung Chen, Shuang-Ji Tsai, Yi-Hao Chen, Feng-Kuei Chang
  • Publication number: 20180122984
    Abstract: A method for manufacturing a light emitting unit is provided. A semiconductor structure including a plurality of light emitting dice separated from each other is provided. A molding compound is formed to encapsulate the light emitting dice. Each of the light emitting dice includes a light emitting clement, a first electrode and a second electrode. A patterned metal layer is formed on the first electrodes and the second electrodes of the light emitting dice. A substrate is provided, where the molding compound is located between the substrate and the light emitting elements of the light emitting dice. A cutting process is performed to cut the semiconductor structure, the patterned metal layer, the molding compound and the substrate so as to define a light emitting unit with a series connection loop, a parallel connection loop or a series-parallel connection loop.
    Type: Application
    Filed: January 1, 2018
    Publication date: May 3, 2018
    Applicant: Genesis Photonics Inc.
    Inventors: Shao-Ying Ting, Kuan-Chieh Huang, Jing-En Huang, Yi-Ru Huang, Sie-Jhan Wu, Long-Lin Ke
  • Publication number: 20180083168
    Abstract: A light emitting component includes a light emitting unit, a molding compound and a wavelength converting layer. The light emitting unit has a forward light emitting surface. The molding compound covers the light emitting unit. The wavelength converting layer is disposed above the molding compound. The wavelength converting layer has a first surface and a second surface opposite to the first surface, wherein the first surface is located between the forward light emitting surface and the second surface, and at least one of the first and second surfaces is non-planar.
    Type: Application
    Filed: November 27, 2017
    Publication date: March 22, 2018
    Applicant: Genesis Photonics Inc.
    Inventors: Kuan-Chieh Huang, Shao-Ying Ting, Jing-En Huang, Yi-Ru Huang
  • Publication number: 20180025970
    Abstract: An integrated circuit (IC) provides high performance and high functional density. A first back-end-of-line (BEOL) interconnect structure and a second BEOL interconnect structure are respectively under and over a semiconductor substrate. A first electronic device and a second electronic device are between the semiconductor substrate and respectively a bottom of the first BEOL interconnect structure and a top of the second BEOL interconnect structure. A through substrate via (TSV) extends through the semiconductor substrate, from the first BEOL interconnect structure to the second BEOL interconnect structure. A method for manufacturing the IC is also provided.
    Type: Application
    Filed: July 25, 2016
    Publication date: January 25, 2018
    Inventors: Min-Feng Kao, Dun-Nian Yaung, Hsing-Chih Lin, Jen-Cheng Liu, Kuan-Chieh Huang
  • Publication number: 20180019232
    Abstract: A light emitting component includes an epitaxial structure, an adhesive layer, a first reflective layer, a second reflective layer, a block layer, a first electrode and a second electrode. The epitaxial structure includes a substrate, a first semiconductor layer, a light emitting layer and a second semiconductor layer. The adhesive layer is disposed on the second semiconductor layer of the epitaxial structure. The first reflective layer is disposed on the adhesive layer. The second reflective layer is disposed on the first reflective layer and extended onto the adhesive layer. A projection area of the second reflective layer is larger than a projection area of the first reflective layer. The block layer is disposed on the second reflective layer. The first electrode is electrically connected to the first semiconductor layer. The second electrode is electrically connected to the second semiconductor layer.
    Type: Application
    Filed: September 25, 2017
    Publication date: January 18, 2018
    Applicant: Genesis Photonics Inc.
    Inventors: Yi-Ru Huang, Tung-Lin Chuang, Chih-Ming Shen, Sheng-Tsung Hsu, Kuan-Chieh Huang, Jing-En Huang
  • Patent number: 9859459
    Abstract: A method for manufacturing a light emitting unit is provided. A semiconductor structure including a plurality of light emitting dice separated from each other is provided. A molding compound is formed to encapsulate the light emitting dice. Each of the light emitting dice includes a light emitting element, a first electrode and a second electrode. A patterned metal layer is formed on the first electrodes and the second electrodes of the light emitting dice. A substrate is provided, where the molding compound is located between the substrate and the light emitting elements of the light emitting dice. A cutting process is performed to cut the semiconductor structure, the patterned metal layer, the molding compound and the substrate so as to define a light emitting unit with a series connection loop, a parallel connection loop or a series-parallel connection loop.
    Type: Grant
    Filed: December 3, 2015
    Date of Patent: January 2, 2018
    Assignee: Genesis Photonics Inc.
    Inventors: Shao-Ying Ting, Kuan-Chieh Huang, Jing-En Huang, Yi-Ru Huang, Sie-Jhan Wu, Long-Lin Ke
  • Patent number: 9831399
    Abstract: A light emitting component includes a light emitting unit, a molding compound and a wavelength converting layer. The light emitting unit has a forward light emitting surface. The molding compound covers the light emitting unit. The wavelength converting layer is disposed above the molding compound. The wavelength converting layer has a first surface and a second surface opposite to the first surface, wherein the first surface is located between the forward light emitting surface and the second surface, and at least one of the first and second surfaces is non-planar.
    Type: Grant
    Filed: May 30, 2016
    Date of Patent: November 28, 2017
    Assignee: Genesis Photonics Inc.
    Inventors: Kuan-Chieh Huang, Shao-Ying Ting, Jing-En Huang, Yi-Ru Huang