Patents by Inventor Kuang Liu

Kuang Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10499461
    Abstract: A thermal heat for integrated circuit die processing is described that includes a thermal barrier. In one example, the thermal head has a ceramic heater configured to carry an integrated circuit die, a metal base, and a thermal barrier between the heater and the base.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: December 3, 2019
    Assignee: Intel Corporation
    Inventors: Mohit Mamodia, Kyle Yazzie, Dingying Xu, Kuang Liu, Paul J. Diglio, Pramod Malatkar
  • Patent number: 10455685
    Abstract: An electronic device may include a circuit board, and the circuit board may include a dielectric material. A socket may be coupled to a first side of the circuit board, and the socket may be configured to receive a semiconductor package. A backing plate may be positioned on a second side of the circuit board. A spacer may be positioned between the backing plate and the circuit board. The spacer may alter the profile of the socket to provide a curved profile to the socket. The spacer may displace a portion of the socket in a first direction, for instance when the spacer is coupled between the backing plate and the circuit board.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: October 22, 2019
    Assignee: Intel Corporation
    Inventors: Steven A. Klein, Kuang Liu, Thomas A. Boyd, Luis Gil Rangel, Muffadal Mukadem, Shelby A. Ferguson, Francis Toth, Jr., Eric Buddrius, Ralph V. Miele, Sriram Srinivasan, Jeffory L. Smalley
  • Patent number: 10388784
    Abstract: A power chip and a transistor structure thereof are provided. The transistor structure includes a semiconductor substrate, a plurality of gate structures, a plurality of first doped regions and a second doped region. The gate structures are disposed on the semiconductor substrate. The first doped regions are formed respectively in a plurality of first areas surrounded by the gate structures. The second doped region is formed in a second area among the gate structures. Each of the gate structures is arranged in an enclosed ring, and the shape of each of the gate structures is octagon.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: August 20, 2019
    Assignee: Excelliance MOS Corporation
    Inventor: Chu-Kuang Liu
  • Publication number: 20190211295
    Abstract: A movable cell incubator contains: a body, a first lid, a second lid and an electric control unit. The body includes a first internal space, a refrigeration room, and an airtight culture room. The first lid airtightly covers the culture room, the second lid airtightly covers the refrigeration room, and the control unit includes a microprocessor, a power module, a digital/analog conversion module defined between a microprocessor and the power module, a heating module controlling temperature of the culture room, a cooling module supplying cold source to the refrigeration room, a peristaltic pump module, a flow sensing module, a CO2 detective supply module supplying CO2 to the culture room, and a setting display module exposing and fixed on the first lid, with the peristaltic pump module aseptically connected between cell culture media and cell culture bag by multiple conveying tubes.
    Type: Application
    Filed: March 19, 2019
    Publication date: July 11, 2019
    Inventor: LUN-KUANG LIU
  • Publication number: 20190044265
    Abstract: Apparatuses, systems and methods associated with connector design for mating with integrated circuit packages are disclosed herein. In embodiments, a connector for mating with an integrated circuit (IC) package may include a housing with a recess to receive a portion of the IC package and a contact coupled to the housing and that extends into the recess. The contact may include a main body that extends from the housing into the recess and a curved portion that extends from an end of the main body, wherein the curved portion loops back and contacts the main body. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: March 9, 2018
    Publication date: February 7, 2019
    Inventors: FEIFEI CHENG, EMAD AL-MOMANI, AHMET DURGUN, KUANG LIU
  • Publication number: 20180340142
    Abstract: A movable cell incubator contains: a body, a first lid, a second lid, and an electric control unit. The body includes a first internal space, a refrigeration room, and an airtight culture room. The first lid airtightly covers the culture room, the second lid airtightly covers the refrigeration room, and the control unit includes a microprocessor, a power module, a digital/analog conversion module defined between a microprocessor and the power module, a heating module controlling temperature of the culture room, a cooling module supplying cold source to the refrigeration room, a peristaltic pump module, a flow sensing module, a CO2 detective supply module supplying CO2 to the culture room, and a setting display module exposing and fixed on the first lid, with the peristaltic pump module aseptically connected between cell culture media and cell culture bag by multiple conveying tubes.
    Type: Application
    Filed: May 25, 2017
    Publication date: November 29, 2018
    Inventor: LUN-KUANG LIU
  • Patent number: 10044115
    Abstract: An apparatus comprises a cable connector including: a first connector body portion including a first plurality of electrical contacts arranged to contact electrical contacts of a first surface of an edge connector substrate; a second connector body portion separate from the first connector body portion and including a second plurality of electrical contacts arranged to oppose the first plurality of electrical contacts of the first connector body portion and to contact electrical contacts of a second surface of the edge connector substrate, wherein the first and second plurality of electrical contacts are electrically coupled to one or more cables; and a joining mechanism configured to join the first connector body portion and the second connector body portion together and to apply a bias force to the edge connector substrate when the edge connector substrate is arranged between the first connector body portion and the second connector body portion.
    Type: Grant
    Filed: December 23, 2015
    Date of Patent: August 7, 2018
    Assignee: Intel Corporation
    Inventors: Donald T. Tran, Gregorio Murtagian, Kuang Liu, Srikant Nekkanty, Feroz Mohammad, Karumbu Meyyappan, Hong Xie, Russell S. Aoki, Gaurav Chawla
  • Publication number: 20180212052
    Abstract: A power chip and a transistor structure thereof are provided. The transistor structure includes a semiconductor substrate, a plurality of gate structures, a plurality of first doped regions and a second doped region. The gate structures are disposed on the semiconductor substrate. The first doped regions are formed respectively in a plurality of first areas surrounded by the gate structures. The second doped region is formed in a second area among the gate structures. Each of the gate structures is arranged in an enclosed ring, and the shape of each of the gate structures is octagon.
    Type: Application
    Filed: March 10, 2017
    Publication date: July 26, 2018
    Applicant: Excelliance MOS Corporation
    Inventor: Chu-Kuang Liu
  • Patent number: 10010841
    Abstract: A methanol carbonylation system 10 includes an absorber tower 75 adapted for receiving a vent gas stream and removing methyl iodide therefrom with a scrubber solvent, the absorber tower being coupled to first and second scrubber solvent sources 16, 56 which are capable of supplying different first and second scrubber solvents. A switching system including valves 90, 92, 94, 96, 98 alternatively provides first or second scrubber solvents to the absorber tower and returns the used solvent and sorbed material to the carbonylation system to accommodate different operating modes.
    Type: Grant
    Filed: November 6, 2015
    Date of Patent: July 3, 2018
    Assignee: Celanese International Corporation
    Inventors: Raymond J. Zinobile, Tommy W. Doggett, Lun-kuang Liu
  • Patent number: 9941357
    Abstract: A power MOSFET includes a substrate, a semiconductor layer, a first gate, a second gate, a thermal oxide layer, a first CVD oxide layer, and a gate oxide layer. The semiconductor layer is formed on the substrate and has at least one trench. The first gate is located inside the trench. The second gate is located inside the trench on the first gate, wherein the second gate has a first portion and a second portion, and the second portion is located between the semiconductor layer and the first portion. The thermal oxide layer is located between the first gate and the semiconductor layer. The first CVD oxide layer is located between the first gate and the second gate. The gate oxide layer is generally located between the second gate and the semiconductor layer.
    Type: Grant
    Filed: June 14, 2016
    Date of Patent: April 10, 2018
    Assignee: Excelliance MOS Corporation
    Inventor: Chu-Kuang Liu
  • Publication number: 20180074548
    Abstract: A docking station for a mobile electronic device is provided. It utilizes a transmission unit and a release unit to control the positioning of a connection unit. The transmission unit includes a horizontal displacement member abutted against a floating cover for horizontal displacement upon a downward movement of the floating cover, and a pivot member mounted at the connection unit and connected to the horizontal displacement member, so that the connection unit can connect the mobile electronic device upon a downward movement of the floating cover. The release unit includes a swing arm connected with the pivot member and a button abutted against the swing arm. When the button is pressed, the swing arm is pushed to drive the connection unit to disengage from the mobile electronic device via the pivot member. Thus, the mobile electronic device can be removed.
    Type: Application
    Filed: January 9, 2017
    Publication date: March 15, 2018
    Inventors: Yu-Chen CHU, Kuo-Kuang LIU, Ming-Jen CHEN, Chang-Cheng LIN
  • Patent number: 9915977
    Abstract: A docking station for a mobile electronic device is provided. It utilizes a transmission unit and a release unit to control the positioning of a connection unit. The transmission unit includes a horizontal displacement member abutted against a floating cover for horizontal displacement upon a downward movement of the floating cover, and a pivot member mounted at the connection unit and connected to the horizontal displacement member, so that the connection unit can connect the mobile electronic device upon a downward movement of the floating cover. The release unit includes a swing arm connected with the pivot member and a button abutted against the swing arm. When the button is pressed, the swing arm is pushed to drive the connection unit to disengage from the mobile electronic device via the pivot member. Thus, the mobile electronic device can be removed.
    Type: Grant
    Filed: January 9, 2017
    Date of Patent: March 13, 2018
    Assignee: USI ELECTRONICS (SHENZHEN) CO., LTD.
    Inventors: Yu-Chen Chu, Kuo-Kuang Liu, Ming-Jen Chen, Chang-Cheng Lin
  • Patent number: 9857508
    Abstract: A color filter pattern including a plurality of color filters arranged in a pattern and the manufacturing method thereof are provided. By performing at least one two-stage exposure process to a color filter layer, the plurality of color filters are formed with a sharp profile.
    Type: Grant
    Filed: October 6, 2016
    Date of Patent: January 2, 2018
    Assignee: United Microelectronics Corp.
    Inventors: Hsin-Ting Tsai, Cheng-Hung Yu, Chin-Kuang Liu, Ming-Hsin Lee
  • Publication number: 20170338309
    Abstract: A power MOSFET includes a substrate, a semiconductor layer, a first gate, a second gate, a thermal oxide layer, a first CVD oxide layer, and a gate oxide layer. The semiconductor layer is formed on the substrate and has at least one trench. The first gate is located inside the trench. The second gate is located inside the trench on the first gate, wherein the second gate has a first portion and a second portion, and the second portion is located between the semiconductor layer and the first portion. The thermal oxide layer is located between the first gate and the semiconductor layer. The first CVD oxide layer is located between the first gate and the second gate. The gate oxide layer is generally located between the second gate and the semiconductor layer.
    Type: Application
    Filed: June 14, 2016
    Publication date: November 23, 2017
    Inventor: Chu-Kuang Liu
  • Publication number: 20170187147
    Abstract: An apparatus comprises a cable connector including: a first connector body portion including a first plurality of electrical contacts arranged to contact electrical contacts of a first surface of an edge connector substrate; a second connector body portion separate from the first connector body portion and including a second plurality of electrical contacts arranged to oppose the first plurality of electrical contacts of the first connector body portion and to contact electrical contacts of a second surface of the edge connector substrate, wherein the first and second plurality of electrical contacts are electrically coupled to one or more cables; and a joining mechanism configured to join the first connector body portion and the second connector body portion together and to apply a bias force to the edge connector substrate when the edge connector substrate is arranged between the first connector body portion and the second connector body portion.
    Type: Application
    Filed: December 23, 2015
    Publication date: June 29, 2017
    Inventors: Donald T. Tran, Gregorio Murtagian, Kuang Liu, Srikant Nekkanty, Feroz Mohammad, Karumbu Meyyappan, Hong Xie, Russell S. Aoki, Gaurav Chawla
  • Publication number: 20170186795
    Abstract: An image sensor is provided in the present invention. The image sensor includes a continuous microlens including a plurality of top sub lenses connected with one another and a plurality of bottom sub lenses disposed corresponding to the top sub lenses. The continuous microlens maybe used to enhance quantum efficiency. The top sub lens and the bottom sub lens condense light by two steps within a shorter distance and make the light focused on a sensing element, and the continuous microlens may be applied without the limitation about the size of the pixel region accordingly. Additionally, the sensitivity and the uniformity thereof may be enhanced because of the shorter distance between the bottom sub lens and the sensing element. A transmittance of a color filter layer disposed corresponding to the bottom sub lens may also be enhanced.
    Type: Application
    Filed: January 12, 2016
    Publication date: June 29, 2017
    Inventors: Hsin-Ting Tsai, Cheng-Hung Yu, Chin-Kuang Liu, Ming-Hsin Lee, Hung-Sheng Chang
  • Publication number: 20170176516
    Abstract: A thermal heat for integrated circuit die processing is described that includes a thermal barrier. In one example, the thermal head has a ceramic heater configured to carry an integrated circuit die, a metal base, and a thermal barrier between the heater and the base.
    Type: Application
    Filed: December 21, 2015
    Publication date: June 22, 2017
    Applicant: INTEL CORPORATION
    Inventors: Mohit Mamodia, Kyle Yazzie, Dingying David Xu, Kuang Liu, Paul J. Diglio, Pramod Malatkar
  • Patent number: 9653560
    Abstract: A method of fabricating a power metal oxide semiconductor field effect transistor (MOSFET) is provided, and the method includes forming a semiconductor layer on a substrate, forming at least one first trench in the semiconductor layer, forming a thermal oxide layer on a surface of the trench, forming a first gate in the first trench, forming a chemical vapor deposition (CVD) oxide layer on the first gate in the first trench, forming a mask layer on the CVD oxide layer in the first trench so as to form a second trench between the mask layer and the thermal oxide layer, and forming a second gate in the second trench.
    Type: Grant
    Filed: July 14, 2016
    Date of Patent: May 16, 2017
    Assignee: Excellence MOS Corporation
    Inventor: Chu-Kuang Liu
  • Patent number: 9603276
    Abstract: Some forms relate to an electronic assembly that includes a plurality of electronic package. The electronic assembly includes a frame and a first electronic package mounted on the frame. The first electronic package includes a first pin grid array. The electronic assembly further includes a second electronic package mounted on the frame. The second electronic package includes a second pin grid array. The electronic assembly further includes an actuation mechanism on the frame. The actuation mechanism is configured to move the first electronic package and the second electronic package relative to the frame during operation of the actuation mechanism.
    Type: Grant
    Filed: December 26, 2014
    Date of Patent: March 21, 2017
    Assignee: Intel Corporation
    Inventors: David J. Llapitan, Jeffory L. Smalley, Gaurav Chawla, Joshua D Heppner, Vijaykumar Krithivasan, Jonathan W. Thibado, Kuang Liu, Gregorio Murtagian
  • Publication number: 20170023712
    Abstract: A color filter pattern including a plurality of color filters arranged in a pattern and the manufacturing method thereof are provided. By performing at least one two-stage exposure process to a color filter layer, the plurality of color filters are formed with a sharp profile.
    Type: Application
    Filed: October 6, 2016
    Publication date: January 26, 2017
    Applicant: United Microelectronics Corp.
    Inventors: Hsin-Ting Tsai, Cheng-Hung Yu, Chin-Kuang Liu, Ming-Hsin Lee