Patents by Inventor Kumar Jain

Kumar Jain has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12143835
    Abstract: An acceptable coverage limit of a base station is identified by retrieving a list of cells that are served by a first base station. Grids are generated from the first base station to a predetermined threshold distance. A plurality of selected grids is identified between an acceptable coverage limit and a threshold distance. An average reference signal is determined from the plurality of selected grids. An evaluation is made regarding whether the first base station is the dominant cell in each of the selected grids. The number of grids the selected grids where the first base station is the dominant cell site is determined based on a dominant carrier threshold. A column of grids is determined where the first base station is not the dominant cell site. An acceptable coverage limit of the cell is determined based on the distance from the first base station and the column of grids.
    Type: Grant
    Filed: January 4, 2022
    Date of Patent: November 12, 2024
    Assignee: RAKUTEN SYMPHONY, INC.
    Inventors: Atul Singh Rajpoot, Sudeep Kumar Jain, Durgesh Rathore, Dharambir Bharti
  • Patent number: 12138110
    Abstract: An apparatus for performing a medical procedure is disclosed. The apparatus includes a sensor adapted to convert an ultrasonic signal incident thereon into an electrical signal; and a wireless transceiver configured to receive the electrical signal from the sensor, and to transmit the electrical signal to a wireless receiver remotely located from the apparatus.
    Type: Grant
    Filed: August 5, 2022
    Date of Patent: November 12, 2024
    Assignee: KONINKLIJKE PHILIPS N.V.
    Inventors: Kunal Vaidya, Ramon Quido Erkamp, Shyam Bharat, Ameet Kumar Jain, Douglas Allen Stanton, Francois Guy Gerard Marie Vignon
  • Publication number: 20240371436
    Abstract: Systems and methods are provided for limiting a negative bit line voltage in a SRAM cell. A voltage limiter circuit may be implemented in a write driver to control the magnitude of negative voltage imposed on a bit line. The voltage limiter circuit can produce the required magnitude of negative bit line voltage at lower operating voltage levels. The voltage limiter circuit can also limit the magnitude of negative bit line voltage to not exceed a predetermined value. The reduction of the magnitude of the negative bit line voltage can reduce the active power of a SRAM cell.
    Type: Application
    Filed: July 15, 2024
    Publication date: November 7, 2024
    Inventors: Sanjeev Kumar Jain, Atul Katoch
  • Publication number: 20240371421
    Abstract: Systems and methods are provided a memory circuit that provides multiple clock signals to a local clock driver. One of the clock signals may be faster than the other and, as a result, at least one transistor of the local clock driver may be turned on early to improve the delay of the rising edge, the falling edge, or both edges of the slower clock signal. The local clock driver may include a first transistor electrically connected to the NAND gate and a second transistor electrically connected to the NOR gate. As a result of the additional, faster clock signal, a reduction of the clock to word line time in the memory circuit can be achieved.
    Type: Application
    Filed: October 17, 2023
    Publication date: November 7, 2024
    Inventors: Sanjeev Kumar Jain, Atul Katoch
  • Publication number: 20240372722
    Abstract: Disclosed herein is a social media platform profile identification feature. Social media profiles are identified by digital objects instead of or in addition to more traditional indexing methods such as real names or screen names. Associating a digital object as a Social Media avatar, or as a profile detail enables the social media platform to index the digital object and enable users to search for the subject user with the digital object or descriptions thereof. A digital object generator builds unique digital objects based on the user specific input. The unique digital objects are part of a graphic presentation to users.
    Type: Application
    Filed: May 13, 2024
    Publication date: November 7, 2024
    Inventors: Naveen Kumar Jain, Riccardo Paolo Spagni
  • Publication number: 20240360774
    Abstract: A system includes an exhaust diffuser system having an axial-radial diffuser and a transition duct. The axial-radial diffuser includes an inlet, an outlet, an axial diffuser portion between the inlet and the outlet, and a radial diffuser portion between the axial diffuser portion and the outlet, wherein the inlet is configured to couple to a gas turbine system. The transition duct is coupled to the axial-radial diffuser, wherein the outlet is disposed inside of an intake portion of the transition duct, and the transition duct includes a discharge portion configured to couple to a heat recovery steam generator (HRSG).
    Type: Application
    Filed: June 30, 2023
    Publication date: October 31, 2024
    Inventors: Felix Abraham Madukkakuzhy, Joshy John, Bala Muralidhar Singh Bahadur, Sanjeev Kumar Jain
  • Patent number: 12124556
    Abstract: Embodiments of the disclosure provide a method for enhancing standard authentication systems to include risk-based decisions. Risk-based decisions can be selectively implemented within existing authentication systems to strategically modify and supplement security if an unacceptable risk is detected. Embodiments capture information pertaining to a user and user device. Information is stored to create a profile for the user and user device. A comparison between the stored information and live data can be performed within authentication systems to optimize security. If the results of the comparison demonstrate the presence of an acceptable risk, then the need for subsequent authentication can be reduced or eliminated, which improves a user experience.
    Type: Grant
    Filed: July 24, 2023
    Date of Patent: October 22, 2024
    Assignee: Aetna Inc.
    Inventors: Salil Kumar Jain, Abbie Barbir, Derek Swift
  • Patent number: 12125811
    Abstract: An embodiment semiconductor structure includes a metal layer. The semiconductor structure also includes a redistribution layer (RDL) structure including an RDL platform and a plurality of RDL pillars disposed between the RDL platform and the metal layer. Additionally, the semiconductor structure includes an under-bump metal (UBM) layer disposed on the RDL platform and a solder bump disposed on the UBM layer, where the UBM layer, the RDL platform, and the RDL pillars form an electrical connection between the solder bump and the metal layer.
    Type: Grant
    Filed: June 15, 2018
    Date of Patent: October 22, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Indumini W. Ranmuthu, Manoj Kumar Jain, Tracy Scott Paulsen
  • Patent number: 12124683
    Abstract: Content creation techniques are described that leverage content analytics to provide insight and guidance as part of content creation. To do so, content features are extracted by a content analytics system from a plurality of content and used by the content analytics system as a basis to generate a content dataset. Event data is also collected by the content analytics system from an event data source. Event data describes user interaction with respective items of content, including subsequent activities in both online and physical environments. The event data is then used to generate an event dataset. An analytics user interface is then generated by the content analytics system using the content dataset and the event dataset and is usable to guide subsequent content creation and editing.
    Type: Grant
    Filed: January 10, 2024
    Date of Patent: October 22, 2024
    Assignee: Adobe Inc.
    Inventors: Yaman Kumar, Somesh Singh, William Brandon George, Timothy Chia-chi Liu, Suman Basetty, Pranjal Prasoon, Nikaash Puri, Mihir Naware, Mihai Corlan, Joshua Marshall Butikofer, Abhinav Chauhan, Kumar Mrityunjay Singh, James Patrick O'Reilly, Hyman Chung, Lauren Dest, Clinton Hansen Goudie-Nice, Brandon John Pack, Balaji Krishnamurthy, Kunal Kumar Jain, Alexander Klimetschek, Matthew William Rozen
  • Publication number: 20240345977
    Abstract: A 3D device includes a first semiconductor chip and a second semiconductor chip stacked vertically. The first semiconductor chip includes a first plurality of tiles. The second semiconductor chip includes a second plurality of tiles. A bus electrically couples each of the first plurality of tiles to a corresponding one of the second plurality of tiles based on assignments of the first plurality of tiles and the second plurality of tiles to tile-to-tile pairs that define a minimized sum of bus delays among each possible tile-to-tile pairs. In each tile-to-tile pair, a net electrically couples each of a first plurality of pins to a corresponding one of a second plurality of pins based on assignments of the first plurality of pins to the second plurality of pins that define a minimized sum of net delays among each possible pin-to-pin pairs.
    Type: Application
    Filed: April 14, 2023
    Publication date: October 17, 2024
    Inventors: Dinesh D. GAITONDE, Aashish TRIPATHI, Ashit DEBNATH, Davis Boyd MOORE, Maithilee Rajendra KULKARNI, Abhishek Kumar JAIN
  • Publication number: 20240345707
    Abstract: Content creation techniques are described that leverage content analytics to provide insight and guidance as part of content creation. To do so, content features are extracted by a content analytics system from a plurality of content and used by the content analytics system as a basis to generate a content dataset. Event data is also collected by the content analytics system from an event data source. Event data describes user interaction with respective items of content, including subsequent activities in both online and physical environments. The event data is then used to generate an event dataset. An analytics user interface is then generated by the content analytics system using the content dataset and the event dataset and is usable to guide subsequent content creation and editing.
    Type: Application
    Filed: January 10, 2024
    Publication date: October 17, 2024
    Applicant: Adobe Inc.
    Inventors: Yaman Kumar, Somesh Singh, William Brandon George, Timothy Chia-chi Liu, Suman Basetty, Pranjal Prasoon, Nikaash Puri, Mihir Naware, Mihai Corlan, Joshua Marshall Butikofer, Abhinav Chauhan, Kumar Mrityunjay Singh, James Patrick O'Reilly, Hyman Chung, Lauren Dest, Clinton Hansen Goudie-Nice, Brandon John Pack, Balaji Krishnamurthy, Kunal Kumar Jain, Alexander Klimetschek, Matthew William Rozen
  • Patent number: 12118546
    Abstract: Machine learning techniques are disclosed for rebuilding transactions to predict cash position. In one aspect a method includes obtaining data for an original transaction, classifying the original transaction into a class of multiple classes based on the data, predicting first tranche delay days for the original transaction based on the class and the data, predicting a tranche count for the original transaction based on the class and the data, predicting a tranche interval for the original transaction based on the class and the data; and rebuilding the original transaction as one or more future transactions based on the class, the first tranche delay days, the tranche count, and tranche interval. Each of the one or more future transactions comprise an updated amount of the original transaction, an updated date upon which the original transaction is anticipated, or both.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: October 15, 2024
    Assignee: ORACLE FINANCIAL SERVICES SOFTWARE LIMITED
    Inventors: Mridul Kumar Nath, Prajwal Patil, Rupa Satyabodha Kolhar, Anshul Kumar Jain
  • Publication number: 20240339141
    Abstract: Devices, circuits, and methods are provided. A circuit comprises a tracking word line circuit that is configured to receive an internal clock signal, a turbo signal, and a read enable signal, and to generate a first tracking reading signal and a first tracking writing signal in response to the internal clock signal the turbo signal, and the write enable signal. The circuit also comprises a tracking bit line circuit configured to receive the first tracking reading signal and the first tracking writing signal, wherein the tracking bit line circuit is configured to generate a tracking bit line signal in response to the first tracking reading signal and the first tracking writing signal, wherein the tracking word line circuit is configured to generate a reset signal in response to the tracking bit line signal and transmit the reset signal to the clock generator.
    Type: Application
    Filed: June 13, 2023
    Publication date: October 10, 2024
    Inventors: Sanjeev Kumar Jain, Atul Katoch
  • Publication number: 20240339140
    Abstract: The present disclosure provides a memory device, which includes a memory array, a read-clock generation circuit, and a local input/output circuit. The read-clock generation circuit receives a sense amplifier enable signal, a first sense amplifier pre-charge signal, and a latched write enable signal to generate a first read enable signal. The local input/output circuit includes multiple pairs of column-address pass gates, and a pair of read pass gates. The plurality of pairs of column-address pass gates are configured to receive data from a bit-line pair of the memory cells in a row selected by an address signal. The pair of read pass gates connects a read bit-line pair to the bit-line pair in response to the first read enable signal being in a low-logic state. The first read enable signal is de-asserted after the read bit-line pair connected to the pair of read pass gates are pre-charged.
    Type: Application
    Filed: April 7, 2023
    Publication date: October 10, 2024
    Inventors: SANJEEV KUMAR JAIN, ATUL KATOCH
  • Patent number: 12111795
    Abstract: A method for managing replication of cloned files is provided. Embodiments include determining, at a source system, that a first file has been cloned to create a second file. Embodiments include sending, from the source system to a replica system, an address of the first extent and an indication that a status of the first extent has changed from non-cloned to cloned. Embodiments include changing, at the replica system, a status of a second extent associated with a replica of the first file on the replica system from non-cloned to cloned and creating a mapping of the address of the first extent to an address of the second extent on the replica system. Embodiments include creating, at the replica system, a replica of the second file comprising a reference to the address of the second extent on the replica system.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: October 8, 2024
    Assignee: VMware LLC
    Inventors: Abhay Kumar Jain, Sriram Patil, Junlong Gao, Wenguang Wang
  • Publication number: 20240329885
    Abstract: Methods, systems, and devices related to signal development caching in a memory device are described. In one example, a memory device in accordance with the described techniques may include a memory array, a sense amplifier array, and a signal development cache configured to store signals (e.g., cache signals, signal states) associated with logic states (e.g., memory states) that may be stored at the memory array (e.g., according to various read or write operations). The memory device may also include a controller configured to determine whether data associated with an address of the memory array is stored in one or more cache blocks of the signal development cache. As an example, the memory device may determine whether the data is stored in one or more cache blocks of the signal development cache based on mapping information associated with the address of the memory array.
    Type: Application
    Filed: April 12, 2024
    Publication date: October 3, 2024
    Inventors: Dmitri A. Yudanov, Shanky Kumar Jain
  • Patent number: 12101260
    Abstract: When a measure of buffer space queued for garbage collection in a network device grows beyond a certain threshold, one or more actions are taken to decreasing an enqueue rate of certain classes of traffic, such as of multicast traffic, whose reception may have caused and/or be likely to exacerbate garbage-collection-related performance issues. When the amount of buffer space queued for garbage collection shrinks to an acceptable level, these one or more actions may be reversed. In an embodiment, to more optimally handle multi-destination traffic, queue admission control logic for high-priority multi-destination data units, such as mirrored traffic, may be performed for each destination of the data units prior to linking the data units to a replication queue. If a high-priority multi-destination data unit is admitted to any queue, the high-priority multi-destination data unit can no longer be dropped, and is linked to a replication queue for replication.
    Type: Grant
    Filed: February 10, 2023
    Date of Patent: September 24, 2024
    Assignee: Innovium, Inc.
    Inventors: William Brad Matthews, Puneet Agarwal, Bruce Hui Kwan, Ajit Kumar Jain
  • Publication number: 20240314424
    Abstract: A device and method are provided for providing a function related to a camera in an electronic device. A method includes acquiring, via a first camera of the electronic device, a plurality of first images; acquiring, via a second camera of the electronic device, one or more second images; generating a plurality of image contents based on at least one of the plurality of first images or the one or more second images; and outputting the plurality of image contents at respective regions of a display of the electronic device.
    Type: Application
    Filed: May 24, 2024
    Publication date: September 19, 2024
    Inventors: Sunho MOON, Yeonjong Bong, Ramakrishnan Srinivasakannan, Gaurav Kumar Jain, Girish Kulkarni, Karthikeyan Somanathan, Sachin Dev, Sudha Velusamy, Uison Yoon, Jehan Yoon, Cheolyong Jeon, Kihuk Lee
  • Publication number: 20240314583
    Abstract: Embodiments herein provide a method for prioritizing disoriented cells in a wireless network by an electronic device. The method includes determining a morphology factor of each disoriented cell of a plurality of disoriented cells. Further, the method includes determining a cell type of each disoriented cell of the plurality of disoriented cells based on the morphology factor of each disoriented cell of the plurality of disoriented cells. Further, the method includes determining a PRB utilization of each disoriented cell of the plurality of disoriented cells. Further, the method includes determining a number of RRC connected users of each disoriented cell of the plurality of disoriented cells. Further, the method includes determining a priority for each disoriented cell of the plurality of disoriented cells based on the morphology factor, the cell type, the PRB utilization, and the RRC connected users.
    Type: Application
    Filed: December 28, 2022
    Publication date: September 19, 2024
    Applicant: RAKUTEN SYMPHONY INDIA PRIVATE LIMITED
    Inventors: Durgesh RATHORE, Atul RAJPOOT, Sudeep Kumar JAIN, Nilesh BANKAR
  • Patent number: 12092965
    Abstract: A defect prediction method for a device manufacturing process involving processing one or more patterns onto a substrate, the method including: determining values of one or more processing parameters under which the one or more patterns are processed; and determining or predicting, using the values of the one or more processing parameters, an existence, a probability of existence, a characteristic, and/or a combination selected from the foregoing, of a defect resulting from production of the one or more patterns with the device manufacturing process.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: September 17, 2024
    Assignee: ASML NETHERLANDS B.V.
    Inventors: Venugopal Vellanki, Vivek Kumar Jain, Stefan Hunsche