Abstract: Provided are an adhesive tape attaching device for cell and a manufacturing method for the adhesive tape attaching device for cell. The adhesive tape attaching device for cell includes a tooling plate, an adhesive tape clamping and pulling mechanism, an adhesive tape cutting mechanism, an adhesive tape attaching mechanism, and a driving mechanism. The tooling plate is for carrying a cell; the adhesive tape clamping and pulling mechanism is configured to clamp an adhesive tape and drive the adhesive tape to move in a horizontal direction approaching the cell; the adhesive tape cutting mechanism is disposed in a transportation direction of the adhesive tape, the adhesive tape cutting mechanism is located upstream of the tooling plate, and the adhesive tape cutting mechanism is configured to cut the adhesive tape into adhesive tape segments; the adhesive tape attaching mechanism is configured to attach the adhesive tape segment onto a to-be-attached region.

Abstract: Methods and semiconductor devices are provided. A method includes determining a location of a polyimide opening (PIO) corresponding to an under-bump metallization (UBM) feature in a die. The die includes a substrate and an interconnect structure over the substrate. The method also includes determining a location of a stacked via structure in the interconnect structure based on the location of the PIO. The method further includes forming, in the interconnect structure, the stacked via structure comprising at most three stacked contact vias at the location of the PIO.

Abstract: A power device includes a mainboard and a power conversion module. The mainboard includes a first side and a third side opposite each other along a first direction, a second side and a fourth side opposite each other along a second direction, the first direction is perpendicular to the second direction. The power conversion module includes a primary-side circuit board and a secondary-side module. The secondary-side module includes a secondary-side circuit board, and the primary-side circuit board, the mainboard and the secondary-side circuit board being electrically connected, the primary-side circuit board and the secondary-side circuit board are spatially separated. The secondary-side module further includes secondary-side element and a first magnetic core element, wherein the secondary-side element and the first magnetic core element are disposed on the secondary-side circuit board along a third direction perpendicular to the first direction and the second direction.

Abstract: A filament forming method includes: performing first stage to apply first bias including gate and drain voltages to a resistive memory unit plural times until read current reaches first saturating state, latching read current in first saturating state as saturating read current, determining whether rate of increase of saturating read current is less than first threshold value; when rate of increase of saturating read current is not less than first threshold value, performing second stage to apply second bias, by increasing gate voltage and decreasing drain voltage, to the resistive memory unit plural times until read current reaches second saturating state, latching read current in second saturating state as saturating read current and determining whether rate of increase of saturating read current is less than first threshold value; finishing the method when rate of increase of saturating read current is less than first threshold value and saturating read current reaches target current value.

Abstract: An antenna structure with wide radiation bandwidth in a reduced physical space includes a metallic housing, a first feed portion, and a second feed portion. The metallic housing includes a metallic side frame and a metallic back board. The metallic side frame defines a slot, and first and second gaps. The metallic side frame between the first gap and one end of the slot forms a first radiation portion. The second gap divides the first radiation portion into first and second radiation sections. The first feed portion feeds current and signal to the first radiation section, and the first radiation section works in a GPS mode and a WIFI 2.4 GHz mode. The second feed portion feeds current and signal to the second radiation section, and the second radiation section works in a WIFI 5 GHz mode.

Abstract: A resistive memory apparatus including a memory cell array, at least one dummy transistor and a control circuit is provided. The memory cell array includes a plurality of memory cells. Each of the memory cells includes a resistive switching element. The dummy transistor is electrically isolated from the resistive switching element. The control circuit is coupled to the memory cell array and the dummy transistor. The control circuit is configured to provide a first bit line voltage, a source line voltage and a word line voltage to the dummy transistor to drive the dummy transistor to output a saturation current. The control circuit is further configured to determine a value of a second bit line voltage for driving the memory cells according to the saturation current. In addition, an operating method and a memory cell array of the resistive memory apparatus are also provided.

Abstract: Positive reference spiked in collected sample for use in qualitatively and quantitatively detecting viral RNA.

Abstract: Disclosed are a method and device for evaluating damage caused by secondary stress to a vacuum vessel, a terminal device, and a medium, to perform following steps: obtaining secondary stress of a vacuum vessel that passes a primary-stress failure evaluation; obtaining structural damage parameters of the vacuum vessel when determining, based on evaluation parameters for the primary-stress failure evaluation of the vacuum vessel and the obtained secondary stress, that the vacuum vessel meets a precondition for a progressive deformation; and determining, based on the obtained structural damage parameters, whether the vacuum vessel meeting the precondition for the progressive deformation experiences structural damage due to the progressive deformation. In this way, a vacuum vessel of a nuclear fusion reactor can be evaluated based on damage caused by the secondary stress.

Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be a UE. In certain configurations, the UE enters a first radio resource control (RRC) connection with a first base station of a first network. The UE receives, from the first base station, an indication that enables the UE to send a first request for deactivating or releasing resources used for communications with the first base station. In response to a determination to enter a second RRC connection with a second base station of a second network, the UE sends, to the first base station, the first request for deactivating or releasing the resources. The UE enters the second RRC connection with the second base station while maintaining the first RRC connection with the first base station.

Abstract: A package substrate is provided and includes a core board body and a first circuit structure and a second circuit structure disposed on opposite sides of the core board body, where the number of wiring layers of the second circuit structure is different from the number of wiring layers of the first circuit structure, so that the package substrate is asymmetrical. The first circuit structure and the second circuit structure are designed according to the thickness and coefficient of thermal expansion of the first dielectric layer of the first circuit structure and the second dielectric layer of the second circuit structure, so as to prevent the problem of warping from occurring to the package substrate.

Abstract: Semiconductor structure and methods of forming the same are provided. An exemplary method includes receiving a workpiece including a magnetic tunneling junction (MTJ) and a conductive capping layer disposed on the MTJ, depositing a first dielectric layer over the workpiece, performing a first planarization process to the first dielectric layer, and after the performing of the first planarization process, patterning the first dielectric layer to form an opening exposing a top surface of the conductive capping layer, selectively removing the conductive capping layer. The method also includes depositing an electrode layer to fill the opening and performing a second planarization process to the workpiece such that a top surface of the electrode layer and a top surface of the first dielectric layer are coplanar.

Abstract: A memory device and a method for manufacturing the memory device are provided. The memory device includes a stack and a plurality of memory strings. The stack is disposed on the substrate, and the stack includes a plurality of conductive layers and a plurality of insulating layers alternately stacked. The memory strings pass through the stack along a first direction, wherein a first memory string in the memory strings includes a first conductive pillar and a second conductive pillar, a channel layer, and a memory structure. The first conductive pillar and the second conductive pillar respectively extend along the first direction and are separated from each other. The channel layer is disposed between the first conductive pillar and the second conductive pillar. The memory structure surrounds the second conductive pillar, and the memory structure includes a resistive memory material.

Abstract: The present invention discloses a Fe—Al-based metal porous membrane and a preparation method thereof, which relate to the technical field of industrial gas-solid and liquid-solid separation and purification, and mainly address problems in the prior art, such as cracking-prone and peeling of a membrane layer of an existing Fe—Al-based metal porous membrane during its preparation and use. The preparation method of the present invention comprises the steps of: adding a Fe—Al-based metal powder and a metal fiber powder into an organic-additive-added water-based solvent, and mixing them into a slurry; casting the slurry, through a casting machine, to form a membrane green body on a metal substrate layer, and letting it dry; and placing the dried membrane green body in a sintering furnace, to remove organic substances and perform high-temperature sintering and predetermined-temperature reaction synthesis.

Abstract: A pipeline (180) provided with a silencing structure, the pipeline comprising a pipe (150) and a silencing structure (100). The pipe (150) has a uniform diameter. The silencing structure (100) comprises a main silencing pipe (210) and a baffle (220). The baffle (220) is disposed around the main silencing pipe (210) and is connected on the main silencing pipe (210), and the baffle (220) comprises an opposite first side and second side; the main silencing pipe (210) extends on the first side and/or the second side of the baffle (220); the main silencing pipe (210) of the silencing structure (100) is disposed in the pipe (150) and is connected to the pipe (150) by means of the baffle (220); and the baffle (220) is configured to be capable of stopping a fluid from flowing through the baffle (220) from the space between the pipe (150) and the main silencing pipe (210).

Abstract: A semiconductor package is disclosed. The semiconductor package comprises: a metal shim, a package substrate attached onto a front side of the metal shim, wherein the package substrate comprises an opening that passes therethough; one or more electronic components mounted on the package substrate; an encapsulant layer partially formed on the package substrate to expose a region of the package substrate and the opening of the package substrate, wherein the encapsulant layer encapsulates the one or more electronic components on the package substrate; a first connector mounted in the exposed region of the package substrate; a second connector mounted in the encapsulant layer and on the package substrate; and a magnet mounted in the opening of the package substrate and extending from the metal shim through the package substrate and the encapsulant layer.

Abstract: A golf club setting rack has a first fixing portion, a second fixing portion, a first cross structure, and a second cross structure. The first fixing portion and the second fixing portion are mounted on the opening frame of the golf bag. The first cross structure and the second cross structure are securely mounted on the first fixing portion and the second fixing portion. Each one of the first cross structure and the second cross structure has multiple recesses. The recesses of the first cross structure correspond to the first row compartments of the opening frame in location; the recesses of the second cross structure correspond to the second row compartments of the opening frame in location. Therefore, when multiple clubs are stored in the compartments of the golf bag, heads of the clubs may be received and constrained in the recesses of the golf club setting rack.

Abstract: The invention discloses a method for forming a fungi fermentation product containing N-acetylglucosamine. The fungi fermentation product containing N-acetylglucosamine can convert cancer cells into normal cells through a mesenchymal epithelial transition mechanism. The method uses fungi as a starting material which together with a Cordyceps-related fungus is fermented to form a fermentation product which induces a mesenchymal epithelial transition to convert cancer cells into normal cells. The fungi cell wall contains chitin. The fermentation liquid is produced by fermentation of Cordyceps with chitin as the substrate. The main product is N-acetylglucosamine confirmed by an HPLC analysis. According to the experimental data, the fermentation product of N-acetylglucosamine converts cancer cells into epithelial cells that contain E-cadherin and has a square shape.

Abstract: A manufacturing method of a package substrate is provided, the manufacturing method includes forming a first circuit layer on a first metal layer; forming a dielectric layer on the first metal layer and the first circuit layer; forming a second metal layer on the dielectric layer; forming a plurality of conductive blind vias in the dielectric layer and forming a second circuit layer on the second metal layer, where the plurality of conductive blind vias are electrically connected to the first circuit layer and the second circuit layer; and removing the first metal layer and a portion of the second metal layer simultaneously. Therefore, in the manufacturing method, the first metal layer and the second metal layer can be removed by one etching process, such that the time for manufacturing the package substrate can be greatly reduced to increase production quantity.