Patents by Inventor Kun-Hsien Lin

Kun-Hsien Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12665415
    Abstract: An electrostatic discharge protection device includes a clamping bipolar junction transistor and at least one electrostatic discharge circuit coupled between a first-voltage rail and a second-voltage rail. The electrostatic discharge circuit includes a silicon-controlled rectifier and a diode. The anode and the cathode of the silicon-controlled rectifier are respectively coupled to an I/O port and the first-voltage rail. The cathode of the diode is coupled to the anode of the silicon-controlled rectifier and the I/O port. The anode of the diode is coupled to the second-voltage rail. The absolute value of the reverse breakdown voltage of the diode is greater than the absolute value of the anode-to-cathode trigger voltage of the silicon-controlled rectifier, which is greater than the absolute value of the trigger voltage of the clamping bipolar junction transistor.
    Type: Grant
    Filed: May 14, 2024
    Date of Patent: June 23, 2026
    Assignee: AMAZING MICROELECTRONIC CORP.
    Inventors: Zi-Ping Chen, Kun-Hsien Lin, Sin-Ping Huang, Tun-Chih Yang
  • Publication number: 20260129976
    Abstract: An electrostatic discharge protection device includes a diode, a voltage clamping component, an electronic component, a first pin, and a second pin. The diode includes a first doped area of a first conductivity type and a second doped area of a second conductivity type opposite to the first conductivity type. The voltage clamping component is electrically connected to the first doped area. The electronic component includes a first region of the first conductivity type, a second region of the second conductivity type, a third region of the first conductivity type, and a fourth region of the second conductivity type. The first region is electrically connected to the second doped area. The second region is electrically connected to the first doped area and the voltage clamping component. The fourth region is electrically connected to the voltage clamping component.
    Type: Application
    Filed: November 6, 2024
    Publication date: May 7, 2026
    Applicant: AMAZING MICROELECTRONIC CORP.
    Inventors: Chih-Wei CHEN, Kuan-Yu LIN, Kun-Hsien LIN
  • Publication number: 20260033011
    Abstract: A transient voltage suppression device includes at least one N-type lightly-doped structure, a first P-type well, a second P-type well, a first N-type heavily-doped area, and a second N-type heavily-doped area. The first P-type well and the second P-type well are formed in the N-type lightly-doped structure. The first N-type heavily-doped area and the second N-type heavily-doped area are respectively formed in the first P-type well and the second P-type well. The doping concentration of the first P-type well is higher than that of the second P-type well. The first P-type well and the second P-type well can be replaced with P-type lightly-doped wells respectively having P-type heavily-doped areas under the N-type heavily-doped areas.
    Type: Application
    Filed: September 26, 2025
    Publication date: January 29, 2026
    Applicant: AMAZING MICROELECTRONIC CORP.
    Inventors: Chih-Wei CHEN, Kuan-Yu LIN, Mei-Lian FAN, Kun-Hsien LIN
  • Patent number: 12510565
    Abstract: A method for producing a probe card comprises the steps of: providing a carrier board, wherein a surface of the carrier board has at least one probe guiding portion; and generating a probe on the probe guiding portion by performing additive manufacturing with a conductive material directly on the at least one probe guiding portion to generate the probe, wherein the additive manufacturing comprises directly layering the conductive material on the probe guiding portion.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: December 30, 2025
    Assignee: EXADDON AG
    Inventors: Kun-Hsien Lin, Edgar Hepp, Wabe Koelmans, Patrik Schuerch
  • Publication number: 20250357754
    Abstract: An electrostatic discharge protection device includes a clamping bipolar junction transistor and at least one electrostatic discharge circuit coupled between a first-voltage rail and a second-voltage rail. The electrostatic discharge circuit includes a silicon-controlled rectifier and a diode. The anode and the cathode of the silicon-controlled rectifier are respectively coupled to an I/O port and the first-voltage rail. The cathode of the diode is coupled to the anode of the silicon-controlled rectifier and the I/O port. The anode of the diode is coupled to the second-voltage rail. The absolute value of the reverse breakdown voltage of the diode is greater than the absolute value of the anode-to-cathode trigger voltage of the silicon-controlled rectifier, which is greater than the absolute value of the trigger voltage of the clamping bipolar junction transistor.
    Type: Application
    Filed: May 14, 2024
    Publication date: November 20, 2025
    Applicant: AMAZING MICROELECTRONIC CORP.
    Inventors: Zi-Ping CHEN, Kun-Hsien LIN, Sin-Ping HUANG, Tun-Chih YANG
  • Patent number: 12471383
    Abstract: A transient voltage suppression device includes at least one N-type lightly-doped structure, a first P-type well, a second P-type well, a first N-type heavily-doped area, and a second N-type heavily-doped area. The first P-type well and the second P-type well are formed in the N-type lightly-doped structure. The first N-type heavily-doped area and the second N-type heavily-doped area are respectively formed in the first P-type well and the second P-type well. The doping concentration of the first P-type well is higher than that of the second P-type well. The first P-type well and the second P-type well can be replaced with P-type lightly-doped wells respectively having P-type heavily-doped areas under the N-type heavily-doped areas.
    Type: Grant
    Filed: January 18, 2023
    Date of Patent: November 11, 2025
    Assignee: AMAZING MICROELECTRONIC CORP.
    Inventors: Chih-Wei Chen, Kuan-Yu Lin, Mei-Lian Fan, Kun-Hsien Lin
  • Publication number: 20250241069
    Abstract: A bipolar junction transistor with adjustable gain is provided, including a semiconductor substrate and doped layer of a first conductivity type, a doped well region of a second conductivity type and a plurality of heavily doped regions. At least one detection circuit is provided with an input voltage and operable to generate an output voltage for a conducting layer to receive, such that current paths generated in the transistor can be determined when the input voltage varies under different operating conditions, including a normal operating mode, a positive and a negative surged operating mode. When a transient event takes place, the bipolar junction transistor is characterized by having a higher gain than it is operating in the normal mode. The proposed invention achieves in integrating the unidirectional and bidirectional electrical characteristics in the disclosed bipolar junction transistor structure by employing the detection circuit such that adjustable gain is obtained.
    Type: Application
    Filed: January 19, 2024
    Publication date: July 24, 2025
    Applicant: AMAZING MICROELECTRONIC CORP.
    Inventors: Chih-Ting YEH, Sung-Chih HUANG, Che-Hao CHUANG, Kun-Hsien LIN
  • Publication number: 20250107245
    Abstract: An electrostatic discharge protection device includes a P-type substrate, an N-type well, a first P-type heavily-doped area, an N-type doped area, and a first N-type heavily-doped area. The N-type well is formed in the P-type substrate. The first P-type heavily-doped area is formed in the N-type well. The N-type doped area and the first N-type heavily-doped area are formed in the P-type substrate. The N-type doped area is coupled to the N-type well through an external conductive wire decoupled to the first P-type heavily-doped area. Alternatively, the P-type substrate and the N-type well are respectively replaced with an N-type substrate and a P-type well.
    Type: Application
    Filed: September 26, 2023
    Publication date: March 27, 2025
    Applicant: AMAZING MICROELECTRONIC CORP.
    Inventors: Chih-Wei CHEN, Che-Hao CHUANG, Kun-Hsien LIN
  • Patent number: 12248019
    Abstract: A diode test module and method applicable to the diode test module are provided. A substrate having first conductivity type and an epitaxial layer having second conductivity type on the substrate are formed. A well region having first conductivity type is formed in the epitaxial layer. A first and second heavily doped region having second conductivity type are theoretically formed in the well and connected to a first and second I/O terminal, respectively. Isolation trench is formed there in between for electrical isolation. A monitor cell comprising a third and fourth heavily doped region is provided in a current conduction path between the first and second I/O terminal when inputting an operation voltage. By employing the monitor cell, the invention achieves to determine if the well region is missing by measuring whether a leakage current is generated without additional testing equipment and time for conventional capacitance measurements.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: March 11, 2025
    Assignee: AMAZING MICROELECTRONIC CORP.
    Inventors: Chih-Ting Yeh, Sung Chih Huang, Kun-Hsien Lin, Che-Hao Chuang
  • Patent number: 12136622
    Abstract: A bidirectional electrostatic discharge protection device includes a first transient voltage suppressor chip, a second transient voltage suppressor chip, a first conductive wire, and a second conductive wire. The first transient voltage suppressor chip includes a first diode and a first bipolar junction transistor. The first diode and the first bipolar junction transistor are electrically connected to a first pin. The second transient voltage suppressor chip includes a second diode and a second bipolar junction transistor. The second diode and the second bipolar junction transistor are electrically connected to a second pin. The first conductive wire is electrically connected between the first diode and the second bipolar junction transistor. The second conductive wire is electrically connected between the second diode and the first bipolar junction transistor.
    Type: Grant
    Filed: January 3, 2022
    Date of Patent: November 5, 2024
    Assignee: Amazing Microelectronic Corp.
    Inventors: Tun-Chih Yang, Zi-Ping Chen, Kun-Hsien Lin
  • Patent number: 12136621
    Abstract: A bidirectional electrostatic discharge protection device includes at least one bipolar junction transistor and at least one silicon-controlled rectifier. The silicon-controlled rectifier is coupled to the bipolar junction transistor in series. The absolute value of the breakdown voltage of the bipolar junction transistor is lower than that of the silicon-controlled rectifier and the absolute value of the holding voltage of the bipolar junction transistor is higher than that of the silicon-controlled rectifier when an electrostatic discharge voltage is applied to the bipolar junction transistor and the silicon-controlled rectifier.
    Type: Grant
    Filed: January 11, 2022
    Date of Patent: November 5, 2024
    Assignee: Amazing Microelectronic Corp.
    Inventors: Chih-Wei Chen, Mei-Lian Fan, Kun-Hsien Lin
  • Patent number: 12107084
    Abstract: A multi-channel transient voltage suppression device includes a semiconductor substrate, a semiconductor layer, at least two bidirectional transient voltage suppression structures, and at least one isolation trench. The semiconductor substrate, having a first conductivity type, is coupled to a grounding terminal. The semiconductor layer, having a second conductivity type opposite to the first conductivity type, is formed on the semiconductor substrate. The bidirectional transient voltage suppression structures are formed in the semiconductor layer. Each bidirectional transient voltage suppression structure is coupled to an input/output (I/O) pin and the grounding terminal. The isolation trench is formed in the semiconductor substrate and the semiconductor layer and formed between the bidirectional transient voltage suppression structures. The isolation trench has a height larger than the height of the semiconductor layer and surrounds the bidirectional transient voltage suppression structures.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: October 1, 2024
    Assignee: AMAZING MICROELECTRONIC CORP.
    Inventors: Tun-Chih Yang, Zi-Ping Chen, Kun-Hsien Lin
  • Publication number: 20240243119
    Abstract: A transient voltage suppression device includes at least one N-type lightly-doped structure, a first P-type well, a second P-type well, a first N-type heavily-doped area, and a second N-type heavily-doped area. The first P-type well and the second P-type well are formed in the N-type lightly-doped structure. The first N-type heavily-doped area and the second N-type heavily-doped area are respectively formed in the first P-type well and the second P-type well. The doping concentration of the first P-type well is higher than that of the second P-type well. The first P-type well and the second P-type well can be replaced with P-type lightly-doped wells respectively having P-type heavily-doped areas under the N-type heavily-doped areas.
    Type: Application
    Filed: January 18, 2023
    Publication date: July 18, 2024
    Applicant: AMAZING MICROELECTRONIC CORP.
    Inventors: Chih-Wei CHEN, Kuan-Yu LIN, Mei-Lian FAN, KUN-HSIEN LIN
  • Publication number: 20240234408
    Abstract: An ESD protection device includes an N-type semiconductor substrate, a P-type semiconductor layer, a first N-type well, a P-type well, a second N-type well, a first P-type heavily-doped area, a first N-type heavily-doped area, and a second P-type heavily-doped area. The semiconductor layer is formed on the substrate. The wells are formed in the semiconductor layer. The second N-type well directly touches the substrate. The first P-type heavily-doped area is formed in the first N-type well. The first N-type heavily-doped area and the second P-type heavily-doped area are formed in the P-type well. The second P-type heavily-doped area is coupled to the second N-type well through an external conductive wire and replaced with a second N-type heavily-doped area.
    Type: Application
    Filed: January 10, 2023
    Publication date: July 11, 2024
    Applicant: AMAZING MICROELECTRONIC CORP.
    Inventors: KUN-HSIEN LIN, Zi-Ping CHEN, Tun-Chih Yang
  • Patent number: 11978809
    Abstract: A transient voltage suppression device includes at least one P-type lightly-doped structure and at least one electrostatic discharge structure. The electrostatic discharge structure includes an N-type lightly-doped well, an N-type well, a first P-type heavily-doped area, and a first N-type heavily-doped area. The N-type lightly-doped well is formed in the P-type lightly-doped structure. The N-type well is formed in the N-type lightly-doped well. The doping concentration of the N-type lightly-doped well is less than that of the N-type well. The first P-type heavily-doped area is formed in the N-type well. The first N-type heavily-doped area is formed in the P-type lightly-doped structure.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: May 7, 2024
    Assignee: AMAZING MICROELECTRONIC CORP.
    Inventors: Chih-Wei Chen, Kuan-Yu Lin, Kun-Hsien Lin
  • Publication number: 20240110948
    Abstract: A method for producing a probe card comprises the steps of: providing a carrier board, wherein a surface of the carrier board has at least one probe guiding portion; and generating a probe on the probe guiding portion by performing additive manufacturing with a conductive material directly on the at least one probe guiding portion to generate the probe, wherein the additive manufacturing comprises directly layering the conductive material on the probe guiding portion.
    Type: Application
    Filed: February 18, 2022
    Publication date: April 4, 2024
    Inventors: Kun-Hsien LIN, Edgar HEPP, Wabe KOELMANS, Patrik SCHUERCH
  • Publication number: 20230420576
    Abstract: A transient voltage suppression device includes at least one P-type lightly-doped structure and at least one electrostatic discharge structure. The electrostatic discharge structure includes an N-type lightly-doped well, an N-type well, a first P-type heavily-doped area, and a first N-type heavily-doped area. The N-type lightly-doped well is formed in the P-type lightly-doped structure. The N-type well is formed in the N-type lightly-doped well. The doping concentration of the N-type lightly-doped well is less than that of the N-type well. The first P-type heavily-doped area is formed in the N-type well. The first N-type heavily-doped area is formed in the P-type lightly-doped structure.
    Type: Application
    Filed: June 27, 2022
    Publication date: December 28, 2023
    Applicant: AMAZING MICROELECTRONIC CORP.
    Inventors: Chih-Wei CHEN, Kuan-Yu LIN, Kun-Hsien LIN
  • Patent number: 11797906
    Abstract: State estimation and sensor fusion switching methods for autonomous vehicles thereof are provided. The autonomous vehicle includes at least one sensor, at least one actuator and a processor, and is configured to transfer and transport an object. In the method, a task instruction for moving the object and data required for executing the task instruction are received. The task instruction is divided into a plurality of work stages according to respective mapping locations, and each of the work stages is mapped to one of a transport state and an execution state, so as to establish a semantic hierarchy. A current location of the autonomous vehicle is detected by using the sensor and mapped to one of the work stages in the semantic hierarchy, so as to estimate a current state of the autonomous vehicle.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: October 24, 2023
    Assignee: Industrial Technology Research Institute
    Inventors: Xin-Lan Liao, Kun-Hsien Lin, Lih-Guong Jang, Wei-Liang Wu, Yi-Yuan Chen
  • Publication number: 20230223398
    Abstract: A bidirectional electrostatic discharge protection device includes at least one bipolar junction transistor and at least one silicon-controlled rectifier. The silicon-controlled rectifier is coupled to the bipolar junction transistor in series. The absolute value of the breakdown voltage of the bipolar junction transistor is lower than that of the silicon-controlled rectifier and the absolute value of the holding voltage of the bipolar junction transistor is higher than that of the silicon-controlled rectifier when an electrostatic discharge voltage is applied to the bipolar junction transistor and the silicon-controlled rectifier.
    Type: Application
    Filed: January 11, 2022
    Publication date: July 13, 2023
    Inventors: CHIH-WEI CHEN, MEI-LIAN FAN, KUN-HSIEN LIN
  • Publication number: 20230215864
    Abstract: A bidirectional electrostatic discharge protection device includes a first transient voltage suppressor chip, a second transient voltage suppressor chip, a first conductive wire, and a second conductive wire. The first transient voltage suppressor chip includes a first diode and a first bipolar junction transistor. The first diode and the first bipolar junction transistor are electrically connected to a first pin. The second transient voltage suppressor chip includes a second diode and a second bipolar junction transistor. The second diode and the second bipolar junction transistor are electrically connected to a second pin. The first conductive wire is electrically connected between the first diode and the second bipolar junction transistor. The second conductive wire is electrically connected between the second diode and the first bipolar junction transistor.
    Type: Application
    Filed: January 3, 2022
    Publication date: July 6, 2023
    Inventors: Tun-Chih YANG, Zi-Ping CHEN, Kun-Hsien LIN