Patents by Inventor Kuo-Chang Chiang
Kuo-Chang Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210399141Abstract: A transistor device and method of making the same, the transistor device including: a substrate; a word line disposed on the substrate; a gate insulating layer disposed on the word line; a dual-layer semiconductor channel including: a first channel layer disposed on the gate insulating layer; and a second channel layer disposed on the first channel layer, such that the second channel layer contacts side and top surfaces of the first channel layer; and source and drain electrodes electrically coupled to the second channel layer. When a voltage is applied to the word line, the first channel layer has a first electrical resistance and the second channel layer has a second electrical resistance that is different from the first electrical resistance.Type: ApplicationFiled: April 12, 2021Publication date: December 23, 2021Inventors: Hung Wei LI, Kuo Chang CHIANG, Mauricio MANFRINI, Sai-Hooi YEONG, Yu-Ming LIN
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Publication number: 20210391354Abstract: A memory device includes a first multi-layer stack, a channel layer, a charge storage layer, a first conductive pillar, and a second conductive pillar. The first multi-layer stack is disposed on a substrate and includes first conductive layers and first dielectric layers stacked alternately. The channel layer penetrates through the first conductive layers and the first dielectric layers, wherein the channel layer includes a first channel portion and a second channel portion separated from each other. The charge storage layer is disposed between the first conductive layers and the channel layer. The first conductive pillar is disposed between one end of the first channel portion and one end of the second channel portion. The second conductive pillar is disposed between the other end of the first channel portion and the other end of the second channel portion.Type: ApplicationFiled: February 19, 2021Publication date: December 16, 2021Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hung-Chang Sun, Yu-Wei Jiang, TsuChing Yang, Kuo-Chang Chiang, Sheng-Chih Lai
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Publication number: 20210375936Abstract: A memory cell includes a ferroelectric (FE) material contacting a word line; and an oxide semiconductor (OS) layer contacting a source line and a bit line, wherein the FE material is disposed between the OS layer and the word line. The OS layer comprises: a first region adjacent the FE material, the first region having a first concentration of a semiconductor element; a second region adjacent the source line, the second region having a second concentration of the semiconductor element; and a third region between the first region and the second region, the third region having a third concentration of the semiconductor element, the third concentration is greater than the second concentration and less than the first concentration.Type: ApplicationFiled: January 15, 2021Publication date: December 2, 2021Inventors: Kuo-Chang Chiang, Hung-Chang Sun, Sheng-Chih Lai, TsuChing Yang, Yu-Wei Jiang
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Patent number: 10748959Abstract: A fabricating method for a display apparatus is provided. The fabricating method for the display apparatus includes the following steps. An array substrate having a first electrode and a second electrode is provided. A first light emitting diode is heated to soften a first bump between the first electrode and the first light emitting diode, the first light emitting diode is bonded onto the first electrode by the first bump. The first light emitting diode and a second light emitting diode are heated to soften the first bump and a second bump between the second electrode and the second light emitting diode, the second light emitting diode is bonded onto the second electrode by the second bump, and the first light emitting diode and the second light emitting diode are pressed.Type: GrantFiled: September 3, 2019Date of Patent: August 18, 2020Assignee: Innolux CorporationInventors: Kuo-Chang Chiang, Jui-Feng Ko, Tsau-Hua Hsieh
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Publication number: 20200006420Abstract: A fabricating method for a display apparatus is provided. The fabricating method for the display apparatus includes the following steps. An array substrate having a first electrode and a second electrode is provided. A first light emitting diode is heated to soften a first bump between the first electrode and the first light emitting diode, the first light emitting diode is bonded onto the first electrode by the first bump. The first light emitting diode and a second light emitting diode are heated to soften the first bump and a second bump between the second electrode and the second light emitting diode, the second light emitting diode is bonded onto the second electrode by the second bump, and the first light emitting diode and the second light emitting diode are pressed.Type: ApplicationFiled: September 3, 2019Publication date: January 2, 2020Applicant: Innolux CorporationInventors: Kuo-Chang Chiang, Jui-Feng Ko, Tsau-Hua Hsieh
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Patent number: 10446604Abstract: A display apparatus and a fabricating method for a display apparatus are provided. The fabricating method for the display apparatus includes the following steps. An array substrate having a first electrode and a second electrode is provided. A first light emitting diode is heated to soften a first bump between the first electrode and the first light emitting diode, the first light emitting diode is bonded onto the first electrode by the first bump. The first light emitting diode and a second light emitting diode are heated to soften the first bump and a second bump between the second electrode and the second light emitting diode, the second light emitting diode is bonded onto the second electrode by the second bump, and the first light emitting diode and the second light emitting diode are pressed.Type: GrantFiled: June 22, 2017Date of Patent: October 15, 2019Assignee: Innolux CorporationInventors: Kuo-Chang Chiang, Jui-Feng Ko, Tsau-Hua Hsieh
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Patent number: 10304958Abstract: A thin film transistor includes a gate electrode, a semiconductor layer, a source electrode, a drain electrode, a first protective layer, and a second protective layer. The gate electrode is disposed on a substrate. The metal oxide semiconductor layer is disposed on a gate insulating layer and electrically connects the source electrode and the drain electrode. The first protective layer disposed on the metal oxide semiconductor layer has a first oxygen vacancy concentration. The second protective layer disposed on the first protective layer has a second oxygen vacancy concentration. A boundary area located between the first and second protective layers has a third oxygen vacancy concentration. The third oxygen vacancy concentration is respectively greater than the first oxygen vacancy concentration and the second oxygen vacancy concentration.Type: GrantFiled: May 31, 2016Date of Patent: May 28, 2019Assignee: Innolux CorporationInventors: Kuan-Feng Lee, Kuo-Chang Chiang, Tzu-Min Yan
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Patent number: 9917114Abstract: A display panel is provided, which includes a first substrate, a first insulating layer on the first substrate, a semiconductor layer on the first insulating layer, and a second insulating layer on the semiconductor layer and the first insulating layer. The second insulating layer has a surface in contact with the first insulating layer. The second insulating layer has a first region. The first region has a thickness of 40 nm from the surface of the second insulating layer, and the second insulating layer has a fluoride ion gain ratio of 80% to 95% in the first region.Type: GrantFiled: January 30, 2017Date of Patent: March 13, 2018Assignee: INNOLUX CORPORATIONInventors: Kuan-Feng Lee, Kuo-Chang Chiang, Tzu-Min Yan
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Publication number: 20180012930Abstract: A display apparatus and a fabricating method for a display apparatus are provided. The fabricating method for the display apparatus includes the following steps. An array substrate having a first electrode and a second electrode is provided. A first light emitting diode is heated to soften a first bump between the first electrode and the first light emitting diode, the first light emitting diode is bonded onto the first electrode by the first bump. The first light emitting diode and a second light emitting diode are heated to soften the first bump and a second bump between the second electrode and the second light emitting diode, the second light emitting diode is bonded onto the second electrode by the second bump, and the first light emitting diode and the second light emitting diode are pressed.Type: ApplicationFiled: June 22, 2017Publication date: January 11, 2018Applicant: Innolux CorporationInventors: Kuo-Chang Chiang, Jui-Feng Ko, Tsau-Hua Hsieh
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Patent number: 9841637Abstract: A display panel is provided. The display panel includes a color filter substrate. The color filter substrate includes a first substrate, a black matrix, a color filter layer, a transparent conductive layer, and a plurality of spacers. The black matrix and the color filter layer are disposed on the first substrate. The transparent conductive layer is disposed on the color filter layer and the black matrix, and has a plurality of openings located above the black matrix. The spacers are located on the transparent conductive layer and located on the black matrix. At least one of the openings is located between the adjacent spacers, and at least one of the spacers partially overlaps at least one of the openings.Type: GrantFiled: June 17, 2015Date of Patent: December 12, 2017Assignee: INNOLUX CORPORATIONInventors: Kuan-Feng Lee, Peng-Cheng Huang, Kuo-Chang Chiang, Tzu-Min Yan, Kuei-Ling Liu
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Patent number: 9711755Abstract: A display panel is provided. The display panel includes a first substrate having a display area and a non-display area. A sealant is disposed on the first substrate and on the non-display area. A planarization layer is disposed on the first substrate. The planarization layer has a first trench formed therein on the non-display area. The first trench has a bottom and a side adjacent to the bottom. The bottom has a roughness that is greater than the roughness of the side.Type: GrantFiled: July 7, 2015Date of Patent: July 18, 2017Assignee: INNOLUX CORPORATIONInventors: Kuan-Feng Lee, Kuo-Chang Chiang, Peng-Cheng Huang, Kuei-Ling Liu
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Patent number: 9666727Abstract: A display device is provided. A thin film transistor structure of the display device includes a substrate, a gate electrode disposed on the substrate, a gate insulation layer disposed on the substrate and the gate electrode, a channel layer on the gate insulation layer and corresponding to the gate electrode, and a source electrode and a drain electrode contacting two sides of the channel layer, respectively, and extending onto the gate insulation layer. The channel layer includes a first metal oxide semiconductor layer, which includes (1) tin and (2) at least one of gallium, hafnium, and aluminum.Type: GrantFiled: March 11, 2016Date of Patent: May 30, 2017Assignee: INNOLUX CORPORATIONInventors: Kuan-Feng Lee, Kuo-Chang Chiang
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Publication number: 20170141133Abstract: A display panel is provided, which includes a first substrate, a first insulating layer on the first substrate, a semiconductor layer on the first insulating layer, and a second insulating layer on the semiconductor layer and the first insulating layer. The second insulating layer has a surface in contact with the first insulating layer. The second insulating layer has a first region. The first region has a thickness of 40 nm from the surface of the second insulating layer, and the second insulating layer has a fluoride ion gain ratio of 80% to 95% in the first region.Type: ApplicationFiled: January 30, 2017Publication date: May 18, 2017Inventors: Kuan-Feng LEE, Kuo-Chang CHIANG, Tzu-Min YAN
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Patent number: 9608012Abstract: A display panel is disclosed, comprising: a first substrate; a thin film transistor layer disposed on the first substrate; an insulating layer disposed on the thin film transistor layer; at least one pixel electrode disposed on the insulating layer and exposing an exposure region of the insulating layer; and an alignment layer disposed on the pixel electrode and the exposure region; wherein a surface roughness of the alignment layer disposed on the exposure region is larger than a surface roughness of the alignment layer disposed on the pixel electrode.Type: GrantFiled: August 20, 2015Date of Patent: March 28, 2017Assignee: INNOLUX CORPORATIONInventors: Kuo-Chang Chiang, Kuan-Feng Lee, Peng-Cheng Huang, Kuei-Ling Liu
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Patent number: 9595537Abstract: A display panel is provided, which includes a first substrate, a first insulating layer on the first substrate, a semiconductor layer on the first insulating layer, and a second insulating layer on the semiconductor layer and the first insulating layer. The second insulating layer has a surface in the vicinity of the first insulating layer. The second insulating layer has a first region. The first region is 40 nm in depth starting from the surface of the second insulating layer, and the second insulating layer has a fluoride ion gain ratio of 80% to 95% in the first region.Type: GrantFiled: December 3, 2015Date of Patent: March 14, 2017Assignee: INNOLUX CORPORATIONInventors: Kuan-Feng Lee, Kuo-Chang Chiang, Tzu-Min Yan
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Publication number: 20160315201Abstract: A display device is provided. A thin film transistor structure of the display device includes a substrate, a gate electrode disposed on the substrate, a gate insulation layer disposed on the substrate and the gate electrode, a channel layer on the gate insulation layer and corresponding to the gate electrode, and a source electrode and a drain electrode contacting two sides of the channel layer, respectively, and extending onto the gate insulation layer. The channel layer includes a first metal oxide semiconductor layer, which includes (1) tin and (2) at least one of gallium, hafnium, and aluminum.Type: ApplicationFiled: March 11, 2016Publication date: October 27, 2016Inventors: Kuan-Feng LEE, Kuo-Chang CHIANG
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Publication number: 20160284863Abstract: A thin film transistor includes a gate electrode, a semiconductor layer, a source electrode, a drain electrode, a first protective layer, and a second protective layer. The gate electrode is disposed on a substrate. The metal oxide semiconductor layer is disposed on a gate insulating layer and electrically connects the source electrode and the drain electrode. The first protective layer disposed on the metal oxide semiconductor layer has a first oxygen vacancy concentration. The second protective layer disposed on the first protective layer has a second oxygen vacancy concentration. A boundary area located between the first and second protective layers has a third oxygen vacancy concentration. The third oxygen vacancy concentration is respectively greater than the first oxygen vacancy concentration and the second oxygen vacancy concentration.Type: ApplicationFiled: May 31, 2016Publication date: September 29, 2016Inventors: Kuan-Feng Lee, Kuo-Chang Chiang, Tzu-Min Yan
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Publication number: 20160223845Abstract: A display panel is disclosed, comprising: a first substrate; a thin film transistor layer disposed on the first substrate; an insulating layer disposed on the thin film transistor layer; at least one pixel electrode disposed on the insulating layer and exposing an exposure region of the insulating layer; and an alignment layer disposed on the pixel electrode and the exposure region; wherein a surface roughness of the alignment layer disposed on the exposure region is larger than a surface roughness of the alignment layer disposed on the pixel electrode.Type: ApplicationFiled: August 20, 2015Publication date: August 4, 2016Inventors: Kuo-Chang CHIANG, Kuan-Feng LEE, Peng-Cheng HUANG, Kuei-Ling LIU
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Patent number: 9379245Abstract: A thin film transistor includes a gate electrode, a semiconductor layer, a source electrode, a drain electrode, a first protective layer, and a second protective layer. The gate electrode is disposed on a substrate. The metal oxide semiconductor layer is disposed on a gate insulating layer and electrically connects the source electrode and the drain electrode. The first protective layer disposed on the metal oxide semiconductor layer has a first oxygen vacancy concentration. The second protective layer disposed on the first protective layer has a second oxygen vacancy concentration. A boundary area located between the first and second protective layers has a third oxygen vacancy concentration. The third oxygen vacancy concentration is respectively greater than the first oxygen vacancy concentration and the second oxygen vacancy concentration.Type: GrantFiled: July 30, 2015Date of Patent: June 28, 2016Assignee: INNOLUX CORPORATIONInventors: Kuan-Feng Lee, Kuo-Chang Chiang, Tzu-Min Yan
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Publication number: 20160181423Abstract: A display panel is provided, which includes a first substrate, a first insulating layer on the first substrate, a semiconductor layer on the first insulating layer, and a second insulating layer on the semiconductor layer and the first insulating layer. The second insulating layer has a surface in the vicinity of the first insulating layer. The second insulating layer has a first region. The first region is 40 nm in depth starting from the surface of the second insulating layer, and the second insulating layer has a fluoride ion gain ratio of 80% to 95% in the first region.Type: ApplicationFiled: December 3, 2015Publication date: June 23, 2016Inventors: Kuan-Feng LEE, Kuo-Chang CHIANG, Tzu-Min YAN