Abstract: A method includes forming a first photonic package, wherein forming the first photonic package includes patterning a silicon layer to form a first waveguide, wherein the silicon layer is on an oxide layer, and wherein the oxide layer is on a substrate; forming vias extending into the substrate; forming a first redistribution structure over the first waveguide and the vias, wherein the first redistribution structure is electrically connected to the vias; connecting a first semiconductor device to the first redistribution structure; removing a first portion of the substrate to form a first recess, wherein the first recess exposes the oxide layer; and filling the first recess with a first dielectric material to form a first dielectric region.

Abstract: A semiconductor package includes a redistribution structure, at least one semiconductor device and a plurality of heat dissipation films. The at least one semiconductor device is mounted on the redistribution structure. The plurality of heat dissipation films are disposed on the at least one semiconductor device in a side by side manner and jointly cover an upper surface of the at least one semiconductor device. A manufacturing method of the semiconductor package is also provided.

Abstract: Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary semiconductor device comprises a substrate; a gate structure disposed over the substrate and over a channel region of the semiconductor device, wherein the gate structure includes a gate stack and spacers disposed along sidewalls of the gate stack, the gate stack including a gate dielectric layer and a gate electrode; a first metal layer disposed over the gate stack, wherein the first metal layer laterally contacts the spacers over the gate dielectric layer and the gate electrode; and a gate via disposed over the first metal layer.

Abstract: A transistor including a channel layer including an oxide semiconductor material and methods of making the same. The transistor includes a channel layer having a first oxide semiconductor layer having a first oxygen concentration, a second oxide semiconductor layer having a second oxygen concentration and a third oxide semiconductor layer having a third oxygen concentration. The second oxide semiconductor layer is located between the first semiconductor oxide layer and the third oxide semiconductor layer. The second oxygen concentration is lower than the first oxygen concentration and the third oxygen concentration.

Abstract: One or more active region structures each protrude vertically out of a substrate in a vertical direction and each extend horizontally in a first horizontal direction. A source/drain component is disposed over the one or more active region structures in the vertical direction. A source/drain contact is disposed over the source/drain component in the vertical direction. The source/drain contact includes a bottom portion and a top portion. A protective liner is disposed on side surfaces of the top portion of the source/drain contact but not on side surfaces of the bottom portion of the source/drain contact.

Abstract: The present invention relates to a laser welding method of pipe fittings that mainly provides an automated butt welding process for two pipe fittings to be welded, comprising a laser welding device setup step, a material loading step, a first welding step, a second welding step, a third welding step, and a return to the original position step. The welding zone at the butt joint location of the two pipe fittings to be welded is divided to undergo three procedures through the aforementioned steps, using a laser assembly in conjunction with a reflection assembly, to provide a consistent automated butt welding for two pipe fittings to be welded, in order to reduce the time consumed during the butt welding of pipe fittings and increase the speed of the production process.

Abstract: A system includes a pressure exchanger (PX) configured to receive a first fluid at a first pressure and a second fluid at a second pressure and exchange pressure between the first fluid and the second fluid. The system further includes a condenser configured to provide corresponding thermal energy from the first fluid to a corresponding environment. The system further includes a first ejector to receive a first gas and increase pressure of the first gas to form the second fluid at the second pressure. The first ejector is further to provide the second fluid at the second pressure to the PX.

Abstract: A semiconductor device includes a source feature and a drain feature disposed over a substrate. The semiconductor device includes a source via electrically coupled to the source feature and a drain via electrically coupled to the drain feature. The semiconductor device includes a source via metal line disposed over and directly connected to the source via. The semiconductor device includes and a drain via metal line disposed over and directly connected to the drain via. The source via metal line has two first outer edges extending lengthwise along a first direction and at least one of the first outer edges is substantially aligned with an edge of the source via from a top view. The drain via metal line has two second outer edges extending lengthwise along the first direction and the two second outer edges are offset from edges of the drain via from a top view.

Abstract: A memory device includes a first chip, a second chip and a processor. The second chip is coupled to the first chip at a first node. The second chip includes a first capacitor and a first variable resistor. The first capacitor is coupled to the first node. The first variable resistor is coupled in series with the first capacitor. The processor is coupled to the first node, and is configured to perform a first read operation to the first chip via the first node. A method for operating a memory device is also disclosed herein.

Abstract: A system includes an isobaric pressure exchanger (IPX) configured to exchange pressure between a first fluid and a second fluid. The IPX includes a rotor configured to rotate about a longitudinal axis of the rotor. The rotor forms rotor ports arranged substantially symmetrically around the longitudinal axis at a distal end of the rotor. The IPX further includes an end cover configured to be disposed at the first distal end of the rotor. The end cover forms end cover ports. The rotor ports are arranged for hydraulic communication with the end cover ports. The IPX further includes an insert disposed between two of the rotor ports or between two of the end cover ports.

Abstract: A method includes bonding a first device die and a second device die to an interconnect die. The interconnect die includes a first portion over and bonded to the first device die, and a second portion over and bonded to the second device die. The interconnect die electrically connects the first device die to the second device die. The method further includes encapsulating the interconnect die in an encapsulating material, and forming a plurality of redistribution lines over the interconnect die.

Abstract: An imaging optical system includes an infrared light absorbing element, an infrared light reducing film and a plate element in order along a paraxial path. The infrared light absorbing element is made of an infrared light absorbing plastic material, and the infrared light absorbing element is configured to refract a light. The infrared light reducing film is closer to an image surface of the imaging optical system than an incident surface of the infrared light absorbing element to the image surface of the imaging optical system. The plate element is disposed between the infrared light reducing film and the image surface, the plate element includes a translucent portion, a holder portion and a taper structure coating. The taper structure coating is disposed on at least one of an incident surface and an exit surface of the translucent portion.

Abstract: One or more active region structures each protrude vertically out of a substrate in a vertical direction and each extend horizontally in a first horizontal direction. A source/drain component is disposed over the one or more active region structures in the vertical direction. A source/drain contact is disposed over the source/drain component in the vertical direction. The source/drain contact includes a bottom portion and a top portion. A protective liner is disposed on side surfaces of the top portion of the source/drain contact but not on side surfaces of the bottom portion of the source/drain contact.

Abstract: A fluid handling system includes a pressure exchanger (PX) configured to receive a first fluid at a first pressure and a second fluid at a second pressure and exchange pressure between the first fluid and the second fluid. The system further includes a condenser configured to provide corresponding thermal energy from the first fluid to a corresponding environment. The system further includes a receiver to receive the first fluid output by the PX. The receiver forms a chamber to separate the first fluid into a first gas and a first liquid. The system further includes a heat exchanger configured to receive the second fluid from the second outlet of the PX and provide the second fluid to the second inlet of the PX.

Abstract: In one example, a semiconductor device includes a first conductive feature embedded in a first dielectric layer such that a top surface of the first dielectric layer is higher than a top surface of first conductive feature, a contact etch stop layer (CESL) disposed on the first dielectric layer, and a second conductive feature embedded in a second dielectric layer. The second dielectric layer is disposed on the CESL and the second conductive feature extends through the CESL and is in direct contact with the first conductive feature.

Abstract: A semiconductor device includes a first electronic component, a second electronic component, a third electronic component, a plurality of first interconnection structures, and a plurality of second interconnection structures. The first electronic component is between the second and the third electronic components. The first interconnection structures are between the first and the second electronic components. Each first interconnection structures has a length along a first direction substantially parallel to a surface of the first electronic component, and a width along a second direction substantially parallel to the surface and substantially perpendicular to the first direction. The length is larger than the width. The second interconnection structures are between the second and the third electronic components, and electrically connected to the second and the third electronic components. A height of each second interconnection structure is different from a height of each first interconnection structure.

Abstract: An optical imaging lens assembly includes at least one optical lens element. The optical lens element includes an anti-reflective coating, and the anti-reflective coating is arranged on at least one surface of the optical lens element. The anti-reflective coating includes a high-low refractive coating and a gradient refractive coating, and the high-low refractive coating is arranged between the optical lens element and the gradient refractive coating. The high-low refractive coating includes at least one high refractive coating layer and at least one low refractive coating layer, which are stacked in alternations. The low refractive coating layer is in contact with the optical lens element. The gradient refractive coating includes a plurality of holes, and the holes away from the optical lens element are relatively larger than the holes close to the optical lens element.

Abstract: An exemplary semiconductor device includes a substrate, a first conductive feature, a second conductive feature, and a third conductive feature over the substrate. The first conductive feature has a first top surface and a side surface. The third conductive feature is on the first top surface of the first conductive feature and is spaced away from the second conductive feature. The third conductive feature has a first sidewall and a second sidewall opposing the first sidewall. The first sidewall extends between the first conductive feature and the second conductive feature. At least a segment of the first sidewall has a first slope. The second sidewall has a second slope. The second slope is greater than the first slope.