Abstract: An integrated circuit structure includes a semiconductor wafer, which includes a first notch extending from an edge of the semiconductor wafer into the semiconductor wafer. A carrier wafer is mounted onto the semiconductor wafer. The carrier wafer has a second notch overlapping at least a portion of the first notch. A side of the carrier wafer facing the semiconductor wafer forms a sharp angle with an edge of the carrier wafer. The carrier wafer has a resistivity lower than about 1×108 Ohm-cm.

Abstract: An integrated circuit structure includes a semiconductor chip including a front surface and a back surface; a via extending from the back surface of the semiconductor chip into the semiconductor chip, wherein the via is light transparent; and a photon detector in the semiconductor chip and exposed to the via.

Abstract: An integrated circuit structure includes a semiconductor chip including a front surface and a back surface; a via extending from the back surface of the semiconductor chip into the semiconductor chip, wherein the via is light transparent; and a photon detector in the semiconductor chip and exposed to the via.

Abstract: An integrated circuit structure includes a semiconductor substrate having a front side and a backside. A through-silicon via (TSV) penetrates the semiconductor substrate, wherein the TSV has a back end extending to the backside of the semiconductor substrate. A redistribution line (RDL) is formed over the backside of the semiconductor substrate and connected to the back end of the TSV. A passivation layer is over the RDL with an opening formed in the passivation layer, wherein a portion of a top surface of the RDL and a sidewall of the RDL are exposed through the opening. A metal finish is formed in the opening and contacting the portion of the top surface and the sidewall of the RDL.

Abstract: An integrated circuit structure includes a semiconductor substrate including a front side and a backside. A through-silicon via (TSV) penetrates the semiconductor substrate, and has a back end extending to the backside of the semiconductor substrate. A redistribution line (RDL) is over the backside of the semiconductor substrate and connected to the back end of the TSV. The integrated circuit structure further includes a passivation layer over the RDL; an opening in the passivation layer, wherein a portion of the RDL is exposed through the opening; and a nickel layer in the opening and contacting the RDL.

Abstract: An integrated circuit structure includes a semiconductor substrate having a front side and a backside. A through-silicon via (TSV) penetrates the semiconductor substrate, wherein the TSV has a back end extending to the backside of the semiconductor substrate. A redistribution line (RDL) is formed over the backside of the semiconductor substrate and connected to the back end of the TSV. A passivation layer is over the RDL with an opening formed in the passivation layer, wherein a portion of a top surface of the RDL and a sidewall of the RDL are exposed through the opening. A metal finish is formed in the opening and contacting the portion of the top surface and the sidewall of the RDL.

Abstract: A frequency generator is used for generating a frequency within a frequency range. The frequency generator includes a variable current source, a voltage drop generation unit, a voltage source, a detection unit, a conversion unit, and an oscillating circuit. The variable current source is used for outputting a current according to a control signal. The voltage drop generation unit is used for generating a voltage drop according to the current. The voltage source is used for outputting a voltage range. The detection unit is used for outputting the control signal to the variable current source according to a relationship between the voltage drop and the voltage range. The conversion unit is used for outputting a digital code according to the relationship between the voltage drop and the voltage range. The oscillator circuit is used for generating the frequency according to the digital code.

Abstract: A driving apparatus of a light emitting diode (LED) and a driving method thereof are provided. In the driving method, when the driving apparatus performs dimming and a duty cycle of a dimming signal is smaller than a predetermination value, outputting time of driving currents are equally allotted in a period, and a magnitude of each driving current is regulated correspondingly. When the driving apparatus performs dimming and the duty cycle of the dimming signal is equal to or greater than the predetermination value, the driving currents are simultaneously output in the period, and the magnitude of each driving current is regulated according to the dimming signal. Therefore, an audio noise and an electromagnetic interference caused by excessive variation of a sum of the driving currents are suppressed.

Abstract: An integrated circuit structure includes a semiconductor substrate; a conductive via (TSV) passing through the semiconductor substrate; and a copper-containing post overlying the semiconductor substrate and electrically connected to the conductive via.

Abstract: An LED device with simultaneous open and short detection function includes a plurality of LED strings, a voltage converter, a current driving unit, a loop control unit, an open detector, a short detector and a voltage detector. The open detector and the short detector are utilized for detecting LED open and LED short for the plurality of LED strings, respectively. The voltage detector is coupled to the open detector, the short detector and the voltage converter, and is utilized for generating a reset signal to the short detector according to an output voltage of the voltage converter when the LED open occurs on the plurality of LED strings, so as to initiate the LED short detection for the plurality of LED strings again.

Abstract: A light-emitting diode (LED) device capable of dynamically regulating output voltage is disclosed. The LED device includes a plurality of LED chains, a voltage converter, a current driving unit, a loop control unit. The loop control unit is coupled to the LED chains and the voltage converter, and includes a voltage selection unit, an error amplifier, and a conversion controller. The voltage selection unit is utilized for generating a plurality of candidate voltages according to a threshold voltage and a plurality of headroom voltage voltages corresponding to the LED chains and the current driving unit, and selecting a feedback voltage from the candidate voltages. The error amplifier generates an error voltage signal according to a reference voltage and the feedback voltage. The conversion controller generates a voltage control signal according to the error voltage signal to control the voltage conversion of the voltage converter.

Abstract: A control method capable of preventing flicker effect for a light source module includes detecting variation situations of a driving current passing through the light source module to generate a current detection signal, adjusting a variable reference voltage according to the current detection signal, obtaining a feedback voltage from the light source module, generating a voltage control signal according to the feedback voltage and the variable reference voltage, and generating an output voltage according to the voltage control signal to drive the light source module.

Abstract: A light emitting diode module having a plurality of LED strings is provided. The light emitting diode module includes a voltage generating loop, a light tuner, a voltage selector, and a voltage storage and comparison circuit. The voltage generating loop generates a system voltage according to a pulse modulation control signal. The light tuner receives a light tuning signal and turns on or off the LED strings accordingly. The voltage selector selects one of terminal voltages of terminals of the LED strings coupled to the light tuner for generating a selection voltage. The voltage storage and comparison circuit generates an error voltage by comparing the selection voltage and a reference voltage. The voltage storage and comparison circuit stores the error voltage temporarily and provides the temporarily stored error voltage as the pulse modulation control signal.

Abstract: A light source driving device for driving a light emitting component is disclosed. The light source driving device includes a voltage converter coupled to the light emitting component for converting an input voltage into an output driving voltage according to a voltage control signal, a dimming unit coupled to the light emitting component for implementing a dimming process according to a dimming signal, a current source coupled to the dimming unit for providing a driving current to drive the light emitting component, and a control unit coupled to the dimming unit and the voltage converter for detecting a dimming state to generate a dimming detection signal and generating a reference voltage according to the dimming detection signal, wherein the control unit controls the voltage converter to generate the output driving voltage so as to driving the light emitting component.

Abstract: A light-emitting diode (LED) device for preventing soft-start flicker includes an LED module, a voltage converter, a variable current load and a loop control unit. The loop control unit is coupled to the LED module, the voltage converter and the variable current load, and includes a soft-start unit and a dimming control unit. The soft-start unit is utilized for activating a soft-start mechanism of the voltage converter when power of the LED device is turned on. The dimming control unit is utilized for controlling the variable current load to progressively increase a load current of the LED module to a target value and to maintain the load current on the target value until the soft-start mechanism is completed, so as to perform dimming control on the LED module.

Abstract: A thin wafer handling structure includes a semiconductor wafer, a release layer that can be released by applying energy, an adhesive layer that can be removed by a solvent, and a carrier, where the release layer is applied on the carrier by coating or laminating, the adhesive layer is applied on the semiconductor wafer by coating or laminating, and the semiconductor wafer and the carrier is bonded together with the release layer and the adhesive layer in between. The method includes applying a release layer on a carrier, applying an adhesive layer on a semiconductor wafer, bonding the carrier and the semiconductor wafer, releasing the carrier by applying energy on the release layer, e.g. UV or laser, and cleaning the semiconductor's surface by a solvent to remove any residue of the adhesive layer.

Abstract: An integrated circuit structure includes a semiconductor wafer, which includes a first notch extending from an edge of the semiconductor wafer into the semiconductor wafer. A carrier wafer is mounted onto the semiconductor wafer. The carrier wafer has a second notch overlapping at least a portion of the first notch. A side of the carrier wafer facing the semiconductor wafer forms a sharp angle with an edge of the carrier wafer. The carrier wafer has a resistivity lower than about 1×108 Ohm-cm.

Abstract: A signal generator and a method thereof for generating signals are provided. The signal generator includes a pulse width signal generation module and a signal generating module. The pulse width signal generation module generates a first pulse width signal according to a first pulse signal and a second pulse signal. A first signal with a first duty ratio is generated by the signal generating module based on the first pulse width signal. The first duty ratio is equal to a product of a duty ratio of the first pulse signal and a duty ratio of the second pulse signal.

Abstract: An integrated circuit structure includes a semiconductor substrate having a front side and a backside, and a conductive via penetrating the semiconductor substrate. The conductive via includes a back end extending to the backside of the semiconductor substrate. A redistribution line (RDL) is on the backside of the semiconductor substrate and electrically connected to the back end of the conductive via. A passivation layer is over the RDL, with an opening in the passivation layer, wherein a portion of the RDL is exposed through the opening. A copper pillar has a portion in the opening and electrically connected to the RDL.

Abstract: An isolation structure for stacked dies is provided. A through-silicon via is formed in a semiconductor substrate. A backside of the semiconductor substrate is thinned to expose the through-silicon via. An isolation film is formed over the backside of the semiconductor substrate and the exposed portion of the through-silicon via. The isolation film is thinned to re-expose the through-silicon via, and conductive elements are formed on the through-silicon via. The conductive element may be, for example, a solder ball or a conductive pad. The conductive pad may be formed by depositing a seed layer and an overlying mask layer. The conductive pad is formed on the exposed seed layer. Thereafter, the mask layer and the unused seed layer may be removed.