Abstract: A method of treating central nervous system (CNS) diseases in a subject is provided. The method comprises administering to the subject a therapeutically effective amount of Antcin H and/or its derivatives. The novel use of Antcin H and/or its derivatives are also provided.

Abstract: A semiconductor structure includes a substrate, a semiconductor fin extending from the substrate, and a silicon germanium (SiGe) epitaxial feature disposed over the semiconductor fin. A gallium-implanted layer is disposed over a top surface of the SiGe epitaxial feature, and a silicide feature is disposed over and in contact with the gallium-implanted layer.

Abstract: A method of manufacturing a semiconductor device includes: providing a substrate comprising a surface; forming fins on the substrate; depositing a dummy gate electrode over the fins; forming a gate spacer surrounding the dummy gate electrode; forming lightly-doped source/drain (LDD) regions in the substrate on two sides of the gate spacer; performing a first treatment at a first temperature to repair defects in at least one of the dummy gate electrode, the gate spacer and the LDD region; forming source/drain regions in the respective LDD regions; removing the dummy gate electrode to form a replacement gate; depositing an inter-layer dielectric (ILD) layer over the replacement gate and the source/drain regions; and subsequent to the forming of the replacement gate, performing a second treatment at a second temperature, lower than the first temperature, to repair defects of the semiconductor device.

Abstract: Disclosed herein is an apparatus comprising: a source configured to emit charged particles, an optical system and a stage; wherein the stage is configured to support a sample thereon and configured to move the sample by a first distance in a first direction; wherein the optical system is configured to form probe spots on the sample with the charged particles; wherein the optical system is configured to move the probe spots by the first distance in the first direction and by a second distance in a second direction, simultaneously, while the stage moves the sample by the first distance in the first direction; wherein the optical system is configured to move the probe spots by the first distance less a width of one of the probe spots in an opposite direction of the first direction, after the stage moves the sample by the first distance in the first direction.

Abstract: Provided is a device with a replacement spacer structure and a method for forming such a structure. The method includes forming an initial spacer structure, wherein the initial spacer structure has an initial etch rate for a selected etchant. The method further includes removing a portion of the initial spacer structure, wherein a remaining portion of the initial spacer structure is not removed. Also, the method includes forming a replacement spacer structure adjacent to the remaining portion of the initial spacer structure to form a combined spacer structure, wherein the combined spacer structure has an intermediate etch rate for the selected etchant that is less than the initial etch rate for a selected etchant. Further, the method includes etching the combined spacer structure with the selected etchant to form a final spacer structure.

Abstract: In a method of manufacturing a semiconductor device, a lower conductive layer is formed in an opening formed in a dielectric layer, and the lower conductive layer is recessed to form a space. A blanket conductive layer is formed over the recessed lower conductive layer in the space, a sidewall of the space and an upper surface of the dielectric layer. Part of the blanket conductive layer formed on the sidewall of the opening and the upper surface of the dielectric layer is removed, thereby forming a upper conductive layer on the lower conductive layer, and a cap insulating layer is formed over the upper conductive layer in the space. The blanket conductive layer is formed by physical vapor deposition.

Abstract: A semiconductor structure includes a substrate, a semiconductor fin connected to the substrate, an epitaxial layer disposed over the semiconductor fin, and a silicide feature over and in contact with the epitaxial layer. The epitaxial layer including silicon germanium and further includes gallium in an upper portion of the epitaxial layer that is in contact with the silicide feature.

Abstract: A method of manufacturing a semiconductor device includes: providing a substrate comprising a surface; depositing a first dielectric layer and a second dielectric layer over the substrate; performing a first treatment by introducing a trap-repairing element on the first and second dielectric layers; forming a dummy gate electrode over the second dielectric layer; forming a gate spacer surrounding the dummy gate electrode; forming lightly-doped source/drain (LDD) regions in the substrate on two sides of the gate spacer; forming source/drain regions in the respective LDD regions; removing the dummy gate electrode to form a replacement gate; and forming an inter-layer dielectric (ILD) layer over the replacement gate and the source/drain regions.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a gate dielectric layer over a substrate. The method includes forming a work function metal layer over the gate dielectric layer. The method includes forming a glue layer over the work function metal layer. The glue layer is thinner than the gate dielectric layer. The method includes forming a gate electrode over the glue layer. The gate electrode includes fluorine. The method includes annealing the gate electrode. The fluorine diffuses from the gate electrode into the gate dielectric layer.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a gate stack over the substrate. The semiconductor device structure includes a cap layer over the gate stack. The semiconductor device structure includes a protective layer over the cap layer, wherein a lower portion of the protective layer extends into the cap layer. The semiconductor device structure includes a contact structure passing through the protective layer and the cap layer.

Abstract: Semiconductor device and the manufacturing method thereof are disclosed. An exemplary semiconductor device comprises a first semiconductor stack and a second semiconductor stack over a substrate, wherein each of the first and second semiconductor stacks includes semiconductor layers stacked up and separated from each other; a dummy spacer between the first and second semiconductor stacks, wherein the dummy spacer contacts a first sidewall of each semiconductor layer of the first and second semiconductor stacks; and a gate structure wrapping a second sidewall, a top surface, and a bottom surface of each semiconductor layer of the first and second semiconductor stacks.

Abstract: An optical device includes a first region and a second region surrounding the first region. The optical device includes a substrate. The optical device also includes a first meta-structure disposed on the substrate and has a plurality of first peripheral pillars in the second region. The optical device further includes a second meta-structure disposed on the substrate and has a plurality of second peripheral pillars corresponding to the plurality of first peripheral pillars. Each of the second peripheral pillars has a first shifting distance with respect to a corresponding first peripheral pillar in the direction extending from the center of the optical device to the edge of the optical device.

Abstract: A method includes forming a first gate dielectric, a second gate dielectric, and a third gate dielectric over a first semiconductor region, a second semiconductor region, and a third semiconductor region, respectively. The method further includes depositing a first lanthanum-containing layer overlapping the first gate dielectric, and depositing a second lanthanum-containing layer overlapping the second gate dielectric. The second lanthanum-containing layer is thinner than the first lanthanum-containing layer. An anneal process is then performed to drive lanthanum in the first lanthanum-containing layer and the second lanthanum-containing layer into the first gate dielectric and the second gate dielectric, respectively. During the anneal process, the third gate dielectric is free from lanthanum-containing layers thereon.

Abstract: A semiconductor device includes a first semiconductor layer below a second semiconductor layer; first and second gate dielectric layers surrounding the first and the second semiconductor layers, respectively; and a gate electrode surrounding both the first and the second gate dielectric layers. The first gate dielectric layer has a first top section above the first semiconductor layer and a first bottom section below the first semiconductor layer. The second gate dielectric layer has a second top section above the second semiconductor layer and a second bottom section below the second semiconductor layer. The first top section has a first thickness. The second top section has a second thickness. The second thickness is greater than the first thickness.

Abstract: The present disclosure provides a semiconductor device and a method of forming the same. The semiconductor device includes a first channel members being vertically stacked, a second channel members being vertically stacked, an n-type work function layer wrapping around each of the first channel members, a first p-type work function layer over the n-type work function layer and wrapping around each of the first channel members, a second p-type work function layer wrapping around each of the second channel members, a third p-type work function layer over the second p-type work function layer and wrapping around each of the second channel members, and a gate cap layer over a top surface of the first p-type work function layer and a top surface of the third p-type work function layer such that the gate cap layer electrically couples the first p-type work function layer and the third p-type work function layer.

Abstract: A light diffuser includes a main body and first fillers. The first fillers are dispersed in the main body. The first fillers include at least one of ZrO2, Nb2O5, Ta2O5, SixNy, Si, Ge GaP, InP, and PbS, and a diameter of each of the first fillers is in a range from 0.1 ?m to 1 ?m.

Abstract: Disclosed herein are a method of treating, reducing the risk of, preventing, or alleviating angiotensin converting enzyme 2 (ACE-2) associated state in a subject, comprising administering to the subject a therapeutically effective amount of Antrodia cinnamomea extract (Ant-Ex) or fraction 3 thereof (AE-F03). Also provided herein are uses of Ant-Ex or AE-F03 in reducing ACE-2 expression and manufacturing a drug or a food supplement for treating, reducing the risk of, preventing, or alleviating ACE-2 associated state.

Abstract: Semiconductor structures and methods for manufacturing the same are provided. The method for manufacturing the semiconductor structure includes forming a fin structure protruding from a substrate, and the fin structure includes first semiconductor material layers and second semiconductor material layers alternately stacked. The method also includes forming a dummy gate structure across the fin structure and forming a gate spacer on a sidewall of the dummy gate structure. The method also includes partially oxidizing the gate spacer to form an oxide layer and removing the oxide layer to form a modified gate spacer. The method also includes removing the first semiconductor material layers to form gaps and forming a gate structure in the gaps to wrap around the second semiconductor material layers and over the second semiconductor material layers to cover the modified gate spacer.

Abstract: An optical device is provided. The optical device includes a substrate, a plurality of color filters and a plurality of spacers. The substrate has a central region and a peripheral region. The plurality of color filters include red color filters, green color filters and blue color filters and are formed on the substrate. The plurality of spacers are formed between the color filters. The refractive index of the spacers reduces gradually from that of the spacer located at the central region to that of the spacer located at the peripheral region of the substrate.

Abstract: A method includes forming a first gate dielectric, a second gate dielectric, and a third gate dielectric over a first semiconductor region, a second semiconductor region, and a third semiconductor region, respectively. The method further includes depositing a first lanthanum-containing layer overlapping the first gate dielectric, and depositing a second lanthanum-containing layer overlapping the second gate dielectric. The second lanthanum-containing layer is thinner than the first lanthanum-containing layer. An anneal process is then performed to drive lanthanum in the first lanthanum-containing layer and the second lanthanum-containing layer into the first gate dielectric and the second gate dielectric, respectively. During the anneal process, the third gate dielectric is free from lanthanum-containing layers thereon.