Patents by Inventor Kuo-In Chen

Kuo-In Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240086021
    Abstract: A substrate assembly is provided, including a first substrate, an active element layer, a plurality of first electrodes, a circuit substrate, and a plurality of second electrodes. The active element layer is disposed on the first substrate. The plurality of first electrodes are disposed on the first substrate and arranged along a first direction. The circuit substrate is partially overlapping the first substrate in a vertical projection direction. The plurality of second electrodes are disposed on the circuit substrate. A distance between the edge of one of the plurality of second electrodes and the edge of one of the plurality of first electrodes is greater than zero in the first direction, and a width of the one of the plurality of first electrodes is different from a width of the one of the plurality of second electrodes.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Inventors: Chia-Hsiung CHANG, Yang-Chen CHEN, Kuo-Chang SU, Hsia-Ching CHU
  • Publication number: 20240088899
    Abstract: A logic cell structure includes a first portion, a second portion and a third portion. The first portion, arranged to be a first layout of a first semiconductor element, is placed in a first cell row of a substrate area extending in a first direction. The second portion, arranged to be a second layout of a second semiconductor element, is placed in a second cell row of the substrate area. The third portion is arranged to be a third layout of an interconnecting path used for coupling the first semiconductor element and the second semiconductor element. The first, second and third portions are bounded by a bounding box with a height in a second direction and a width in the first direction. Respective centers of the first portion and the second portion are arranged in a third direction different from each of the first direction and the second direction.
    Type: Application
    Filed: November 24, 2023
    Publication date: March 14, 2024
    Inventors: SHAO-HUAN WANG, CHUN-CHEN CHEN, SHENG-HSIUNG CHEN, KUO-NAN YANG
  • Patent number: 11927871
    Abstract: Disclosed are near-eye displaying methods and systems capable of multiple depths of field imaging. The method comprises two steps. At a first step, one or more pixels of a self-emissive display emit a light to a collimator such that the light passing through the collimator is collimated to form a collimated light. At a second step, the self-emissive display provides at least one collimated light direction altering unit on a path of the light from the collimator to change direction of the collimated light to enable the collimated light from at least two pixels to intersect and focus at a different location so as to vary a depth of field.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: March 12, 2024
    Assignee: HES IP HOLDINGS, LLC
    Inventor: Tai-Kuo Chen
  • Patent number: 11926017
    Abstract: A cleaning process monitoring system, comprising: a cleaning container comprising an inlet for receiving a cleaning solution and an outlet for draining a waste solution; a particle detector coupled to the outlet and configured to measure a plurality of particle parameters associated with the waste solution so as to provide a real-time monitoring of the cleaning process; a pump coupled to the cleaning container and configured to provide suction force to draw solution through the cleaning system; a controller coupled to the pump and the particle detector and configured to receive the plurality of particle parameters from the particle detector and to provide control to the cleaning system; and a host computer coupled to the controller and configured to provide at least one control parameter to the controller.
    Type: Grant
    Filed: May 5, 2021
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Charlie Wang, Yu-Ping Tseng, Y. J. Chen, Wai-Ming Yeung, Chien-Shen Chen, Danny Kuo, Yu-Hsuan Hsieh, Hsuan Lo
  • Patent number: 11921434
    Abstract: An apparatus includes a vacuum chamber, a reflective optical element arranged in the vacuum chamber and configured to reflect an extreme ultra-violet (EUV) light, and a cleaning module positioned in the vacuum chamber. the cleaning module is operable to provide a mitigation gas flowing towards the reflective optical element and provide a hydrogen-containing gas flowing towards the reflective optical element. The mitigation gas mitigates, by chemical reaction, contamination of the reflective optical element.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: March 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shu-Hao Chang, Norman Chen, Jeng-Horng Chen, Kuo-Chang Kau, Ming-Chin Chien, Shang-Chieh Chien, Anthony Yen, Kevin Huang
  • Patent number: 11924401
    Abstract: A system and method for displaying a 3D image with depths, which utilize at least one light signal generator to sequentially generate multiple light signals(S100) and at least one optical assembly to receive the multiple light signals from the at least one light signal generator, and project and scan the multiple light signals within a predetermined time period to display the 3D image in space(S200). Each pixel of the 3D image is displayed at a position by at least two of the multiple light signals to a viewer's eye, paths or extensions of the paths of the at least two light signals intersects at the position and at an angle associated with a depth of the pixel, and the predetermined time period is one eighteenth of a second. Accordingly, the advantages of simplified structure, a miniatured size, and a less costly building cost can be ensured.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: March 5, 2024
    Assignee: HES IP HOLDINGS, LLC
    Inventor: Tai Kuo Chen
  • Publication number: 20240074206
    Abstract: A semiconductor device includes a random access memory (RAM) structure and a dielectric layer. The RAM structure is over a substrate and includes a bottom electrode layer, a ferroelectric layer over the bottom electrode layer, and a top electrode layer over the ferroelectric layer. The dielectric layer is over the substrate and laterally surrounds a lower portion of the RAM structure. From a cross-sectional view, the bottom electrode layer of the RAM structure has a lateral portion and a vertical portion, and the vertical portion upwardly extends from the lateral portion to a position higher than a top surface of the dielectric layer.
    Type: Application
    Filed: November 3, 2023
    Publication date: February 29, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Fu-Chen CHANG, Kuo-Chi TU, Tzu-Yu CHEN, Sheng-Hung SHIH
  • Publication number: 20240074041
    Abstract: A circuit board includes a substrate and a metallic layer. A first area and at least one second area are defined on a portion of the substrate, the second area is located outside the first area. The metallic layer includes first test lines disposed on the first area and second test lines disposed on the second area. A first test pad of each of the first test lines has a first width, and a second test pad of each of the second test lines has a second width. The second width is greater than the first width such that probes of an electrical testing tool can contact the first and second test pads on the circuit board correctly during electrical testing.
    Type: Application
    Filed: August 16, 2023
    Publication date: February 29, 2024
    Inventors: Gwo-Shyan Sheu, Kuo-Liang Huang, Hsin-Hao Huang, Pei-Wen Wang, Yu-Chen Ma
  • Publication number: 20240073981
    Abstract: The present disclosure provides a control method applied to a first electronic device and a second electronic device in a physical environment. The first electronic device and the second electronic device are configured to communicate with each other through a first wireless connection established between the first electronic device and the second electronic device. The control method includes: by at least one of the first electronic device and the second electronic device, determining whether to update a map of the physical environment; and in response to a determination to update the map of the physical environment, establishing a second wireless connection different from the first wireless connection between the first electronic device and the second electronic device, wherein the second wireless connection is configured to transmit a map updated data, and the map updated data is configured to update the map of the physical environment.
    Type: Application
    Filed: August 26, 2022
    Publication date: February 29, 2024
    Inventors: Kai-Hsiu CHEN, WeiChih KUO, Wei-Shen OU
  • Publication number: 20240069299
    Abstract: An optical element driving mechanism includes a movable assembly, a fixed assembly, and a driving assembly. The movable assembly is configured to be connected to an optical element. The movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly in a range of motion. The optical element driving mechanism further includes a positioning assembly configured to position the movable assembly at a predetermined position relative to the fixed assembly when the driving assembly is not operating.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Inventors: Chao-Chang HU, Kuen-Wang TSAI, Liang-Ting HO, Chao-Hsi WANG, Chih-Wei WENG, He-Ling CHANG, Che-Wei CHANG, Sheng-Zong CHEN, Ko-Lun CHAO, Min-Hsiu TSAI, Shu-Shan CHEN, Jungsuck RYOO, Mao-Kuo HSU, Guan-Yu SU
  • Publication number: 20240071722
    Abstract: Embodiments described herein relate to plasma processes. A plasma process includes generating a plasma containing negatively charged oxygen ions. A substrate is exposed to the plasma. The substrate is disposed on a pedestal while being exposed to the plasma. While exposing the substrate to the plasma, a negative direct current (DC) bias voltage is applied to the pedestal to repel the negatively charged oxygen ions from the substrate.
    Type: Application
    Filed: November 8, 2023
    Publication date: February 29, 2024
    Inventors: Sheng-Liang Pan, Bing-Hung Chen, Chia-Yang Hung, Jyu-Horng Shieh, Shu-Huei Suen, Syun-Ming Jang, Jack Kuo-Ping Kuo
  • Patent number: 11912837
    Abstract: The present disclosure provides a thin film including a first thermoplastic polyolefin (TPO) elastomer which is anhydride-grafted. The present disclosure further provides a method for manufacturing the thin film, a laminated material and a method for adhesion.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: February 27, 2024
    Assignee: SAN FANG CHEMICAL INDUSTRY CO., LTD.
    Inventors: Chih-Yi Lin, Kuo-Kuang Cheng, Chi-Chin Chiang, Wen-Hsin Tai, Ming-Chen Chang
  • Patent number: 11876189
    Abstract: A battery module for use in a battery system is operable in a bottom mode, a top mode or a middle mode during an enabled state. The battery module includes a battery unit and a battery control circuit. The battery unit which includes at least one battery generates a battery unit voltage between a positive terminal and a negative terminal of the battery unit. The battery control circuit is powered by the battery unit voltage and is configured to control the battery unit. The battery control circuit includes an enable terminal, an upstream input terminal, an upstream output terminal, a downstream input terminal, and a downstream output terminal. When the enable terminal is at an operation enabling level, or when the upstream input terminal is at an upstream enabling level, the battery module enters the enabled state.
    Type: Grant
    Filed: February 4, 2020
    Date of Patent: January 16, 2024
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Wei-Hsu Chang, Hao-Wen Chung, Chung-Hui Yeh, Kuo-Chen Tsai
  • Patent number: 11854898
    Abstract: A fin structure is on a substrate. The fin structure includes an epitaxial region having an upper surface and an under-surface. A contact structure on the epitaxial region includes an upper contact portion and a lower contact portion. The upper contact portion includes a metal layer over the upper surface and a barrier layer over the metal layer. The lower contact portion includes a metal-insulator-semiconductor (MIS) contact along the under-surface. The MIS contact includes a dielectric layer on the under-surface and the barrier layer on the dielectric layer.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: December 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Sung-Li Wang, Neng-Kuo Chen, Ding-Kang Shih, Meng-Chun Chang, Yi-An Lin, Gin-Chen Huang, Chen-Feng Hsu, Hau-Yu Lin, Chih-Hsin Ko, Sey-Ping Sun, Clement Hsingjen Wann
  • Publication number: 20230368950
    Abstract: A packaging structure with a magnetocaloric material, comprising a substrate, a plurality of electrical connection structures, a die, and a sealing compound. A magnetocaloric material is added to the substrate. The die is electrically connected to the substrate through the electrical connection structures, and then encapsulated with the sealing compound. When the packaging structure is turned on, the magnetocaloric material in the substrate creates a magnetocaloric effect, which can not only take away the temperature of the packaging structure through magnetic refrigeration, but also increase the temperature difference between the packaging structure and the outside, thereby improving the efficiency of heat dissipation.
    Type: Application
    Filed: May 11, 2022
    Publication date: November 16, 2023
    Inventors: Wen Nan Huang, Ching Kuo Chen, Chih Ming Yu, Hsiang Chi Meng, I Ming Lo
  • Publication number: 20230360553
    Abstract: A method for creating a modified flight simulation program for a flight simulation system includes: obtaining a demonstration flight record associated with a preset track route of a virtual airplane; generating an add-on content pack for the flight simulation program based on the demonstration flight record; and merging the add-on content pack to the flight simulation program to create a modified flight simulation program. The generation of the add-on content pack includes: mapping the preset track route to geographical coordinate data in the real world, creating a first program module associated with a demonstration mode enabling a demonstration virtual flight along the preset track route, creating a second program module associated with an assisted flight mode enabling user control for a virtual flight within a free-flight space, and creating the add-on content pack that includes the first and the second program modules.
    Type: Application
    Filed: May 3, 2023
    Publication date: November 9, 2023
    Inventors: Kuo-Chen Chen, Po-Hsiung Chang, Ying-Yun Chang, Wan-Yu Chung, Che-Jen Yeh
  • Publication number: 20230361203
    Abstract: Apparatus and methods are disclosed, including transistors, memory devices and systems. Example transistors, memory devices, systems and methods include an inter-gate dielectric structure between adjacent gates, wherein the inter-gate dielectric structure includes a first dielectric material adjacent a fin channel, and a second dielectric material different from the first dielectric material located over the first dielectric material.
    Type: Application
    Filed: May 6, 2022
    Publication date: November 9, 2023
    Inventors: Neng-Kuo Chen, Jun Zhao, Andrew Dennis Carswell
  • Patent number: 11806088
    Abstract: A method includes providing medical images of a subject for selecting a target image from thereamong, building a 3D image model based on the medical images and the target image with a surgical target site assigned, performing image registration to superimpose the 3D image model on a real-time image of the subject so as to result in a combined image, determining a virtual entry site located on the combined image, connecting the surgical target site and the virtual entry site with a straight line, generating a guiding path extending from the virtual entry site, in a direction away from the surgical target site and along the straight line, and displaying the guiding path for guiding a surgical instrument.
    Type: Grant
    Filed: March 30, 2021
    Date of Patent: November 7, 2023
    Assignees: CHANG GUNG UNIVERSITY, CHANG GUNG MEMORIAL HOSPITAL, KEELUNG
    Inventors: Shin-Yan Chiou, Pin-Yuan Chen, Hao-Li Liu, Kuo-Chen Wei
  • Patent number: 11801504
    Abstract: Provided is a hydrophilic phosphorus ligand with the structure of formula 1. X is Y is m is an integer from 1 to 20, A independently is *ā€”O(CH2)nā€”, n is an integer from 1 to 5, *ā€” is a bond close to triphenylphosphine, and ā€” is a bond away from triphenylphosphine.
    Type: Grant
    Filed: July 11, 2022
    Date of Patent: October 31, 2023
    Assignee: Industrial Technology Research Institute
    Inventors: Mao-Lin Hsueh, Yi-Zhen Chen, Kuo-Chen Shih
  • Patent number: 11804834
    Abstract: An electromagnetic interference regulator by use of capacitive parameters of the field-effect transistor for detecting the induced voltage and the induced current of the field-effect transistor to determine whether the operating frequency of the field-effect transistor is within the preset special management frequency of electromagnetic interference. When the basic frequency and the multiplied frequency exceed the limit, the content of the external capacitor unit can be adjusted to assist the products using field-effect transistors to maintain excellent electromagnetic interference adjustment capabilities under various loads, thereby optimizing the characteristics of electromagnetic interference.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: October 31, 2023
    Assignee: POTENS SEMICONDUCTOR CORP.
    Inventors: Wen Nan Huang, Ching Kuo Chen, Shiu Hui Lee, Hsiang Chi Meng, Cho Lan Peng, Chuo Chien Tsao