Patents by Inventor Kuo-Lung Fang
Kuo-Lung Fang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160118478Abstract: A method of manufacturing a thin film transistor substrate is provided, including a first photoresist pattern covers a channel during a process of etching a second photoresist pattern and protects the channel. Thus, an etching stop layer is not required.Type: ApplicationFiled: December 30, 2014Publication date: April 28, 2016Inventors: KUO-LUNG FANG, YI-CHUN KAO, PO-LI SHIH, CHIH-LUNG LEE, HSIN-HUA LIN
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Patent number: 9285648Abstract: An electro-optical apparatus including a first substrate, a second substrate disposed opposite to the first substrate, a display medium layer disposed between the first substrate and the second substrate, a first electrode disposed between the first substrate and the display medium layer, a second electrode disposed between the first substrate and the display medium layer and separated from the first electrode and a third electrode disposed between the display medium layer and the second substrate is provided. The display medium layer includes electrophoretic fluid and charged particles mixed into the electrophoretic fluid. Moreover, driving methods used to drive the electro-optical apparatus and another electro-optical apparatus are also provided.Type: GrantFiled: February 20, 2014Date of Patent: March 15, 2016Assignee: SiPix Technology Inc.Inventors: Nien-En Liu, Kuo-Lung Fang, Yao-Jen Hsieh
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Publication number: 20150110271Abstract: An electric system including a first wireless apparatus, a display apparatus and a second wireless apparatus is provided. A first information is encrypted to be a first encrypted information and sent wirelessly by the first wireless apparatus. The display apparatus includes a display unit and a wireless communication unit electrically connected to the display unit. The wireless communication unit receives the first encrypted information and cause the display unit to display a first representative information corresponding to the first encrypted information. The first representative information and the first encrypted information are different. The second wireless apparatus reads the first encrypted information by the wireless communication unit, and the first encrypted information is decrypted to be the first encrypted information by the second wireless apparatus.Type: ApplicationFiled: August 12, 2014Publication date: April 23, 2015Inventors: Kuo-Lung Fang, Yao-Jen Hsieh, Chi-Hsun Wang
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Publication number: 20150098122Abstract: An electro-optical apparatus including a first substrate, a second substrate disposed opposite to the first substrate, a display medium layer disposed between the first substrate and the second substrate, a first electrode disposed between the first substrate and the display medium layer, a second electrode disposed between the first substrate and the display medium layer and separated from the first electrode and a third electrode disposed between the display medium layer and the second substrate is provided. The display medium layer includes electrophoretic fluid and charged particles mixed into the electrophoretic fluid. Moreover, driving methods used to drive the electro-optical apparatus and another electro-optical apparatus are also provided.Type: ApplicationFiled: February 20, 2014Publication date: April 9, 2015Applicant: SiPix Technology Inc.Inventors: Nien-En Liu, Kuo-Lung Fang, Yao-Jen Hsieh
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Patent number: 8980704Abstract: A manufacturing method of a thin film transistor includes hard-baking and etching processes for a stop layer. Two through holes are exposed and developed in a photoresistor layer, in which a distance between the two through holes is substantially equal to the channel length of the thin film transistor. Further, the etching stop layer is dry-etched to obtain the thin film transistor having an expected channel length.Type: GrantFiled: August 25, 2014Date of Patent: March 17, 2015Assignee: Ye Xin Technology Consulting Co., Ltd.Inventors: I-Wei Wu, I-Min Lu, Wei-Chih Chang, Hui-Chu Lin, Yi-Chun Kao, Kuo-Lung Fang
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Publication number: 20150053974Abstract: A thin film transistor includes a gate electrode, a gate insulating layer, a channel layer, an etching stop layer, two contact holes, a source, and a drain. The gate insulating layer covers the gate electrode. The channel layer is arranged on the gate insulating layer corresponding to the gate electrode. The etching stop layer covers the channel layer and includes an organic stop layer and a hard mask layer, the hard mask layer is located on a surface of the organic stop layer opposite to the channel layer to enhance a hardness of the organic stop layer. The two contact holes pass through the etching stop layer. The source connects to the channel via one contact hole, and the drain connects to the channel via the other contact hole.Type: ApplicationFiled: August 25, 2014Publication date: February 26, 2015Inventors: I-WEI WU, I-MIN LU, WEI-CHIH CHANG, HUI-CHU LIN, YI-CHUN KAO, KUO-LUNG FANG
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Publication number: 20150056761Abstract: A manufacturing method of a thin film transistor includes hard-baking and etching processes for a stop layer. Two through holes are exposed and developed in a photoresistor layer, in which a distance between the two through holes is substantially equal to the channel length of the thin film transistor. Further, the etching stop layer is dry-etched to obtain the thin film transistor having an expected channel length.Type: ApplicationFiled: August 25, 2014Publication date: February 26, 2015Inventors: I-WEI WU, I-MIN LU, WEI-CHIH CHANG, HUI-CHU LIN, YI-CHUN KAO, KUO-LUNG FANG
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Publication number: 20140376164Abstract: A display panel including a driving substrate, a display film, a first protection film, a first adhesion layer, and a sidewall structure is provided. The display film is disposed on the driving substrate. The first protection film is adhered on the display film through the first adhesion layer. The display film is located between the driving substrate and the first protection film. A material of the first adhesion layer is thermal melt-able. The sidewall structure is in contact with a side surface of the display film and includes the material of the first adhesion layer which is melted and re-solidified. In addition, a manufacture method of the display panel includes irradiating the driving substrate the first protection film and the first adhesion layer with a laser to form the sidewall structure in contact with the side surface of the display film.Type: ApplicationFiled: April 2, 2014Publication date: December 25, 2014Applicant: SiPix Technology Inc.Inventors: Jiun-Ru Huang, Kuo-Lung Fang, Yu-Chi Chiu, Yao-Jen Hsieh
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Patent number: 8431929Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a gate disposed thereon, an insulation layer disposed on the substrate and overlying the gate, a patterned semiconductor layer disposed on the insulation layer, a source and a drain disposed on the patterned semiconductor layer, a protective layer overlying the insulation layer, the source and the boundary of the drain to expose a portion of the drain, and a pixel electrode disposed on the substrate, overlying the protective layer overlying the boundary of the drain, electrically connected to the exposed drain.Type: GrantFiled: December 9, 2009Date of Patent: April 30, 2013Assignee: AU Optronics Corp.Inventors: Kuo-Lung Fang, Chih-Chun Yang, Han-Tu Lin
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Patent number: 8426894Abstract: A pixel structure includes a scan line, a data line, an active element, a first passivation layer, a second passivation layer and a pixel electrode. The data line includes a first data metal segment and a second data metal layer. The active element includes a gate electrode, an insulating layer, a channel layer, a source and a drain. The channel layer is positioned on the insulating layer above the gate electrode. The source and the drain are positioned on the channel layer. The source is coupled to the data line. The first passivation layer and the second passivation layer cover the active element and form a first contact hole to expose a part of the drain. The second passivation layer covers a part edge of the drain. The pixel electrode is disposed across the second passivation layer and coupled to the drain via the first contact hole.Type: GrantFiled: June 20, 2011Date of Patent: April 23, 2013Assignee: Au Optronics CorporationInventors: Kuo-Lung Fang, Hsiang-Lin Lin, Chin-Yueh Liao
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Patent number: 8420463Abstract: A pixel structure includes a scan line, a data line, an active element, a first passivation layer, a second passivation layer and a pixel electrode. The data line includes a first data metal segment and a second data metal layer. The active element includes a gate electrode, an insulating layer, a channel layer, a source and a drain. The channel layer is positioned on the insulating layer above the gate electrode. The source and the drain are positioned on the channel layer. The source is coupled to the data line. The first passivation layer and the second passivation layer cover the active element and form a first contact hole to expose a part of the drain. The second passivation layer covers a part edge of the drain. The pixel electrode is disposed across the second passivation layer and coupled to the drain via the first contact hole.Type: GrantFiled: June 20, 2011Date of Patent: April 16, 2013Assignee: Au Optronics CorporationInventors: Kuo-Lung Fang, Hsiang-Lin Lin, Chin-Yueh Liao
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Publication number: 20130062657Abstract: A light-emitting diode structure is disclosed. A substrate has a first semiconductor layer, a light-emitting layer and a second semiconductor layer formed thereon. The first and second semiconductor layers are of opposite conductivity types. A first contact electrode is disposed between the first semiconductor layer and the substrate, and has a protruding portion extending into the second semiconductor layer. A barrier layer is conformally formed on the first contact electrode and exposes a top surface of the protruding portion. A current blocking member is disposed on the barrier layer and around at least a sidewall of the protruding portion. A second contact electrode is disposed between the first semiconductor layer and the first contact electrode, and in direct contact with the first semiconductor layer, wherein the second contact electrode is electrically insulated from the first contact electrode by the barrier layer.Type: ApplicationFiled: September 13, 2012Publication date: March 14, 2013Applicant: LEXTAR ELECTRONICS CORPORATIONInventors: Kuo-Lung Fang, Jui-Yi Chu, Jun-Rong Chen, Chi-Wen Kuo
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Publication number: 20130048945Abstract: A method for fabricating a light-emitting device is provided. The method includes: providing a substrate; forming a sacrificial dielectric layer on the substrate, wherein the sacrificial dielectric layer is a structure containing voids; forming a buffer layer on the sacrificial dielectric layer; forming an epitaxial light-emitting structure on the buffer layer; forming a metal bonding layer on the epitaxial light-emitting structure; bonding the metal bonding layer to a thermally conductive substrate; and wet etching the sacrificial dielectric layer for to remove the substrate.Type: ApplicationFiled: August 21, 2012Publication date: February 28, 2013Applicant: LEXTAR ELECTRONICS CORPORATIONInventors: Kuo-Lung Fang, Chi-Wen Kuo, Jun-Rong Chen, Chih-Hao Yang
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Publication number: 20130049015Abstract: A light emitting diode (LED) is disclosed. The LED includes a substrate, a first semiconductor layer, an active layer, a second semiconductor layer, and a patterned structure. The first semiconductor layer having first and second regions is positioned on the substrate, wherein the first region is thicker than the second region. The active layer is positioned on the first region of the first semiconductor layer. The second semiconductor layer is positioned on the active layer, wherein the first and second semiconductor layers have opposite conductivities. The patterned structure is formed on a sidewall of the first region of the first semiconductor layer or on a sidewall of the second semiconductor layer.Type: ApplicationFiled: August 22, 2012Publication date: February 28, 2013Applicant: LEXTAR ELECTRONICS CORPORATIONInventors: Kuo-Lung Fang, Jui-Yi Chu
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Patent number: 8373179Abstract: A LED chip including a substrate, a semiconductor device layer, a current blocking layer, a current spread layer, a first electrode and a second electrode is provided. The semiconductor device layer is disposed on the substrate. The current blocking layer is disposed on a part of the semiconductor device layer and includes a current blocking segment and a current distribution adjusting segment. The current spread layer is disposed on a part of the semiconductor device layer and covers the current blocking layer. The first electrode is disposed on the current spread layer, wherein a part of the current blocking segment is overlapped with the first electrode. Contours of the current blocking segment and the first electrode are similar figures. Contour of the first electrode and is within contour of the current blocking segment. The current distribution adjusting segment is not overlapped with the first electrode.Type: GrantFiled: June 14, 2011Date of Patent: February 12, 2013Assignee: Lextar Electronics Corp.Inventors: Kuo-Lung Fang, Chien-Sen Weng, Chih-Wei Chao
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Patent number: 8362511Abstract: A semiconductor light emitting structure including a substrate, a second type electrode layer, a reflecting layer, an insulating layer, a first type electrode layer, a first type semiconductor layer, an active layer and a second type semiconductor layer is provided. The second type electrode layer formed on the substrate has a current spreading grating formed by several conductive pillars and conductive walls, which are staggered and connected to each other. The reflecting layer and the insulating layer are formed on the second type electrode layer in sequence, and cover each conductive pillar and each conductive wall. The first type electrode layer, the first type semiconductor layer and the active layer are formed on the insulating layer in sequence. The second type semiconductor layer is formed on the active layer, and covers each conductive pillar and each conductive wall.Type: GrantFiled: September 2, 2011Date of Patent: January 29, 2013Assignee: Lextar Electronics CorporationInventors: Kuo-Lung Fang, Chia-En Lee, Chao-Chen Ye
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Patent number: 8349631Abstract: A method for fabricating a TFT array substrate includes following steps. A gate pattern and a first pad pattern are formed on a substrate. A gate insulation layer and a semiconductor layer covering the two patterns are sequentially formed. A patterned photoresist layer having different resist blocks is formed, and patterns and thicknesses of the resist blocks in different regions are adjusted. The semiconductor layer and the gate insulation layer above the first pad pattern are removed through performing an etching process and reducing a thickness of the patterned photoresist layer. After removing the patterned photoresist layer, a source pattern, a drain pattern, and a second pad pattern electrically connected to the first pad pattern are formed. A patterned passivation layer is formed on the gate insulation layer and has a second opening exposing the source pattern or the drain pattern and a third opening exposing the second pad pattern.Type: GrantFiled: September 6, 2011Date of Patent: January 8, 2013Assignee: Au Optronics CorporationInventors: Shine-Kai Tseng, Han-Tu Lin, Shiun-Chang Jan, Kuo-Lung Fang
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Patent number: 8329487Abstract: In a fabricating method of an LED, a first-type doped semiconductor material layer, a light emitting material layer, and a second-type doped semiconductor material layer are sequentially formed on a substrate. The first-type and second-type doped semiconductor material layers and the light emitting material layer are patterned to form a first-type doped semiconductor layer, an active layer, and a second-type doped semiconductor layer. The active layer is disposed on a portion of the first-type doped semiconductor layer. The second-type doped semiconductor layer is disposed on the active layer and has a first top surface. A wall structure is formed on the first-type doped semiconductor layer that is not covered by the active layer, and the wall structure surrounds the active layer and has a second top surface higher than the first top surface of the second-type doped semiconductor layer. Electrodes are formed on the first-type and second-type doped semiconductor layers.Type: GrantFiled: November 1, 2010Date of Patent: December 11, 2012Assignee: Lextar Electronics Corp.Inventors: Kuo-Lung Fang, Chien-Sen Weng, Chih-Wei Chao
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Publication number: 20120286307Abstract: A semiconductor light emitting structure including a substrate, a second type electrode layer, a reflecting layer, an insulating layer, a first type electrode layer, a first type semiconductor layer, an active layer and a second type semiconductor layer is provided. The second type electrode layer formed on the substrate has a current spreading grating formed by several conductive pillars and conductive walls, which are staggered and connected to each other. The reflecting layer and the insulating layer are formed on the second type electrode layer in sequence, and cover each conductive pillar and each conductive wall. The first type electrode layer, the first type semiconductor layer and the active layer are formed on the insulating layer in sequence. The second type semiconductor layer is formed on the active layer, and covers each conductive pillar and each conductive wall.Type: ApplicationFiled: September 2, 2011Publication date: November 15, 2012Applicant: LEXTAR ELECTRONICS CORPORATIONInventors: Kuo-Lung Fang, Chia-En Lee, Chao-Chen Ye
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Patent number: 8283188Abstract: A method for fabricating a light emitting diode chip is provided. Firstly, a semiconductor device layer is formed on a substrate. Afterwards, a current spreading layer is formed on a portion of the semiconductor device layer. Then, a current blocking layer and a passivation layer are formed on a portion of the semiconductor device layer not covered by the current spreading layer. Finally, a first electrode is formed on the current blocking layer and the current spreading layer. Moreover, a second electrode is formed on the semiconductor device layer.Type: GrantFiled: August 30, 2011Date of Patent: October 9, 2012Assignee: Lextar Electronics Corp.Inventors: Kuo-Lung Fang, Chien-Sen Weng, Chih-Wei Chao