Abstract: Embodiments of the disclosure generally relate to a method for dry stripping a boron carbide layer deposited on a semiconductor substrate. In one embodiment, the method includes loading the substrate with the boron carbide layer into a pressure vessel, exposing the substrate to a processing gas comprising an oxidizer at a pressure between about 500 Torr and 60 bar, heating the pressure vessel to a temperature greater than a condensation point of the processing gas and removing one or more products of a reaction between the processing gas and the boron carbide layer from the pressure vessel.

Abstract: Embodiments described herein generally relate to methods and device structures for horizontal gate all around (hGAA) isolation and fin field effect transistor (FinFET) isolation. A superlattice structure comprising different materials arranged in an alternatingly stacked formation may be formed on a substrate. In one embodiment, at least one of the layers of the superlattice structure is oxidized by a high pressure oxidation process to form a buried oxide layer adjacent the substrate.

Abstract: Embodiments described herein generally relate methods for selective deposition of carbon structures. In one embodiment, a method includes forming energized carbon species in a process chamber, diffusing the energized carbon species through a metal layer, wherein the metal layer is disposed on a first surface of a first material that is coplanar with a second surface of a second material, and forming a carbon structure between the first surface of the first material and the metal layer from the energized carbon species. Because the carbon structure is selectively deposited on the first surface and self-aligned to the first material, the possibility of overlay or misalignment of subsequent device layers formed on the first surface of the first material after the removal of the carbon structure is significantly reduced.

Abstract: Embodiments of the disclosure relate to an apparatus and method for annealing one or more semiconductor substrates. In one embodiment, a processing chamber is disclosed. The processing chamber includes a chamber body enclosing an internal volume, a substrate support disposed in the internal volume and configured to support a substrate during processing, a gas panel configured to provide a processing fluid into the internal volume, and a temperature-controlled fluid circuit configured to maintain the processing fluid at a temperature above a condensation point of the processing fluid. The temperature-controlled fluid circuit includes a gas conduit fluidly coupled to a port on the chamber body at a first end and to the gas panel at a second end.

Abstract: Aspects of the disclosure include methods of processing a substrate. The method includes depositing a conformal layer on a substrate which contains seams. The substrate is treated using a high pressure anneal in the presence of an oxidizer.

Abstract: Implementations described herein generally relate to methods for forming a low-k dielectric material on a semiconductor substrate. More specifically, implementations described herein relate to methods of forming a silicon oxide film at high pressure and low temperatures. In one implementation, a method of forming a silicon oxide film is provided. The method comprises loading a substrate having a silicon-containing film formed thereon into a processing region of a high-pressure vessel. The method further comprises forming a silicon oxide film on the silicon-containing film. Forming the silicon oxide film on the silicon-containing film comprises exposing the silicon-containing film to a processing gas comprising steam at a pressure greater than about 1 bar and maintaining the high-pressure vessel at a temperature between about 100 degrees Celsius and about 500 degrees Celsius.

Abstract: The present disclosure generally relates to apparatus and methods for forming a low-k dielectric material on a substrate. The method includes various substrate processing steps utilizing a wet processing chamber, a solvent exchange chamber, and a supercritical fluid chamber. More specifically, a dielectric material in an aqueous solution may be deposited on the substrate and a solvent exchange process may be performed to prepare the substrate for a supercritical drying process. During the supercritical drying process, liquids present in the solution and remaining on the substrate from the solvent exchange process are removed via sublimation during the supercritical drying process. The resulting dielectric material formed on the substrate may be considered a silica aerogel which exhibits a very low k-value.

Abstract: Embodiments of the disclosure relate to an apparatus and method for annealing one or more semiconductor substrates. In one embodiment, a processing chamber is disclosed. The processing chamber includes a chamber body enclosing an internal volume, a substrate support disposed in the internal volume and configured to support a substrate during processing, a gas panel configured to provide a processing fluid into the internal volume, and a temperature-controlled fluid circuit configured to maintain the processing fluid at a temperature above a condensation point of the processing fluid. The temperature-controlled fluid circuit includes a gas conduit fluidly coupled to a port on the chamber body at a first end and to the gas panel at a second end.

Abstract: Embodiments of the invention generally include apparatus and methods for depositing nanowires in a predetermined pattern during an electrospinning process. An apparatus includes a nozzle for containing and ejecting a deposition material, and a voltage source coupled to the nozzle to eject the deposition material. One or more electric field shaping devices are positioned to shape the electric field adjacent to a substrate to control the trajectory of the ejected deposition material. The electric field shaping device converges an electric field at a point near the surface of the substrate to accurately deposit the deposition material on the substrate in a predetermined pattern. The methods include applying a voltage to a nozzle to eject an electrically-charged deposition material towards a substrate, and shaping one or more electric fields to control the trajectory of the electrically-charged deposition material. The deposition material is then deposited on the substrate in a predetermined pattern.

Abstract: Embodiments of the disclosure relate to an apparatus and method for annealing semiconductor substrates. In one embodiment, a batch processing chamber is disclosed. The batch processing chamber includes a chamber body enclosing a processing region, a gas panel configured to provide a processing fluid into the processing region, a condenser fluidly connected to the processing region and a temperature-controlled fluid circuit configured to maintain the processing fluid at a temperature above a condensation point of the processing fluid. The processing region is configured to retain a plurality of substrates during processing. The condenser is configured to condense the processing fluid into a liquid phase.

Abstract: Embodiments of the disclosure relate to an apparatus and method for annealing one or more semiconductor substrates. In one embodiment, a processing chamber is disclosed. The processing chamber includes a chamber body enclosing an internal volume, a substrate support disposed in the internal volume and configured to support a substrate during processing, a gas panel configured to provide a processing fluid into the internal volume, and a temperature-controlled fluid circuit configured to maintain the processing fluid at a temperature above a condensation point of the processing fluid. The temperature-controlled fluid circuit includes a gas conduit fluidly coupled to a port on the chamber body at a first end and to the gas panel at a second end.

Abstract: Embodiments of the disclosure generally relate to a method of processing a semiconductor substrate at a temperature less than 250 degrees Celsius. In one embodiment, the method includes loading the substrate with the deposited film into a pressure vessel, exposing the substrate to a processing gas comprising an oxidizer at a pressure greater than about 2 bars, and maintaining the pressure vessel at a temperature between a condensation point of the processing gas and about 250 degrees Celsius.

Abstract: Embodiments of the disclosure generally relate to a method for dry stripping a boron carbide layer deposited on a semiconductor substrate. In one embodiment, the method includes loading the substrate with the boron carbide layer into a pressure vessel, exposing the substrate to a processing gas comprising an oxidizer at a pressure between about 500 Torr and 60 bar, heating the pressure vessel to a temperature greater than a condensation point of the processing gas and removing one or more products of a reaction between the processing gas and the boron carbide layer from the pressure vessel.

Abstract: Embodiments described herein generally relate methods for selective deposition of carbon structures. In one embodiment, a method includes forming energized carbon species in a process chamber, diffusing the energized carbon species through a metal layer, wherein the metal layer is disposed on a first surface of a first material that is coplanar with a second surface of a second material, and forming a carbon structure between the first surface of the first material and the metal layer from the energized carbon species. Because the carbon structure is selectively deposited on the first surface and self-aligned to the first material, the possibility of overlay or misalignment of subsequent device layers formed on the first surface of the first material after the removal of the carbon structure is significantly reduced.

Abstract: Embodiments of the disclosure generally relate to a method of improving quality of a barrier layer suitable for forming high aspect ratio through substrate vias. In one example, a method for depositing a barrier layer includes depositing a barrier layer in a hole formed in a substrate, exposing the deposited barrier layer to a processing gas at a pressure greater than about 2 bars, and, maintaining a temperature of the substrate between about 150 degrees and about 700 degrees Celsius while in the presence of the processing gas.

Abstract: A method of device processing. The method may include providing a cavity in a layer, directing energetic flux to a bottom surface of the cavity, performing an exposure of the cavity to a moisture-containing ambient, and introducing a fill material in the cavity using an atomic layer deposition (ALD) process, wherein the fill material is selectively deposited on the bottom surface of the cavity with respect to a sidewall of the cavity.

Abstract: A method of device processing. The method may include providing a cavity in a layer, directing energetic flux to a bottom surface of the cavity, performing an exposure of the cavity to a moisture-containing ambient, and introducing a fill material in the cavity using an atomic layer deposition (ALD) process, wherein the fill material is selectively deposited on the bottom surface of the cavity with respect to a sidewall of the cavity.

Abstract: The present disclosure generally relates to apparatus and methods for forming a low-k dielectric material on a substrate. The method includes various substrate processing steps utilizing a wet processing chamber, a solvent exchange chamber, and a supercritical fluid chamber. More specifically, a dielectric material in an aqueous solution may be deposited on the substrate and a solvent exchange process may be performed to prepare the substrate for a supercritical drying process. During the supercritical drying process, liquids present in the solution and remaining on the substrate from the solvent exchange process are removed via sublimation during the supercritical drying process. The resulting dielectric material formed on the substrate may be considered a silica aerogel which exhibits a very low k-value.

Abstract: A method of device processing. The method may include providing a cavity in a layer, directing energetic flux to a bottom surface of the cavity, performing an exposure of the cavity to a moisture-containing ambient, and introducing a fill material in the cavity using an atomic layer deposition (ALD) process, wherein the fill material is selectively deposited on the bottom surface of the cavity with respect to a sidewall of the cavity.

Abstract: The present invention generally relates to a thin film semiconductor device having a buffer layer formed between the semiconductor layer and one or more layers. In one embodiment, a thin film semiconductor device includes a semiconductor layer having a first work function and a first electron affinity level, a buffer layer having a second work function greater than the first work function and a second electron affinity level that is less than the first electron affinity level; and a gate dielectric layer having a third work function less than the second work function and a third electron affinity level that is greater than the second electron affinity level.