Patents by Inventor Kwang Ho Kim

Kwang Ho Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100124101
    Abstract: Provided is a phase-change random access memory device. The phase-change random access memory device includes a phase-change memory cell array having multiple phase-change memory cells, a sensing unit and a discharge unit. The sensing unit detects data, stored in a phase-change memory cell to be sensed of the multiple phase-change memory cells, during a sensing period. The discharge unit discharges at least one node of multiple nodes positioned on a sensing path between the phase-change memory cell array and the sensing unit during a period other than the sensing period.
    Type: Application
    Filed: July 9, 2009
    Publication date: May 20, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Mu-hui Park, Soo-guil Yang, Kwang-ho Kim
  • Publication number: 20100124105
    Abstract: Disclosed is a semiconductor memory device including a memory cell array having a plurality of variable resistance memory cells divided into first and second areas. An I/O circuit is configured to access the memory cell array under the control of control logic so as to access the first or second area in response to an external command. The I/O circuit accesses the first area using a memory cell unit and the second area using a page unit.
    Type: Application
    Filed: January 25, 2010
    Publication date: May 20, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Qi WANG, Kwang-Jin LEE, Woo-Yeong CHO, Taek-Sung KIM, Kwang-Ho KIM, Hyun-Ho CHOI, Yong-Jun LEE, Hye-Jin KIM
  • Patent number: 7711340
    Abstract: A phase locked loop and method thereof are provided. The example phase locked loop may include a loop filter filtering a charge pump output signal to generate a voltage signal and a voltage-controlled oscillator configured to operate in a given one of a plurality of frequency zones, the given frequency zone within which the voltage-controller oscillator is operating in being based on a voltage level of the voltage signal, the voltage-controlled oscillator outputting an oscillator signal at a frequency corresponding to the voltage level of the voltage signal output from the loop filter. The example method may include filtering a charge pump output signal to generate a voltage signal and outputting an oscillator signal at a frequency corresponding to a voltage level of the voltage signal, the frequency of the oscillator signal based on which of a plurality of frequency zones is currently selected, the currently selected frequency zone being selected based on the voltage level of the voltage signal.
    Type: Grant
    Filed: January 23, 2007
    Date of Patent: May 4, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwang-ho Kim, Je-kook Kim
  • Publication number: 20090251953
    Abstract: A variable resistance memory device includes a variable resistance memory cell array including a plurality of variable resistance memory cells; a plurality of global word lines configured to drive the variable resistance memory cell array; and a plurality of local word line decoders. Each of the plurality of local word line decoders includes a first transistor having a gate connected to the global word line. A voltage greater than an operation voltage of one or more of the plurality of local word line decoders is applied to a selected one of the plurality of global word lines.
    Type: Application
    Filed: December 19, 2008
    Publication date: October 8, 2009
    Inventors: Byung-gil Choi, Kwang-ho Kim
  • Publication number: 20090251954
    Abstract: Disclosed is a semiconductor memory device including a memory cell array having a plurality of variable resistance memory cells divided into first and second areas. An I/O circuit is configured to access the memory cell array under the control of control logic so as to access the first or second area in response to an external command. The I/O circuit accesses the first area using a memory cell unit and the second area using a page unit.
    Type: Application
    Filed: April 3, 2009
    Publication date: October 8, 2009
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Qi WANG, Kwang-Jin LEE, Woo-Yeong CHO, Taek-Sung KIM, Kwang-Ho KIM, Hyun-Ho CHOI
  • Publication number: 20090235036
    Abstract: A semiconductor memory device includes a memory cell array and the memory cell array includes: a plurality of memory blocks and at least one setting unit. The at least one setting unit stores a location and a size of a boot data storage region within the plurality of memory blocks that stores boot data. The at least one setting units may include a register for setting usage of each memory block as a boot block. The semiconductor device may be a phase-change memory.
    Type: Application
    Filed: March 11, 2009
    Publication date: September 17, 2009
    Inventors: Yu-hwan RO, Kwang-ho Kim, Kwang-jin Lee, Joon-yong Choi
  • Publication number: 20090168494
    Abstract: In one embodiment, the semiconductor device includes a non-volatile memory cell array, a write circuit configured to write to the non-volatile memory cell array, and a control circuit. The control circuit is configured to store at least one erase indicator. The erase indicator is associated with at least a portion of the non-volatile memory cell array and indicates a logic state. The control circuit is configured to control the write circuit to write the logic state indicated by the erase indicator in the non-volatile memory cell array during an erase operation of the associated portion of the non-volatile memory cell array.
    Type: Application
    Filed: December 23, 2008
    Publication date: July 2, 2009
    Inventors: Yong-Jun Lee, Kwang-Jin Lee, Taek-Sung Kim, Kwang-Ho Kim, Woo-Yeong Cho, Hyun-Ho Choi, Hye Jin Kim
  • Publication number: 20090122601
    Abstract: Embodiments of the invention provide a power supplying circuit (PSC) and a phase-change random access memory (PRAM) including the PSC. According to an aspect of the invention, the PSC includes: a first voltage generator configured to output a first voltage to a first terminal; and a second voltage generator configured to output a second voltage to a second terminal, the second voltage generator including: a voltage pump unit configured to output the second voltage based on a clock signal and a pump control signal; a pump output detector coupled to the voltage pump unit, the pump output detector configured to output a pump output detection signal; and a discharging unit coupled to the voltage pump unit, the discharging unit configured to discharge a level of the second voltage to a predetermined level in response to a discharge signal. Embodiments of the invention may prevent write and/or read malfunctions that can occur due to changes in the level of a voltage supplied to PRAM cell blocks.
    Type: Application
    Filed: October 15, 2008
    Publication date: May 14, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Beak-hyung CHO, Kwang-ho KIM, Won-seok LEE
  • Publication number: 20090122593
    Abstract: A write driver circuit for a memory that includes phase-change memory cells changeable between a RESET state resistance and a SET state resistance in response to an applied current pulse, the write driver circuit including a write current level adjusting unit configured to determine first to n-th SET state current levels in response to a SET state current level signal, where n is an integer greater than 1, and configured to determine a RESET state current level in response to a RESET state current level signal, and a write current output unit configured to generate one of a SET state current pulse and a RESET state current pulse corresponding to a SET state current level or a RESET state current level determined by the write current level adjusting unit.
    Type: Application
    Filed: November 13, 2008
    Publication date: May 14, 2009
    Inventors: Beak-hyung Cho, Kwang-ho Kim, Young-pil Kim
  • Patent number: 7487051
    Abstract: The present invention relates to a method of evaluating the fracture toughness of a material using the continuous indentation technique. In the method of this invention, the stress coefficient, strain hardening modulus and yield stress of the material are determined using the continuous indentation technique and, thereafter, the reduced elastic modulus (Er) of the material is calculated. The effective elastic modulus and the initial elastic modulus are calculated and, thereafter, the damage parameter is calculated using the void volume fraction. The critical elastic modulus and the characteristic fracture initiation point of the indentation depth are determined using the damage parameter and, thereafter, the fracture toughness of the material is evaluated. The present invention is advantageous in that the fracture toughness of a brittle material can be evaluated precisely using a nondestructive evaluation technique.
    Type: Grant
    Filed: September 14, 2005
    Date of Patent: February 3, 2009
    Assignee: Frontics, Inc.
    Inventors: Kwang-Ho Kim, Jung-Suk Lee, Yang-Won Seo, Yeol Choi
  • Patent number: 7472603
    Abstract: The present invention relates to a method of measuring residual stress and, more particularly, to a residual stress measuring method using a continuous indentation tester. Due to pile-up and sink-in of a material or a blunted tip, a conventional residual stress measuring method cannot compensate for error of a real contact (indentation) depth or directly remove stress through a thermal or mechanical technique in the conventional method of measuring residual stress of a weldment, so that it is very difficult to estimate a stress-free reference curve or to quantitatively measure residual stress. However, the present invention can precisely estimate a stress-free curve of a weldment using an indentation strength ratio (OIT ratio) of a stress-free base metal to the weldment, and compensates for error, occurring in the measurement of a material having a weldment or an anisotropic stress structure, based on the indentation strength ratio, thereby more precisely measuring residual stress.
    Type: Grant
    Filed: November 22, 2005
    Date of Patent: January 6, 2009
    Assignees: Frontics, Inc.
    Inventor: Kwang Ho Kim
  • Publication number: 20080251632
    Abstract: The present invention provides a wing-flapping flying apparatus, which can fly by moving its wings similar to a bird hovering or flying in the air by flapping its wings. The wing-flapping flying apparatus comprises: a body; a rotating shaft rotatably joined to the body; driving means for rotating the rotating shaft; and wings reciprocated between two points and connected to the rotating shaft so as to be rotated together with the rotating shaft and to be relatively torsionally rotated with respect to the rotating shaft. The wing-flapping flying apparatus generates lift throughout an entire wing-flapping movement without generating lift only throughout the half of a wing-flapping movement or offsetting the generated lift by the other half of the wing-flapping movement. Therefore, the wing-flapping flying apparatus can provide not only a stable flight but also a softly hovering or ascending and descending flight.
    Type: Application
    Filed: February 8, 2006
    Publication date: October 16, 2008
    Inventors: Kwang Ho Kim, Jae Hak Jeon, Yoon Joo Kim
  • Patent number: 7431571
    Abstract: A muffler for a hermetic rotary compressor including a muffler body forming a plurality of noise reducing spaces in which refrigerant gas flows; a discharge port formed on the muffler body so as to be located on the nose reducing spaces side; and a guide cover coupled to an inner wall of the muffler body in radial direction for guiding the refrigerant gas flowing in the noise reducing spaces to be discharged to the discharge port, and therefore the noise generated during the discharge of the compressed refrigerant gas to inside a sealed chamber, and a flow resistance for the discharged refrigerant gas is reduced, whereby the electric power consumption is reduced, and the structure and assembling processes can be simplified.
    Type: Grant
    Filed: November 16, 2001
    Date of Patent: October 7, 2008
    Assignee: LG Electronics Inc.
    Inventors: Young-Jong Kim, Jong-Hun Ha, Byung-Ha Ahn, Kwang-Ho Kim, Sang-Myung Byun
  • Publication number: 20080157833
    Abstract: A method and apparatus for generating multi-phase clock signals. The multi-phase generating method includes: generating L reference clock signal groups having predetermined phase delay intervals from an external clock signal, wherein each reference clock signal group includes M sub reference clock signals; averaging phases of sub reference clock signals for each reference clock signal group, and generating L main reference clock signals from the L×M sub reference clock signals; and sequentially delaying the L main reference clock signals, and generating the N multi-phase clock signals having the different phases. Because a plurality of clock signals having equal phase delay intervals between each other are generated regardless of the frequency of a received clock signal, the yield of Delay Locked Loop (DLL) circuits is improved using the multi-phase generating apparatus.
    Type: Application
    Filed: October 17, 2007
    Publication date: July 3, 2008
    Inventors: Jin-hyuk Jeung, Kwang-ho Kim
  • Patent number: 7391152
    Abstract: The present invention discloses an inorganic thin layer which is composed of an inorganic composite containing at least two kinds of inorganic materials and shows excellent moisture and oxygen proof, an organic electroluminescence device including the inorganic thin layer as a passivation layer, and a fabrication method thereof.
    Type: Grant
    Filed: August 23, 2004
    Date of Patent: June 24, 2008
    Assignee: Korea Institute of Science and Technology
    Inventors: Byeong-Kwon Ju, Jai-Kyeong Kim, Young-Chul Kim, Hoon Kim, Kwang-Ho Kim, Joo-Won Lee
  • Publication number: 20080141782
    Abstract: The present invention relates to a method of measuring residual stress and, more particularly, to a residual stress measuring method using a continuous indentation tester. Due to pile-up and sink-in of a material or a blunted tip, a conventional residual stress measuring method cannot compensate for error of a real contact (indentation) depth or directly remove stress through a thermal or mechanical technique in the conventional method of measuring residual stress of a weldment, so that it is very difficult to estimate a stress-free reference curve or to quantitatively measure residual stress. However, the present invention can precisely estimate a stress-free curve of a weldment using an indentation strength ratio (OIT ratio) of a stress-free base metal to the weldment, and compensates for error, occurring in the measurement of a material having a weldment or an anisotropic stress structure, based on the indentation strength ratio, thereby more precisely measuring residual stress.
    Type: Application
    Filed: November 22, 2005
    Publication date: June 19, 2008
    Applicants: Frontics, Inc., Won Seok Jung
    Inventor: Kwang Ho Kim
  • Patent number: 7344366
    Abstract: A hermetic compressor is disclosed to reduce a production cost, for which low temperature and low pressure gas passes inside a case to reduce a pressure inside the case so that it is not necessary to increase the thickness of the case and to reinforce a strength. The hermetic compressor includes a case having a suction tube and a discharge tube; a driving unit installed at an upper side of the case and generating a driving force; and a compressing unit installed at a lower side of the case and connected to the driving unit by a rotational shaft so as to compress the low temperature and low pressure gas sucked into the case through the suction tube by a rotational force generated from the driving unit and discharge the gas through the discharge tube.
    Type: Grant
    Filed: June 18, 2002
    Date of Patent: March 18, 2008
    Assignee: LG Electronics Inc.
    Inventor: Kwang-Ho Kim
  • Patent number: 7342620
    Abstract: In a color filter array panel that includes a plurality of red, green and blue color filters for a plurality of red, green and blue pixels, respectively, the blue pixels have a higher contrast ratio than the red pixels and the green pixels. A liquid crystal display utilizing the color filter array panel may be used as a monitor and as a television set as it meets the required display characteristics of both.
    Type: Grant
    Filed: July 2, 2004
    Date of Patent: March 11, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chul Huh, Kwang-Ho Kim, Byoung-Joo Kim, Sang-Hun Lee
  • Patent number: 7329959
    Abstract: There is provided a micro power generator enhanced in efficiency and power generation output, and having an increased temperature range for operation. The micro power generator comprises: a high-temperature heat source; a low-temperature heat source; an enclosed body containing a working substance therein, the enclosed body being deformable by means of a phase change of the working substance between a first shape wherein heat can be transferred from the high-temperature heat source and a second shape wherein heat can be transferred to the low-temperature heat source; a permanent magnet constituting the enclosed body, the permanent magnet being maintained in a first position when the enclosed body has the first shape and in a second position when the enclosed body has the second shape; and a wire in which an electric current is induced by a movement of the permanent magnet.
    Type: Grant
    Filed: February 27, 2006
    Date of Patent: February 12, 2008
    Assignee: Korea Institute of Science and Technology
    Inventors: Kwang Ho Kim, Gwi Eun Song, Jae Hak Jeon, Yoon Pyo Lee
  • Publication number: 20080010031
    Abstract: The present invention relates to a method of evaluating the fracture toughness of a material using the continuous indentation technique. In the method of this invention, the stress coefficient, strain hardening modulus and yield stress of the material are determined using the continuous indentation technique and, thereafter, the reduced elastic modulus (Er) of the material is calculated. The effective elastic modulus and the initial elastic modulus are calculated and, thereafter, the damage parameter is calculated using the void volume fraction. The critical elastic modulus and the characteristic fracture initiation point of the indentation depth are determined using the damage parameter and, thereafter, the fracture toughness of the material is evaluated. The present invention is advantageous in that the fracture toughness of a brittle material can be evaluated precisely using a nondestructive evaluation technique.
    Type: Application
    Filed: September 14, 2005
    Publication date: January 10, 2008
    Applicant: Frontics, Inc.
    Inventors: Kwang Ho Kim, Jung-Suk Lee, Yang-Won Seo, Yeol Choi