Abstract: A plasma reactor of the present invention includes a plurality of electrode units, at least two spacers, a first connection unit, and a second connection unit, wherein the plurality of electrode units are mutually layered, the at least two spacers are positioned into each space between the plurality of electrode units, the first connection unit electrically connects odd numbered electrode units of the plurality of electrode units with each other, and the second connection unit electrically connects even numbered electrode units of the plurality of electrode units with each other.

Abstract: Methods of forming a semiconductor device are provided by forming a gate pattern that includes a gate electrode on a substrate. Lightly doped impurity diffusion layers are formed in the substrate at both sides of the gate pattern. Spacers are formed on sidewalls of the gate pattern. The spacers having a bottom width. Impurity ions are implanted using the gate pattern and the spacer as a mask to form a heavily doped impurity diffusion layer in the substrate. The spacers are removed. A conformal etch stop layer is formed on the gate pattern and the substrate. The etch stop layer is formed to a thickness of at least the bottom width of the spacers.

Abstract: The present invention discloses methods for manufacturing a metal line of a semiconductor device that can prevent undesirable etching of an edge of an interlayer insulating film. In accordance with the method, a lower metal line exposed by a via contact hole is covered by a photoresist film pattern which is formed via an exposure and development process using an upper metal line mask. An etching process is performed using the photoresist film pattern as a mask to form the upper metal line region that is then filled to form an upper metal line after removing the photoresist film pattern.

Abstract: An apparatus and method for providing a security function of frames transmitted between optical network terminals (OLTs) and optical network units (ONUs) in an Ethernet passive optical network (EPON) providing media access control (MAC) services are provided.

Abstract: The present invention relates to a method for fabricating a semiconductor device using tungsten as a sacrificial hard mask material. The method includes the steps of: forming a layer on an etch target layer; forming a photoresist pattern on the layer; etching the layer by using the photoresist pattern as an etch mask along with use of a plasma containing CHF3 gas to form a sacrificial hard mask; and etching the etch target layer by using at least the sacrificial hard mask as an etch mask, thereby obtaining a predetermined pattern.

Abstract: A method for fabricating a semiconductor device capable of minimizing deformations of a photoresist pattern and losses of a hard mask. The method includes the steps of: forming an insulating layer for a hard mask on an etch-target layer; forming a sacrificial layer on the insulating layer; forming a photoresist pattern on the sacrificial layer; forming at least one sacrificial hard mask by etching the sacrificial layer with the photoresist pattern as an etching mask; forming the hard mask by etching the insulating layer with the sacrificial hard mask as an etching mask; and forming a predetermined number of patterns by etching the etch-target layer with use of the sacrificial hard mask and the hard mask as etching masks.

Abstract: A method of determining an optical disc type and a data recording and/or reproducing apparatus. The method of determining the type of an optical disc loaded in a data recording and/or reproducing apparatus includes reading optical disc type determination order stored in a memory included in the data recording and/or reproducing apparatus in order to determine a type of the optical disc from a plurality of optical disc types, and controlling a read/write unit in the data recording and/or reproducing apparatus according to the determination order to determine the type of the optical disc. According to the present invention, an optical disc using pattern of users, optical disc using frequency according to type, and a point of time in which an optical disc is used are considered to change an order for optical disc type determination to allow to rapidly determine the type of a loaded optical disc.

Abstract: Disclosed is a method for fabricating a semiconductor device by using an amorphous carbon layer as a sacrificial hard mask. The method includes the steps of: forming an amorphous carbon layer on an etch target layer; forming a photoresist pattern on the amorphous carbon layer; etching the amorphous carbon layer by using the photoresist pattern to form a sacrificial hard mask; and etching the etch target layer by using the sacrificial hard mask to form a predetermined pattern.

Abstract: The present invention relates to a method for forming a metal line in a semiconductor memory device having a word strapping structure. Especially, the metal line is formed by using a dual hard mask including a tungsten layer and a nitride layer as an etch mask. Also, the metal line includes at least more than one metal layer based on a material selected from titanium nitride and aluminum. Furthermore, for the formation of the dual hard mask, a photoresist pattern to which an ArF photolithography process and a KrF photolithography process are applicable is used. The method includes the steps of: forming a metal structure on a substrate; forming a dual hard mask on the metal structure; forming a photoresist pattern on the dual hard mask; patterning the dual hard mask by using the photoresist pattern as an etch mask; and patterning the metal structure by using the dual hard mask, thereby obtaining the metal line.

Abstract: A clocked-scan flip-flop for multi-threshold CMOS (MTCMOS) is provided. The clocked-scan flip-flop includes a first switching unit which switches normal data that are input from the outside and outputs the data; a second switching unit which switches scan data that are input from the outside and outputs the data; a latch unit which latches the data input from the first switching unit or the second switching unit; and a clock input unit which controls the switching operations of the first and second switching units according to the result of a predetermined operation on a clock signal and a scan clock signal that are input from the outside. The clocked-scan flip-flop has the characteristics of a complementary pass-transistor (CP) flip-flop, that is, low power consumption and high performance. Also, the clocked-scan flip-flop provides a full-scale scan function for test purposes.

Abstract: The present invention discloses methods for manufacturing metal line of semiconductor device that can prevent undesirable etching of an edge of an interlayer insulating film. In accordance with the method, a lower metal line exposed by a via contact hole is covered by a photoresist film pattern which is formed via an exposure and development process using an upper metal line mask. An etching process is performed using the photoresist film pattern as a mask to form the upper metal line region that is then filled to form an upper metal line after removing the photoresist film pattern.

Abstract: The present invention provides a semiconductor device having a silicide thin film and method of forming the same. A semiconductor device comprises a gate insulation layer formed on an active region of a semiconductor substrate. A gate electrode is formed on the gate insulation layer. An impurity region is formed in the active region adjacent the gate electrode. A silicide thin film such as a cobalt silicide thin film is formed to a thickness of less than approximately 200 Å in the impurity region.

Abstract: The present invention provides a semiconductor device having a silicide thin film and method of forming the same. A semiconductor device comprises a gate insulation layer formed on an active region of a semiconductor substrate. A gate electrode is formed on the gate insulation layer. An impurity region is formed in the active region adjacent the gate electrode. A silicide thin film such as a cobalt silicide thin film is formed to a thickness of less than approximately 200 Å in the impurity region.

Abstract: Methods of forming a semiconductor device are provided by forming a gate pattern that includes a gate electrode on a substrate. Lightly doped impurity diffusion layers are formed in the substrate at both sides of the gate pattern. Spacers are formed on sidewalls of the gate pattern. The spacers having a bottom width. Impurity ions are implanted using the gate pattern and the spacer as a mask to form a heavily doped impurity diffusion layer in the substrate. The spacers are removed. A conformal etch stop layer is formed on the gate pattern and the substrate. The etch stop layer is formed to a thickness of at least the bottom width of the spacers.

Abstract: Disclosed is an electronic range including a cavity, in which cooking of food is to be conducted, a heater chamber arranged over the cavity, an axial-flow fan arranged in the heater chamber and adapted to generate a downward flow of air, and a heater arranged outside the axial-flow fan and adapted to generate heat of a high temperature. A convection plate is arranged between the axial-flow fan and the heater. The convection plate serves to control a flow of air circulating in the interior of the electronic range to effectively convect the heat generated from the heater into the cavity during an operation of the axial-flow fan causing a repeated procedure of downwardly introducing the downward flow of air into the cavity, and then upwardly moving the flow of air along a side wall of the cavity. In this electronic range, food disposed in the cavity is heated, using reflection heat generated by the convection plates and convection air generated by the axial-flow fan.

Abstract: A clocked-scan flip-flop for multi-threshold CMOS (MTCMOS) is provided. The clocked-scan flip-flop includes a first switching unit which switches normal data that are input from the outside and outputs the data; a second switching unit which switches scan data that are input from the outside and outputs the data; a latch unit which latches the data input from the first switching unit or the second switching unit; and a clock input unit which controls the switching operations of the first and second switching units according to the result of a predetermined operation on a clock signal and a scan clock signal that are input from the outside. The clocked-scan flip-flop has the characteristics of a complementary pass-transistor (CP) flip-flop, that is, low power consumption and high performance. Also, the clocked-scan flip-flop provides a full-scale scan function for test purposes.

Abstract: Photocatalyst filter, method for fabricating the same, and air cleaner thereof, the photocatalyst filter including a base material of a required shape, an enamel layer consisting of frit for forming an inorganic layer and additives for forming a porous surface layer as main composition coated on a surface of the base material, and a photocatalyst layer consisting of a photocatalyst solution consisting of a photocatalyst and a dispersion solvent and bonding agents as main composition coated on the enamel layer, and the method including the steps of (1) coating an enamel layer on a surface of a base material subjected to pretreatment for removal of foreign matters, the enamel layer consisting of frit for forming an inorganic layer on a surface of the base material and additives for forming a porous surface layer on the surface of the base material as main composition, and (2) coating a photocatalyst layer on the enamel layer; the photocatalyst layer consisting of a photocatalyst solution and bonding agents as m

Abstract: A method for fabricating a semiconductor device capable of minimizing deformations of a photoresist pattern and losses of a hard mask. The method includes the steps of: forming an insulating layer for a hard mask on an etch-target layer; forming a sacrificial layer on the insulating layer; forming a photoresist pattern on the sacrificial layer; forming at least one sacrificial hard mask by etching the sacrificial layer with the photoresist pattern as an etching mask; forming the hard mask by etching the insulating layer with the sacrificial hard mask as an etching mask; and forming a predetermined number of patterns by etching the etch-target layer with use of the sacrificial hard mask and the hard mask as etching masks.