Patents by Inventor Kyosuke Ito

Kyosuke Ito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090321902
    Abstract: The semiconductor device of the invention includes a transistor, an insulating layer provided over the transistor, a first conductive layer (corresponding to a source wire or a drain wire) electrically connected to a source region or a drain region of the transistor through an opening portion provided in the insulating layer, a first resin layer provided over the insulating layer and the first conductive layer, a layer containing conductive particles which is electrically connected to the first conductive layer through an opening portion provided in the first resin layer, and a substrate provided with a second resin layer and a second conductive layer serving as an antenna. In the semiconductor device having the above-described structure, the second conductive layer is electrically connected to the first conductive layer with the layer containing conductive particles interposed therebetween. In addition, the second resin layer is provided over the first resin layer.
    Type: Application
    Filed: September 9, 2009
    Publication date: December 31, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hidekazu Takahashi, Daiki Yamada, Kyosuke Ito, Eiji Sugiyama, Yoshitaka Dozen
  • Patent number: 7605056
    Abstract: The semiconductor device of the invention includes a transistor, an insulating layer provided over the transistor, a first conductive layer (corresponding to a source wire or a drain wire) electrically connected to a source region or a drain region of the transistor through an opening portion provided in the insulating layer, a first resin layer provided over the insulating layer and the first conductive layer, a layer containing conductive particles which is electrically connected to the first conductive layer through an opening portion provided in the first resin layer, and a substrate provided with a second resin layer and a second conductive layer serving as an antenna. In the semiconductor device having the above-described structure, the second conductive layer is electrically connected to the first conductive layer with the layer containing conductive particles interposed therebetween. In addition, the second resin layer is provided over the first resin layer.
    Type: Grant
    Filed: May 18, 2006
    Date of Patent: October 20, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hidekazu Takahashi, Daiki Yamada, Kyosuke Ito, Eiji Sugiyama, Yoshitaka Dozen
  • Patent number: 7354801
    Abstract: In the case where an integrated circuit formed of a thin film is formed over a substrate and peeled from the substrate, a fissure (also referred to as crack) is generated in the integrated circuit in some cases. The present invention is to restrain the generation of a fissure by fixing the proceeding direction of etching in one direction to make a peeled layer warp in one direction in accordance with the proceeding of etching. For example, the proceeding of etching can be controlled by utilizing the fact that a portion where a substrate is in contact with a base insulating layer is not etched in the case of patterning a peeling layer provided over the substrate, then forming the base insulating layer, and then fixing a peeled layer by the portion where the substrate is in contact with the base insulating layer.
    Type: Grant
    Filed: September 20, 2005
    Date of Patent: April 8, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Eiji Sugiyama, Kyosuke Ito
  • Publication number: 20080036680
    Abstract: The present invention provides an antenna in that the adhesive intensity of a conductive body formed on a base film is increased, and a semiconductor device including the antenna. The invention further provides a semiconductor device with high reliability that is formed by attaching an element formation layer and an antenna, wherein the element formation layer is not damaged due to a structure of the antenna. The semiconductor device includes the element formation layer provided over a substrate and the antenna provided over the element formation layer. The element formation layer and the antenna are electrically connected. The antenna has a base film and a conductive body, wherein at least a part of the conductive body is embedded in the base film. As a method for embedding the conductive body in the base film, a depression is formed in the base film and the conductive body is formed therein.
    Type: Application
    Filed: October 18, 2005
    Publication date: February 14, 2008
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kyosuke Ito, Junya Maruyama, Takuya Tsurume, Shunpei Yamazaki
  • Publication number: 20070281391
    Abstract: The invention proposes a method and an apparatus for attaching a plurality of components having different arrangement densities or arrangement intervals, which can achieve shorter takt time. An object is to provide a low-cost manufacturing method of a semiconductor device and a manufacturing apparatus capable of manufacturing a semiconductor device at low cost. Plural pairs of components having different arrangement densities are simultaneously attached to each other by temporarily attaching first components to a first flexible substrate while changing an arrangement interval in an X direction, and then connecting the first components to second components over a second flexible substrate while changing an arrangement interval of the first components in a Y direction.
    Type: Application
    Filed: May 18, 2007
    Publication date: December 6, 2007
    Inventors: Kyosuke Ito, Osamu Nakamura, Yukie Suzuki
  • Publication number: 20070183184
    Abstract: The manufacturing apparatus of a semiconductor device includes a jig having a plurality of holders arranged in a row, a controller for controlling the pitch of the plurality of holders arranged in a row, a support means provided with a plurality of semiconductor integrated circuits, and a support means provided with a substrate having a plurality of elements. By mounting the semiconductor integrated circuits on the respective elements by using the jig having the plurality of holders arranged in a row, semiconductor devices are manufactured.
    Type: Application
    Filed: January 19, 2007
    Publication date: August 9, 2007
    Inventors: Osamu Nakamura, Kyosuke Ito
  • Publication number: 20060267204
    Abstract: The semiconductor device of the invention includes a transistor, an insulating layer provided over the transistor, a first conductive layer (corresponding to a source wire or a drain wire) electrically connected to a source region or a drain region of the transistor through an opening portion provided in the insulating layer, a first resin layer provided over the insulating layer and the first conductive layer, a layer containing conductive particles which is electrically connected to the first conductive layer through an opening portion provided in the first resin layer, and a substrate provided with a second resin layer and a second conductive layer serving as an antenna. In the semiconductor device having the above-described structure, the second conductive layer is electrically connected to the first conductive layer with the layer containing conductive particles interposed therebetween. In addition, the second resin layer is provided over the first resin layer.
    Type: Application
    Filed: May 18, 2006
    Publication date: November 30, 2006
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hidekazu Takahashi, Daiki Yamada, Kyosuke Ito, Eiji Sugiyama, Yoshitaka Dozen
  • Patent number: 7125137
    Abstract: A surface light-emitting unit installed on a floor or wall of a structure is able to emit light from its surface for unique illumination effects. A surface light-emitting unit includes a transparent glass plate that can transmit light; a light-conducting plate installed below the glass plate; a light-emitting means having multiple light-emitting diodes of different colors and installed on the side face of the light-conducting plate; a light-diffusing/reflecting member installed below the light-conducting plate that diffuses and reflects the light; an emission-color selection means for selecting the light-emitting diode to be illuminated or blinked; a casing for providing the transparent glass plate at the top opening; a casing for installing above components; and a connection part that can be connected to other surface light-emitting unit installed adjacently.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: October 24, 2006
    Assignees: B-Sure Co. USA, Kitajima Seisakusho Co., Ltd.
    Inventors: Shigemasa Kitajima, Shinobu Takahashi, Kyosuke Ito
  • Publication number: 20060063309
    Abstract: In the case where an integrated circuit formed of a thin film is formed over a substrate and peeled from the substrate, a fissure (also referred to as crack) is generated in the integrated circuit in some cases. The present invention is to restrain the generation of a fissure by fixing the proceeding direction of etching in one direction to make a peeled layer warp in one direction in accordance with the proceeding of etching. For example, the proceeding of etching can be controlled by utilizing the fact that a portion where a substrate is in contact with a base insulating layer is not etched in the case of patterning a peeling layer provided over the substrate, then forming the base insulating layer, and then fixing a peeled layer by the portion where the substrate is in contact with the base insulating layer.
    Type: Application
    Filed: September 20, 2005
    Publication date: March 23, 2006
    Inventors: Eiji Sugiyama, Kyosuke Ito
  • Publication number: 20040240230
    Abstract: Problems to Be Solved
    Type: Application
    Filed: May 28, 2004
    Publication date: December 2, 2004
    Inventors: Shigemasa Kitajima, Shinobu Takahashi, Kyosuke Ito