Patents by Inventor Kyu Kwon

Kyu Kwon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040174466
    Abstract: Disclosed are an apparatus and method for outputting digital video data in a display appliance. The digital video data outputting apparatus includes data converting units for converting various kinds of analog video signals into digital video data, an output signal selector for receiving outputs of the data converting units and selecting any one of the received outputs, and an encoding unit for encoding the output of the output signal selector.
    Type: Application
    Filed: December 4, 2003
    Publication date: September 9, 2004
    Applicant: LG Electronics Inc.
    Inventor: Sun Kyu Kwon
  • Publication number: 20040012928
    Abstract: A high-power BGA includes a printed circuit board with a through hole, connection pads formed on the bottom of the printed circuit board, matrix solder balls surrounding the through hole and adjacent to the connection pads, a heat spreader on the top surface of the printed circuit board that includes an insulating layer of a high thermal conductivity, a semiconductor chip mounted within the through hole on the bottom surface of the heat spreader that includes a number of contact pads for bonding with the connection pads using gold wires, and a passive film filling the through hole and around the semiconductor chip. By interposing a ceramic insulating layer between the semiconductor chip and the heat spreader, charge generation between the semiconductor chip and the heat spreader is sharply reduced, and defects such as ESD (electrostatic discharge) is reduced during testing and mounting of the package.
    Type: Application
    Filed: June 10, 2003
    Publication date: January 22, 2004
    Applicant: Samsung Electronics Co.
    Inventors: Heung-Kyu Kwon, Tae-Je Cho, Min-Ha Kim
  • Publication number: 20040012081
    Abstract: A semiconductor wafer includes a plurality of passive device units, which are electrically connected across scribe lines. Passive device chips in the wafer that are adjacent to one another in a first direction are electrically connected in parallel, while passive device units adjacent to one another in a second direction are connected in series. By selecting a number of adjacent passive device units extending in the first and second direction, and separating the selected units from the wafer along the corresponding scribe lines, a passive device chip having a desired electrical characteristic (e.g., capacitance or resistance) can be obtained. Such passive device chips may be assembled in a semiconductor package where they are electrically connected to active devices.
    Type: Application
    Filed: June 18, 2003
    Publication date: January 22, 2004
    Inventor: Heung Kyu Kwon
  • Patent number: 6608380
    Abstract: A semiconductor chip package comprising a chip with a lid having venting holes hermetically sealed with screws and a manufacturing method thereof are provided. The semiconductor chip package of the present invention comprises a chip such as a central processing unit (CPU) chip generating a large amount of heat; a substrate having upper and lower surfaces, the chip attached to the upper surface of the substrate; external connection terminals extending from the lower surface of the substrate and electrically connected to the chip; a lid attached to the upper surface of the substrate. The lid has a cavity for receiving the chip on a lower surface and venting holes penetrating the lid. The package includes sealing screws for hermetically sealing the venting holes. With the present invention, the venting holes formed through the lid are hermetically sealed without creating any voids or cracks in the sealant as in the prior art.
    Type: Grant
    Filed: October 9, 2001
    Date of Patent: August 19, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Hoon Ro, Jung-Hwan Chun, Heung-Kyu Kwon
  • Publication number: 20030067070
    Abstract: Semiconductor packages are provided to prevent a chip, such as a central processing unit (CPU) chip, from being degraded due to hot spot heat generated during the operation of the chip and absorbs thermomechanical stresses in interfaces between the chip, a thermal interface material (TIM) and a lid. The chip is electrically connected, e.g., flip-chip bonded, to a package substrate. The lid is thermally connected to and disposed over a back surface of the chip with the TIM interposed therebetween. A heat dissipation means adjacent the TIM is also located between the lid and the chip to prevent the hot spot effect.
    Type: Application
    Filed: September 16, 2002
    Publication date: April 10, 2003
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Heung-Kyu Kwon, Se-Yong Oh, Min-Ha Kim, Tae-Je Cho
  • Publication number: 20030047814
    Abstract: A method for manufacturing a flip chip package includes preparing an IC chip that includes an active surface on which electrode pads are formed, attaching a heat dissipator to a backside of the IC chip with a thermal interface material (TIM), providing a flux filler layer on a substrate, where the substrate includes a plurality of land pads each corresponding to each of the plurality of electrode pads, and mounting the IC chip to the substrate with the active surface facing the substrate. The method further includes forming metal connectors on each of the corresponding plurality of electrode pads of the IC chip, and forming an electrical interconnection between the land pads of the substrate and the plurality of metal connectors by soldering the metal connectors to the land pads. The heat dissipator may be a hermetic heat spreader having a pair of opposite ends bent toward the substrate, which are hermetically sealed to the substrate.
    Type: Application
    Filed: June 7, 2002
    Publication date: March 13, 2003
    Inventor: Heung Kyu Kwon
  • Patent number: 6518660
    Abstract: A semiconductor package includes: a substrate having an upper surface and a lower surface; an integrated circuit chip having bond pads; a lid attached on the upper surface of the substrate so as to cover the chip; and one or more projections that electrically connect the lid to a plurality of ground patterns. The substrate has substrate pads formed on the upper surface, and one or more of the substrate pads extend to form the ground patterns. The chip is bonded on the upper surface of the substrate. One or more of the bond pads are ground bond pads, and the bond pads are electrically connected to the corresponding substrate pads. An electrically nonconductive adhesive is used for the attachment of the lid to the substrate, and the projections are connected to the ground patterns by an electrically conductive adhesive. The ground projections are positioned at four corners of a cavity that is formed between the substrate and the lid.
    Type: Grant
    Filed: December 12, 2001
    Date of Patent: February 11, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Heung Kyu Kwon, Tae Je Cho, Young Hoon Ro
  • Publication number: 20020167591
    Abstract: An apparatus for separating color and. luminance signals from a composite video signal in consideration of the existence and degree of a motion of the video image. The apparatus includes an output section, a first filter, a second filter, a third filter, a motion detector, a motion estimator, a color selector and a luminance selector. The color and luminance selectors select and output the color and the luminance signal from the output signals of the filters in accordance with the existence and degree of the motion.
    Type: Application
    Filed: May 8, 2002
    Publication date: November 14, 2002
    Inventors: Sun Kyu Kwon, Yeong-Ho Ha
  • Publication number: 20020113306
    Abstract: A semiconductor package includes: a substrate having an upper surface and a lower surface; an integrated circuit chip having bond pads; a lid attached on the upper surface of the substrate so as to cover the chip; and one or more projections that electrically connect the lid to a plurality of ground patterns. The substrate has substrate pads formed on the upper surface, and one or more of the substrate pads extend to form the ground patterns. The chip is bonded on the upper surface of the substrate. One or more of the bond pads are ground bond pads, and the bond pads are electrically connected to the corresponding substrate pads. An electrically nonconductive adhesive is used for the attachment of the lid to the substrate, and the projections are connected to the ground patterns by an electrically conductive adhesive. The ground projections are positioned at four corners of a cavity that is formed between the substrate and the lid.
    Type: Application
    Filed: December 12, 2001
    Publication date: August 22, 2002
    Inventors: Heung Kyu Kwon, Tae Je Cho, Young Hoon Ro
  • Publication number: 20020056909
    Abstract: The present invention is directed to a semiconductor chip package that can effectively remove heat from a semiconductor chip, and a method of fabricating the package. In accordance with an embodiment of the invention, the package includes: a substrate having bonding pads; a semiconductor chip having conductive bumps on the front side thereof, the conductive bump contacting the bonding pads; a heat slug bonded to the backside of the semiconductor chip; and a solder film which makes the bonding between the heat slug and the backside of the semiconductor chip. The heat slug can be shaped such that a portion of the heat slug is attached to the substrate by an adhesive.
    Type: Application
    Filed: December 15, 1999
    Publication date: May 16, 2002
    Inventors: HEUNG-KYU KWON, MIN-KYO CHO
  • Publication number: 20020041018
    Abstract: A semiconductor chip package comprising a chip with a lid having venting holes hermetically sealed with screws and a manufacturing method thereof are provided. The semiconductor chip package of the present invention comprises a chip such as a central processing unit (CPU) chip generating a large amount of heat; a substrate having upper and lower surfaces, the chip attached to the upper surface of the substrate; external connection terminals extending from the lower surface of the substrate and electrically connected to the chip; a lid attached to the upper surface of the substrate. The lid has a cavity for receiving the chip on a lower surface and venting holes penetrating the lid. The package includes sealing screws for hermetically sealing the venting holes. With the present invention, the venting holes formed through the lid are hermetically sealed without creating any voids or cracks in the sealant as in the prior art.
    Type: Application
    Filed: October 9, 2001
    Publication date: April 11, 2002
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Young-Hoon Ro, Jung-Hwan Chun, Heung-Kyu Kwon
  • Publication number: 20020038698
    Abstract: In a heat exchanger including an evaporator, a blower, an air inlet unit and an air outlet unit, air is fed from outside into the inner part of the heat exchanger through the air inlet unit and then the air flows toward the blower through a first predetermined portion of the evaporator to thereby supply first heat-exchanged air and thereafter, the first heat-exchanged air is fed to the air outlet unit through a second predetermined portion of the evaporator by the blowing operation of the blower to thereby supply second heat-exchanged air.
    Type: Application
    Filed: August 16, 2001
    Publication date: April 4, 2002
    Inventors: Yong Kyu Kwon, An Sik Choi
  • Patent number: 6187615
    Abstract: In accordance with the present invention, a chip scale package (CSP) is manufactured at wafer-level. The CSP includes a chip, a conductor layer for redistribution of the chip pads of the chip, one or two insulation layers and multiple bumps, which are interconnected to respective chip pads by the conductor layer and are the terminals of the CSP. In addition, in order to improve the reliability of the CSP, a reinforcing layer, an edge protection layer and a chip protection layer is provided. The reinforcing layer absorbs stress applied to the bumps when the CSP are mounted on a circuit board and used for an extended period, and extends the life of the bumps, and thus, the life of the CSP. The edge protection layer and the chip protection layer prevent external force from damaging the CSP. After forming all elements constituting the CSP on the semiconductor wafer, the semiconductor wafer is sawed to produce individual CSPs.
    Type: Grant
    Filed: December 28, 1998
    Date of Patent: February 13, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Nam Seog Kim, Dong Hyeon Jang, Sa Yoon Kang, Heung Kyu Kwon